Bits |
Field Name |
Description |
Type |
Reset |
31:19
|
RESERVED19 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b0 0000 0000 0000 |
18
|
DATARAM |
Value |
ENUM Name |
Description |
0x0 |
MDMRAM |
Use MDMRAM for data |
0x1 |
S2RRAM |
Use S2RRAM for data |
|
RW |
0 |
17
|
FWRAM |
Value |
ENUM Name |
Description |
0x0 |
MDMRAM |
Run code from MDMRAM |
0x1 |
S2RRAM |
Run code from S2RRAM |
|
RW |
0 |
16
|
BANK |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
Run code from bank 0 |
0x1 |
ONE |
Run code from bank 1 |
|
RW |
0 |
15:6
|
RESERVED6 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b00 0000 0000 |
5
|
ADCDIG |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable |
|
RW |
0 |
4
|
DEMODULATOR |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable |
|
RW |
0 |
3
|
MODULATOR |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable |
|
RW |
0 |
2
|
TIMEBASE |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable |
|
RW |
0 |
1
|
TXRXFIFO |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable |
|
RW |
0 |
0
|
TOPSM |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable |
|
RW |
0 |
Bits |
Field Name |
Description |
Type |
Reset |
31:6
|
RESERVED6 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b00 0000 0000 0000 0000 0000 0000 |
5
|
ADCDIG |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
4
|
DEMODULATOR |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
3
|
MODULATOR |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
2
|
TIMEBASE |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
1
|
TXRXFIFO |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
0
|
TOPSM |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
Bits |
Field Name |
Description |
Type |
Reset |
31:30
|
RESERVED30 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b00 |
29
|
VITE |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
28
|
MLSE |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
27
|
SOFD |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
26
|
SWQU |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
25
|
MAFC |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
24
|
MAFI |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
23
|
FIFE |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
22
|
PDIF |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
21
|
CA2P |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
20
|
C1BE |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
19
|
LQIE |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
18
|
F4BA |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
17
|
STIM |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
16
|
DSBU |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
15:9
|
RESERVED9 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b000 0000 |
8
|
FRAC |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
7
|
FIDC |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
6
|
CHFI |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
5
|
BDEC |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
4
|
IQMC |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
3
|
MGE1 |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
2
|
MGE0 |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
1
|
CODC |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
0
|
CMIX |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable |
0x1 |
EN |
Enable module |
|
RW |
0 |
Bits |
Field Name |
Description |
Type |
Reset |
31:30
|
RESERVED30 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b00 |
29
|
VITE |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
28
|
MLSE |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
27
|
SOFD |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
26
|
SWQU |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
25
|
MAFC |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
24
|
MAFI |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
23
|
FIFE |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
22
|
PDIF |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
21
|
CA2P |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
20
|
C1BE |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
19
|
LQIE |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
18
|
F4BA |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
17
|
STIM |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
16
|
DSBU |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
15:9
|
RESERVED9 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b000 0000 |
8
|
FRAC |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
7
|
FIDC |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
6
|
CHFI |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
5
|
BDEC |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
4
|
IQMC |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
3
|
MGE1 |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
2
|
MGE0 |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
1
|
CODC |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
0
|
CMIX |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESET |
Reset module |
|
WO |
0 |
Bits |
Field Name |
Description |
Type |
Reset |
31:30
|
RESERVED30 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b00 |
29
|
S2RTRG |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
28
|
DMATRG |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
27
|
SYSTCAPT2 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
26
|
SYSTCAPT1 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
25
|
SYSTCAPT0 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
24
|
C1BEPEAKAB |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
23
|
C1BEPEAKC |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
22
|
C1BEPEAKB |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
21
|
C1BEPEAKA |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
20
|
C1BEADVANCE |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
19
|
C1BESTALL |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
18:17
|
C1BEROT |
Value |
ENUM Name |
Description |
0x0 |
ROT0 |
No additional rotation (normal shift-right mode) |
0x1 |
ROT1R |
Rotate 1 sample to the right |
0x2 |
ROT1L |
Rotate 1 sample to the left |
0x3 |
ROT16R |
Rotate 16 samples to the right |
|
WO |
0b00 |
16
|
C1BECOPY |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
15:12
|
RESERVED12 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0x0 |
11
|
TIMBADVANCE |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
The bit is 0 |
0x1 |
ON |
The bit is 1 |
|
WO |
0 |
10
|
TIMBSTALL |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
The bit is 0 |
0x1 |
ON |
The bit is 1 |
|
WO |
0 |
9
|
EVT5 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
8
|
EVT4 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
7
|
MLSETERM |
Value |
ENUM Name |
Description |
0x0 |
OFF |
The bit is 0 |
0x1 |
ON |
The bit is 1 |
|
WO |
0 |
6
|
EVT3 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
5
|
EVT2 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
4
|
EVT1 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
3
|
EVT0 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
2
|
TIMBALIGN |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
The bit is 0 |
0x1 |
ON |
The bit is 1 |
|
WO |
0 |
1
|
DSBURST |
Value |
ENUM Name |
Description |
0x0 |
NO_EFFECT |
No effect |
0x1 |
RESTART |
Restart module |
|
WO |
0 |
0
|
CMDDONE |
Value |
ENUM Name |
Description |
0x0 |
NO |
The bit is 0 |
0x1 |
YES |
The bit is 1 |
|
WO |
0 |
Bits |
Field Name |
Description |
Type |
Reset |
31:25
|
RESERVED25 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b000 0000 |
24
|
REFCLK |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
23
|
S2RSTOP |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
22
|
SWQUFALSESYNC |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
21
|
SWQUSYNCED |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
20
|
CLKENBAUDF |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
19
|
FIFORVALID |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
18
|
FIFOWREADY |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
17
|
CLKENBAUD |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
16
|
PREAMBLEDONE |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
15
|
PBEDAT |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
14
|
PBECMD |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
13
|
RFEDAT |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
12
|
BDEC |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
11
|
FRAC |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
10
|
SYSTIMEVT2 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
9
|
SYSTIMEVT1 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
8
|
SYSTIMEVT0 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
7
|
FIFOWR |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
6
|
COUNTER |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
5
|
RFECMD |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
4
|
FIFOOVFL |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
3
|
FIFOUNFL |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
2
|
CLKEN4BAUD |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
1
|
TIMER |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
0
|
MDMAPI |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
Bits |
Field Name |
Description |
Type |
Reset |
31:16
|
RESERVED16 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0x0000 |
15
|
GPI1 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
14
|
GPI0 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
13
|
RESERVED13 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0 |
12
|
C1BEBLOADED |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
11
|
C1BECMBANY |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
10
|
C1BECMBNEG |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
9
|
C1BECMBPOS |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
8
|
C1BECANY |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
7
|
C1BECNEG |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
6
|
C1BECPOS |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
5
|
C1BEBANY |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
4
|
C1BEBNEG |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
3
|
C1BEBPOS |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
2
|
C1BEAANY |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
1
|
C1BEANEG |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
0
|
C1BEAPOS |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
Bits |
Field Name |
Description |
Type |
Reset |
31:25
|
RESERVED25 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b000 0000 |
24
|
REFCLK |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
23
|
S2RSTOP |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
22
|
SWQUFALSESYNC |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
21
|
SWQUSYNCED |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
20
|
CLKENBAUDF |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
19
|
FIFORVALID |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
18
|
FIFOWREADY |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
17
|
CLKENBAUD |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
16
|
PREAMBLEDONE |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
15
|
PBEDAT |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
14
|
PBECMD |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
13
|
RFEDAT |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
12
|
BDEC |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
11
|
FRAC |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
10
|
SYSTIMEVT2 |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
9
|
SYSTIMEVT1 |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
8
|
SYSTIMEVT0 |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
7
|
FIFOWR |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
6
|
COUNTER |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
5
|
RFECMD |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
4
|
FIFOOVFL |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
3
|
FIFOUNFL |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
2
|
CLKEN4BAUD |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
1
|
TIMER |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
0
|
MDMAPI |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
Bits |
Field Name |
Description |
Type |
Reset |
31:16
|
RESERVED16 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0x0000 |
15
|
GPI1 |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
14
|
GPI0 |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
13
|
RESERVED13 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0 |
12
|
C1BEBLOADED |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
11
|
C1BECMBANY |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
10
|
C1BECMBNEG |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
9
|
C1BECMBPOS |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
8
|
C1BECANY |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
7
|
C1BECNEG |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
6
|
C1BECPOS |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
5
|
C1BEBANY |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
4
|
C1BEBNEG |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
3
|
C1BEBPOS |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
2
|
C1BEAANY |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
1
|
C1BEANEG |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
0
|
C1BEAPOS |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
Bits |
Field Name |
Description |
Type |
Reset |
31:25
|
RESERVED25 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b000 0000 |
24
|
REFCLK |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
23
|
S2RSTOP |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
22
|
SWQUFALSESYNC |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
21
|
SWQUSYNCED |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
20
|
CLKENBAUDF |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
19
|
FIFORVALID |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
18
|
FIFOWREADY |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
17
|
CLKENBAUD |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
16
|
PREAMBLEDONE |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
15
|
PBEDAT |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
14
|
PBECMD |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
13
|
RFEDAT |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
12
|
BDEC |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
11
|
FRAC |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
10
|
SYSTIMEVT2 |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
9
|
SYSTIMEVT1 |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
8
|
SYSTIMEVT0 |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
7
|
FIFOWR |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
6
|
COUNTER |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
5
|
RFECMD |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
4
|
FIFOOVFL |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
3
|
FIFOUNFL |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
2
|
CLKEN4BAUD |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
1
|
TIMER |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
0
|
MDMAPI |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
Bits |
Field Name |
Description |
Type |
Reset |
31:16
|
RESERVED16 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0x0000 |
15
|
GPI1 |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
14
|
GPI0 |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
13
|
RESERVED13 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0 |
12
|
C1BEBLOADED |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
11
|
C1BECMBANY |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
10
|
C1BECMBNEG |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
9
|
C1BECMBPOS |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
8
|
C1BECANY |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
7
|
C1BECNEG |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
6
|
C1BECPOS |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
5
|
C1BEBANY |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
4
|
C1BEBNEG |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
3
|
C1BEBPOS |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
2
|
C1BEAANY |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
1
|
C1BEANEG |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
0
|
C1BEAPOS |
Value |
ENUM Name |
Description |
0x0 |
RETAIN |
The bit is 0 |
0x1 |
CLEAR |
The bit is 1 |
|
WO |
0 |
Bits |
Field Name |
Description |
Type |
Reset |
31:22
|
RESERVED22 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b00 0000 0000 |
21:20
|
FIFORDPORT |
Value |
ENUM Name |
Description |
0x0 |
MDMFIFORD |
The FIFORD register is used for read access |
0x1 |
MODEM |
Modem has read access |
0x2 |
PBE |
PBE has read access |
|
RW |
0b00 |
19:16
|
WORDSZRD |
Value |
ENUM Name |
Description |
0x0 |
BITS1 |
1 bit |
0x1 |
BITS2 |
2 bits |
0x2 |
BITS3 |
3 bits |
0x3 |
BITS4 |
4 bits |
0x4 |
BITS5 |
5 bits |
0x5 |
BITS6 |
6 bits |
0x6 |
BITS7 |
7 bits |
0x7 |
BITS8 |
8 bits |
0x8 |
BITS9 |
9 bits |
0x9 |
BITS10 |
10 bits |
0xA |
BITS11 |
11 bits |
0xB |
BITS12 |
12 bits |
0xC |
BITS13 |
13 bits |
0xD |
BITS14 |
14 bits |
0xE |
BITS15 |
15 bits |
0xF |
BITS16 |
16 bits |
|
RW |
0x0 |
15:6
|
RESERVED6 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b00 0000 0000 |
5:4
|
FIFOWRPORT |
Value |
ENUM Name |
Description |
0x0 |
MDMFIFOWR |
The FIFOWR register is used for write access |
0x1 |
MODEM |
Modem has write access |
0x2 |
PBE |
PBE has write access |
|
RW |
0b00 |
3:0
|
WORDSZWR |
Value |
ENUM Name |
Description |
0x0 |
BITS1 |
1 bit |
0x1 |
BITS2 |
2 bits |
0x2 |
BITS3 |
3 bits |
0x3 |
BITS4 |
4 bits |
0x4 |
BITS5 |
5 bits |
0x5 |
BITS6 |
6 bits |
0x6 |
BITS7 |
7 bits |
0x7 |
BITS8 |
8 bits |
0x8 |
BITS9 |
9 bits |
0x9 |
BITS10 |
10 bits |
0xA |
BITS11 |
11 bits |
0xB |
BITS12 |
12 bits |
0xC |
BITS13 |
13 bits |
0xD |
BITS14 |
14 bits |
0xE |
BITS15 |
15 bits |
0xF |
BITS16 |
16 bits |
|
RW |
0x0 |
Bits |
Field Name |
Description |
Type |
Reset |
31:22
|
RESERVED22 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b00 0000 0000 |
21
|
OVERFLOW |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
20
|
ALMOSTFULL |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
19
|
ALMOSTEMPTY |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
18
|
UNDERFLOW |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
17
|
RXVALID |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
16
|
TXREADY |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RO |
0 |
15:0
|
RESERVED0 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0x0000 |
Bits |
Field Name |
Description |
Type |
Reset |
31:28
|
SYM7 |
Value |
ENUM Name |
Description |
0x0 |
ALLZEROS |
All the bits are 0 |
0xF |
ALLONES |
All the bits are 1 |
|
RW |
0x0 |
27:24
|
SYM6 |
Value |
ENUM Name |
Description |
0x0 |
ALLZEROS |
All the bits are 0 |
0xF |
ALLONES |
All the bits are 1 |
|
RW |
0x0 |
23:20
|
SYM5 |
Value |
ENUM Name |
Description |
0x0 |
ALLZEROS |
All the bits are 0 |
0xF |
ALLONES |
All the bits are 1 |
|
RW |
0x0 |
19:16
|
SYM4 |
Value |
ENUM Name |
Description |
0x0 |
ALLZEROS |
All the bits are 0 |
0xF |
ALLONES |
All the bits are 1 |
|
RW |
0x0 |
15:12
|
SYM3 |
Value |
ENUM Name |
Description |
0x0 |
ALLZEROS |
All the bits are 0 |
0xF |
ALLONES |
All the bits are 1 |
|
RW |
0x0 |
11:8
|
SYM2 |
Value |
ENUM Name |
Description |
0x0 |
ALLZEROS |
All the bits are 0 |
0xF |
ALLONES |
All the bits are 1 |
|
RW |
0x0 |
7:4
|
SYM1 |
Value |
ENUM Name |
Description |
0x0 |
ALLZEROS |
All the bits are 0 |
0xF |
ALLONES |
All the bits are 1 |
|
RW |
0x0 |
3:0
|
SYM0 |
Value |
ENUM Name |
Description |
0x0 |
ALLZEROS |
All the bits are 0 |
0xF |
ALLONES |
All the bits are 1 |
|
RW |
0x0 |
Bits |
Field Name |
Description |
Type |
Reset |
31:29
|
RESERVED29 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b000 |
28:24
|
CDCTGAINMA |
Value |
ENUM Name |
Description |
0x0 |
ALLZEROS |
When CDCTGAINMA is set to zero, the tracker loop is disabled. |
0x1F |
ALLONES |
Maximum gain mantissa. |
|
RW |
0b0 0000 |
23:21
|
CDCTGAINEX |
Value |
ENUM Name |
Description |
0x0 |
ALLZEROS |
When CDCTGAINEX is set to all zeroes, the CDCGAINMA multiplier is 4 |
0x7 |
ALLONES |
When CDCTGAINEX is set to all zeroes, the CDCGAINMA multiplier is 512 |
|
RW |
0b000 |
20
|
CDCCOLRST |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Do not enable collision detect and restart feature |
0x1 |
EN |
Enable collision detect and restart feature |
|
RW |
0 |
19:18
|
MGE1SRCSEL |
Value |
ENUM Name |
Description |
0x0 |
FIDC |
Output of the FIDC (x4 samples) |
0x1 |
FEXB1 |
Output of the FEXB, as selected by DEMFEXB0.OUT2SRCSEL register |
0x2 |
CHFI |
Output of CHFI |
|
RW |
0b00 |
17:16
|
CHFIBW |
Value |
ENUM Name |
Description |
0x0 |
BW0_5 |
0.5 * Fs. Using FIR filter with taps [3 0 -9 0 20 0 -46 0 160 256 160 0 -46 0 20 0 -9 0 3]. |
0x1 |
BW0_3333 |
0.33333 * Fs. Using FIR filter with taps [0 4 6 0 -16 -25 0 65 138 170 138 65 0 -25 -16 0 6 4 0]. |
0x2 |
BW0_41667 |
0.41667 * Fs. Using FIR filter with taps [-1 -4 2 12 4 -25 -31 38 154 213 154 38 -31 -25 4 12 2 -4 -1]. |
0x3 |
BW0_29 |
0.29 * Fs. Using FIR filter with taps [2 3 1 -8 -18 -14 17 72 126 149 126 72 17 -14 -18 -8 1 3 2]. |
|
RW |
0b00 |
15:10
|
RESERVED10 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b00 0000 |
9:0
|
CMIXN |
Value |
ENUM Name |
Description |
0x0 |
ALLZEROS |
All the bits are 0 |
0x3FF |
ALLONES |
All the bits are 1 |
|
RW |
0b00 0000 0000 |
Bits |
Field Name |
Description |
Type |
Reset |
31
|
RESERVED31 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0 |
30:29
|
BDE2DVGA |
Value |
ENUM Name |
Description |
0x0 |
GAIN1 |
Gain 1 |
0x1 |
GAIN2 |
Gain 2 |
0x2 |
GAIN4 |
Gain 4 |
0x3 |
GAIN8 |
Gain 8 |
|
RW |
0b00 |
28
|
BDE1FILTMODE |
Value |
ENUM Name |
Description |
0x0 |
DIV1 |
Decimate by 1 (no decimation) |
0x1 |
DIV2 |
Decimate by 2 |
|
RW |
0 |
27:26
|
LQIPERIOD |
Value |
ENUM Name |
Description |
0x0 |
SYM16 |
16 symbols |
0x1 |
SYM64 |
64 symbols |
0x2 |
SYM256 |
256 symbols |
0x3 |
SYM1024 |
1024 symbols |
|
RW |
0b00 |
25:24
|
BDE1DVGA |
Value |
ENUM Name |
Description |
0x0 |
GAIN1 |
Gain 1 |
0x1 |
GAIN2 |
Gain 2 |
0x2 |
GAIN4 |
Gain 4 |
0x3 |
GAIN8 |
Gain 8 |
|
RW |
0b00 |
23
|
BDE1NUMSTAGES |
Value |
ENUM Name |
Description |
0x0 |
DIV1 |
Decimate by 1 (no decimation) |
0x1 |
DIV2 |
Decimate by 2 |
|
RW |
0 |
22:21
|
PDIFDECIM |
Value |
ENUM Name |
Description |
0x0 |
DIV1 |
No decimation |
0x1 |
DIV2 |
Decimate by 2 |
0x2 |
DIV4 |
Decimate by 4 |
|
RW |
0b00 |
20:16
|
BDE2DECRATIO |
Value |
ENUM Name |
Description |
0x0 |
DIV1 |
Decimate by 1 (no decimation) |
0x1 |
DIV2 |
Decimate by 2 |
0x2 |
DIV4 |
Decimate by 4 |
0x3 |
DIV8 |
Decimate by 8 |
|
RW |
0b0 0000 |
15
|
RESERVED15 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0 |
14
|
MLSERUN |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
13:12
|
MAFCGAIN |
Value |
ENUM Name |
Description |
0x0 |
ALLZEROS |
All the bits are 0 |
0x3 |
ALLONES |
All the bits are 1 |
|
RW |
0b00 |
11
|
STIMBYPASS |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Perform both estimation and correct timing |
0x1 |
EN |
Perform estimation only (no timing correction) |
|
RW |
0 |
10
|
STIMESTONLY |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Perform both estimation and correct timing |
0x1 |
EN |
Perform estimation only (no timing correction) |
|
RW |
0 |
9:7
|
STIMTEAPERIOD |
Value |
ENUM Name |
Description |
0x0 |
SYM4 |
4 symbols |
0x1 |
SYM8 |
8 symbols |
0x2 |
SYM16 |
16 symbols |
0x3 |
SYM32 |
32 symbols |
0x4 |
SYM64 |
64 symbols |
0x5 |
SYM128 |
128 symbols |
|
RW |
0b000 |
6:4
|
STIMTEAGAIN |
Value |
ENUM Name |
Description |
0x0 |
DIV512 |
Gain is 1/512 |
0x1 |
DIV256 |
Gain is 1/256 |
0x2 |
DIV128 |
Gain is 1/128 |
0x3 |
DIV64 |
Gain is 1/64 |
0x4 |
DIV32 |
Gain is 1/32 |
0x5 |
DIV16 |
Gain is 1/16 |
0x6 |
DIV8 |
Gain is 1/8 |
0x7 |
DIV4 |
Gain is 1/4 |
|
RW |
0b000 |
3
|
PDIFLINPREDEN |
Value |
ENUM Name |
Description |
0x0 |
OFF |
The bit is 0 |
0x1 |
ON |
The bit is 1 |
|
RW |
0 |
2
|
PDIFDESPECK |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
1
|
PDIFIQCONJEN |
Value |
ENUM Name |
Description |
0x0 |
OFF |
The bit is 0 |
0x1 |
ON |
The bit is 1 |
|
RW |
0 |
0
|
PDIFLIMITRANGE |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Allow full 8-bit range, i.e. +/- 128 |
0x1 |
EN |
Limit the range to 7-bit, i.e. +/- 64 |
|
RW |
0 |
Bits |
Field Name |
Description |
Type |
Reset |
31:22
|
RESERVED22 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b00 0000 0000 |
21:20
|
DEMFIDC0_COMPSEL |
Value |
ENUM Name |
Description |
0x0 |
MANUAL |
Use manually programmable values from DEMFIDC1 registers |
0x2 |
ACC |
Compensate with latest accumulator estimate |
|
RW |
0b00 |
19:18
|
DEMFIDC0_ACCPERIOD |
Value |
ENUM Name |
Description |
0x0 |
SMPL8 |
8 samples |
0x1 |
SMPL32 |
32 samples |
0x2 |
SMPL128 |
128 samples |
0x3 |
SMPL512 |
512 samples |
|
RW |
0b00 |
17
|
DEMFIDC0_ACCMODE |
Value |
ENUM Name |
Description |
0x0 |
SINGLE |
Generate a single DC estimate only, then stop |
0x1 |
CONT |
Generate new DC estimates continuously |
|
RW |
0 |
16
|
DEMFIDC0_ACCEN |
Value |
ENUM Name |
Description |
0x0 |
OFF |
Disable accumulator estimator |
0x1 |
ON |
Enable accumulator estimator |
|
RW |
0 |
15:12
|
RESERVED12 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0x0 |
11
|
DEMCODC0_ESTSEL |
Value |
ENUM Name |
Description |
0x0 |
ACC |
Read back latest accumulator estimate |
0x1 |
IIR |
Read back latest IIR estimate |
|
RW |
0 |
10:9
|
DEMCODC0_COMPSEL |
Value |
ENUM Name |
Description |
0x0 |
MANUAL |
Use manually programmable values from DEMCODC1 registers |
0x2 |
ACC |
Compensate with latest accumulator estimate |
0x3 |
IIR |
Compensate with latest IIR estimate |
|
RW |
0b00 |
8
|
DEMCODC0_IIRUSEINITIAL |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Initialize IIR filter with value zero |
0x1 |
EN |
Use the manual compensation values in DEMCODC1 for initialization |
|
RW |
0 |
7:5
|
DEMCODC0_IIRGAIN |
Value |
ENUM Name |
Description |
0x0 |
OFF |
Filter disabled |
0x1 |
DIV16 |
Use 1/16 IIR adaptation |
0x2 |
DIV32 |
Use 1/32 IIR adaptation |
0x3 |
DIV64 |
Use 1/64 IIR adaptation |
0x4 |
DIV128 |
Use 1/128 IIR adaptation |
0x5 |
DIV256 |
Use 1/256 IIR adaptation |
0x6 |
DIV512 |
Use 1/512 IIR adaptation |
0x7 |
DIV1024 |
Use 1/1024 IIR adaptation |
|
RW |
0b000 |
4
|
DEMCODC0_IIREN |
Value |
ENUM Name |
Description |
0x0 |
OFF |
Disable IIR estimator |
0x1 |
ON |
Enable IIR estimator |
|
RW |
0 |
3
|
DEMCODC0_ACCMODE |
Value |
ENUM Name |
Description |
0x0 |
SINGLE |
Generate a single DC estimate only, then stop |
0x1 |
CONT |
Generate new DC estimates continuously |
|
RW |
0 |
2:1
|
DEMCODC0_ACCPERIOD |
Value |
ENUM Name |
Description |
0x0 |
SMPL8 |
8 samples |
0x1 |
SMPL32 |
32 samples |
0x2 |
SMPL128 |
128 samples |
0x3 |
SMPL512 |
512 samples |
|
RW |
0b00 |
0
|
DEMCODC0_ACCEN |
Value |
ENUM Name |
Description |
0x0 |
OFF |
Disable accumulator estimator |
0x1 |
ON |
Enable accumulator estimator |
|
RW |
0 |
Bits |
Field Name |
Description |
Type |
Reset |
31:22
|
RESERVED22 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b00 0000 0000 |
21
|
DEMDSXB0_OUT2PASSTHROUGH |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RW |
0 |
20
|
DEMDSXB0_OUT1PASSTHROUGH |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RW |
0 |
19
|
DEMDSXB0_OUTSRCSEL2 |
Value |
ENUM Name |
Description |
0x0 |
FIFE |
Source is fine frequency offset estimator (FIFE) |
0x1 |
MAFI |
Source is matched filter (MAFI) |
|
RW |
0 |
18
|
DEMDSXB0_OUTSRCSEL1 |
Value |
ENUM Name |
Description |
0x0 |
FIFE |
Source is fine frequency offset estimator (FIFE) |
0x1 |
MAFI |
Source is matched filter (MAFI) |
|
RW |
0 |
17
|
DEMDSXB0_B2SRCSEL |
Value |
ENUM Name |
Description |
0x0 |
INPUT |
Source is crossbar main input |
0x1 |
FIFE |
Source is fine frequency offset estimator (FIFE) |
|
RW |
0 |
16
|
DEMDSXB0_B1SRCSEL |
Value |
ENUM Name |
Description |
0x0 |
INPUT |
Source is crossbar main input |
0x1 |
MAFI |
Source is matched filter (MAFI) |
|
RW |
0 |
15:14
|
RESERVED14 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b00 |
13
|
DEMFEXB0_OUT2PASSTHROUGH |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RW |
0 |
12:11
|
DEMFEXB0_OUT2SRCSEL |
Value |
ENUM Name |
Description |
0x0 |
CODC |
Source is coarse DC remover (CODC) |
0x1 |
CMIX |
Source is complex N*Fs/1024 mixer (CMIX) |
0x2 |
BDE1 |
Source is complex N*Fs/1024 mixer (CMIX) |
|
RW |
0b00 |
10
|
DEMFEXB0_OUT1PASSTHROUGH |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RW |
0 |
9:8
|
DEMFEXB0_OUT1SRCSEL |
Value |
ENUM Name |
Description |
0x0 |
CODC |
Source is coarse DC remover (CODC) |
0x1 |
CMIX |
Source is complex N*Fs/1024 mixer (CMIX) |
0x2 |
BDE1 |
Source is complex N*Fs/1024 mixer (CMIX) |
|
RW |
0b00 |
7:6
|
DEMFEXB0_B4SRCSEL |
Value |
ENUM Name |
Description |
0x0 |
ZEROS |
Source is complex N*Fs/1024 mixer (ZEROS) |
0x3 |
ONES |
Source is complex N*Fs/1024 mixer (ONES) |
|
RW |
0b00 |
5:4
|
DEMFEXB0_B3SRCSEL |
Value |
ENUM Name |
Description |
0x0 |
INPUT |
Source is crossbar main input |
0x1 |
CODC |
Source is complex N*Fs/1024 mixer (CMIX) |
0x2 |
CMIX |
Source is complex N*Fs/1024 mixer (CMIX) |
|
RW |
0b00 |
3:2
|
DEMFEXB0_B2SRCSEL |
Value |
ENUM Name |
Description |
0x0 |
INPUT |
Source is crossbar main input |
0x1 |
CODC |
Source is coarse DC remover (CODC) |
0x2 |
BDE1 |
Source is coarse DC remover (CODC) |
|
RW |
0b00 |
1:0
|
DEMFEXB0_B1SRCSEL |
Value |
ENUM Name |
Description |
0x0 |
INPUT |
Source is crossbar main input |
0x1 |
CMIX |
Source is complex N*Fs/1024 mixer (CMIX) |
0x2 |
BDE1 |
Source is complex N*Fs/1024 mixer (CMIX) |
|
RW |
0b00 |
Bits |
Field Name |
Description |
Type |
Reset |
31:24
|
C1C7 |
Value |
ENUM Name |
Description |
0x0 |
ALLZEROS |
All the bits are 0 |
0xFF |
ALLONES |
All the bits are 1 |
|
RW |
0x00 |
23:16
|
C0C8 |
Value |
ENUM Name |
Description |
0x0 |
ALLZEROS |
All the bits are 0 |
0xFF |
ALLONES |
All the bits are 1 |
|
RW |
0x00 |
15:12
|
RESERVED12 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0x0 |
11
|
FINEFOESEL |
Value |
ENUM Name |
Description |
0x0 |
IIR |
Latest IIR estimate |
0x1 |
ACC |
Latest accumulator estimate |
|
RW |
0 |
10:9
|
FOCFFSEL |
Value |
ENUM Name |
Description |
0x0 |
IIR |
Compensate with latest IIR estimate |
0x1 |
ACC |
Compensate with latest accumulator estimate |
0x2 |
MANUAL |
Use programmable manual value from register bank. (Note: an input register is not implemented, so the manual compensation value is tied to '0') |
|
RW |
0b00 |
8
|
ACCCNTMODE |
Value |
ENUM Name |
Description |
0x0 |
SINGLE |
Generate a single frequency offset estimate only, then stop |
0x1 |
CONT |
Generate new frequency offset estimates continuously |
|
RW |
0 |
7:6
|
ACCPERIOD |
Value |
ENUM Name |
Description |
0x0 |
PER64 |
64 samples |
0x1 |
PER128 |
128 samples |
0x2 |
PER256 |
256 samples |
0x3 |
PER512 |
512 samples |
|
RW |
0b00 |
5
|
ACCEN |
Value |
ENUM Name |
Description |
0x0 |
OFF |
Disable accumulator estimator |
0x1 |
ON |
Enable accumulator estimator |
|
RW |
0 |
4
|
IIRUSEINITIAL |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Initialize IIR filter with value zero |
0x1 |
EN |
Use the manual compensation value in DEMFIFE1 for initialization |
|
RW |
0 |
3:1
|
IIRGAIN |
Value |
ENUM Name |
Description |
0x0 |
OFF |
Filter disabled |
0x1 |
DIV16 |
Use 1/16 IIR adaptation |
0x2 |
DIV32 |
Use 1/32 IIR adaptation |
0x3 |
DIV64 |
Use 1/64 IIR adaptation |
0x4 |
DIV128 |
Use 1/128 IIR adaptation |
0x5 |
DIV256 |
Use 1/256 IIR adaptation |
0x6 |
DIV512 |
Use 1/512 IIR adaptation |
0x7 |
DIV1024 |
Use 1/1024 IIR adaptation |
|
RW |
0b000 |
0
|
IIREN |
Value |
ENUM Name |
Description |
0x0 |
OFF |
Disable IIR estimator |
0x1 |
ON |
Enable IIR estimator |
|
RW |
0 |
Bits |
Field Name |
Description |
Type |
Reset |
31:16
|
WORD |
Value |
ENUM Name |
Description |
0x0 |
ALLZEROS |
All the bits are 0 |
0xFFFF |
ALLONES |
All the bits are 1 |
|
RW |
0x0000 |
15:12
|
RESERVED12 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0x0 |
11
|
DSBUSEL |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RW |
0 |
10
|
HDISMODE |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
9
|
PARBITQUALEN |
Value |
ENUM Name |
Description |
0x0 |
OFF |
The bit is 0 |
0x1 |
ON |
The bit is 1 |
|
RW |
0 |
8:7
|
STIMMODE |
Value |
ENUM Name |
Description |
0x0 |
NORMAL |
Normal Mode |
0x1 |
LATE |
STIM starts late |
0x2 |
EARLY |
STIM starts early |
|
RW |
0b00 |
6
|
C1BEMODE |
Value |
ENUM Name |
Description |
0x0 |
NORMAL |
Normal mode |
0x1 |
EARLYLATE |
Set the C1BE in special early/late mode |
|
RW |
0 |
5
|
SOFTPDIFFMODE |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
4
|
SOFTTXENABLE |
Value |
ENUM Name |
Description |
0x0 |
OFF |
The bit is 0 |
0x1 |
ON |
The bit is 1 |
|
RW |
0 |
3
|
FECENABLE |
Value |
ENUM Name |
Description |
0x0 |
OFF |
The bit is 0 |
0x1 |
ON |
The bit is 1 |
|
RW |
0 |
2
|
FEC5TERMINATE |
Value |
ENUM Name |
Description |
0x0 |
OFF |
The bit is 0 |
0x1 |
ON |
The bit is 1 |
|
RW |
0 |
1
|
TONEINSERT |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
0
|
PREAMBLEINSERT |
Value |
ENUM Name |
Description |
0x0 |
DIS |
The bit is 0 |
0x1 |
EN |
The bit is 1 |
|
RW |
0 |
Bits |
Field Name |
Description |
Type |
Reset |
31:28
|
RESERVED28 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0x0 |
27:25
|
LOOPBACKPIN |
Value |
ENUM Name |
Description |
0x0 |
GPI0 |
GPI0 connected to loopback |
0x1 |
GPI1 |
GPI1 connected to loopback |
0x2 |
GPI2 |
GPI2 connected to loopback |
0x3 |
GPI3 |
GPI3 connected to loopback |
0x4 |
GPI4 |
GPI4 connected to loopback |
0x5 |
GPI5 |
GPI5 connected to loopback |
0x6 |
GPI6 |
GPI6 connected to loopback |
0x7 |
GPI7 |
GPI7 connected to loopback |
|
RW |
0b000 |
24
|
DECSTAGETRIGGER |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RW |
0 |
23:21
|
DECSTAGEDEBUG |
Value |
ENUM Name |
Description |
0x0 |
NOSEL |
No source selected |
0x1 |
PDIF |
Dump PDIF output samples |
0x2 |
FIFE |
Dump PDIF output samples |
0x3 |
MAFI |
Dump MAFI output samples |
0x4 |
C1BE |
Dump C1BE correlator A value (truncated to 8 LSBs only, may overflow if correlator value is +128). |
0x5 |
MAFC |
Dump MAFC output samples |
0x6 |
STIM |
Dump STIM output samples |
0x7 |
SOFD |
Dump SOFD output samples |
|
RW |
0b000 |
20
|
FRONTENDTRIGGER |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RW |
0 |
19:17
|
FRONTENDDEBUG |
Value |
ENUM Name |
Description |
0x0 |
NOSEL |
No source selected |
0x1 |
IQMC |
Dump IQMC output samples |
0x2 |
BDE1 |
Dump BDE1 output samples |
0x3 |
FEXB2 |
Dump FEXB output #2 samples, as selected by DEMFEXB0.OUT2SRCSEL register |
0x4 |
BDE2 |
Dump BDE2 output samples |
0x5 |
CHFI |
Dump CHFI output samples |
0x6 |
FRAC |
Dump FRAC output samples |
0x7 |
FIDC |
Dump FRAC output samples |
|
RW |
0b000 |
16
|
LOOPBACKMODE |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RW |
0 |
15:8
|
RESERVED8 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0x00 |
7:0
|
VAL |
Value |
ENUM Name |
Description |
0x0 |
ALLZEROS |
All the bits are 0 |
0xFF |
ALLONES |
All the bits are 1 |
|
RW |
0x00 |
Bits |
Field Name |
Description |
Type |
Reset |
31:17
|
RESERVED17 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b000 0000 0000 0000 |
16
|
START |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
15:8
|
RESERVED8 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0x00 |
7:6
|
METRSEL |
Value |
ENUM Name |
Description |
0x0 |
MET5M |
Use 5Mbps Metrics |
0x1 |
PHAC |
Use PHAC Metrics |
0x2 |
SOFD |
Use SOFD Metrics |
0x3 |
MLSE |
Use MLSE Metrics |
|
RW |
0b00 |
5:2
|
APMRDBACKSEL |
Value |
ENUM Name |
Description |
0x0 |
NOSEL |
No selection |
0x8 |
APM0 |
View APM 0 |
0x9 |
APM1 |
View APM 1 |
0xA |
APM2 |
View APM 2 |
0xB |
APM3 |
View APM 3 |
0xC |
APM4 |
View APM 4 |
0xD |
APM5 |
View APM 5 |
0xE |
APM6 |
View APM 6 |
0xF |
APM7 |
View APM 7 |
|
RW |
0x0 |
1
|
ACSITERATIONS |
Value |
ENUM Name |
Description |
0x0 |
CODE12 |
2 iterations per ACS (2 branches, 1/2 codes) |
0x1 |
CODE23 |
4 iterations per ACS (4 branches, 2/3 codes) |
|
RW |
0 |
0
|
METRICS |
Value |
ENUM Name |
Description |
0x0 |
HW |
Use HW metrics as defined by VITCTRL.METRSEL bits |
0x1 |
SOFT |
Use soft Metrics (register based) |
|
RW |
0 |
Bits |
Field Name |
Description |
Type |
Reset |
31:30
|
RESERVED30 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b00 |
29:24
|
CPTSRC |
Value |
ENUM Name |
Description |
0x0 |
ALLZEROS |
All the bits are 0 |
0x3F |
ALLONES |
All the bits are 1 |
|
RW |
0b00 0000 |
23
|
CPTCTL |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Disable capture mode for counter |
0x1 |
EN |
Enable capture mode for counter |
|
RW |
0 |
22:21
|
CNTRSRC |
Value |
ENUM Name |
Description |
0x0 |
CLK |
Use clock |
0x1 |
CLKBAUD |
Use baud event |
0x2 |
CLK4BAUD |
Use 4xBaud event |
0x3 |
CLK4BAUDF |
Use 4xBaud flushed event |
|
RW |
0b00 |
20
|
CNTRCLR |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RW |
0 |
19
|
CNTRCTL |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RW |
0 |
18:17
|
TIMSRC |
Value |
ENUM Name |
Description |
0x0 |
CLK |
Clock |
0x1 |
CLKBAUD |
Baud |
0x2 |
CLK4BAUD |
4xBaud |
0x3 |
CLK4BAUDF |
4xBaud flushed |
|
RW |
0b00 |
16
|
TIMCTL |
Value |
ENUM Name |
Description |
0x0 |
DIS |
Will disable timer and clear internal timer value |
0x1 |
EN |
Will enable timer |
|
RW |
0 |
15:0
|
RESERVED0 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0x0000 |
Bits |
Field Name |
Description |
Type |
Reset |
31:22
|
RESERVED22 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b00 0000 0000 |
21
|
CHFI |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
20
|
BDE2 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
19
|
FIDC |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
18
|
FRAC |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
17
|
MGEX |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
16
|
CODC |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
15:0
|
VAL |
Value |
ENUM Name |
Description |
0x0 |
ALLZEROS |
All the bits are 0 |
0xFFFF |
ALLONES |
All the bits are 1 |
|
RW |
0x0000 |
Bits |
Field Name |
Description |
Type |
Reset |
31:29
|
RESERVED29 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0b000 |
28:16
|
VAL |
Value |
ENUM Name |
Description |
0x0 |
ALLZEROS |
All the bits are 0 |
0x1FFF |
ALLONES |
All the bits are 1 |
|
RW |
0b0 0000 0000 0000 |
15:12
|
RESERVED12 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0x0 |
11
|
C1BEX2 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
10
|
C1BEX1 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
9
|
C1BEX0 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
8
|
SOFD |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
7
|
LQIE |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
6
|
STIM |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
6
|
RESERVED6 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0 |
5
|
FIFE |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
4
|
PDIF |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
3
|
CA2P |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
2
|
MAFI |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
1
|
DSBU |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
0
|
MLSEBIT |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
WO |
0 |
Bits |
Field Name |
Description |
Type |
Reset |
31:30
|
HWCLKSTRETCH |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RW |
0b00 |
29:27
|
HWCLKMUX1 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RW |
0b000 |
26:24
|
HWCLKMUX0 |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RW |
0b000 |
23:16
|
SW |
Value |
ENUM Name |
Description |
0x0 |
ZERO |
The bit is 0 |
0x1 |
ONE |
The bit is 1 |
|
RW |
0x00 |
15:14
|
GPO7 |
Value |
ENUM Name |
Description |
0x0 |
SW7 |
Output GPOCTRL1.SW |
0x1 |
TOPSM_WAIT |
Output hardware clk |
0x2 |
TWO |
HW source 2 |
0x3 |
THREE |
HW Source 3 |
|
RW |
0b00 |
13:12
|
GPO6 |
Value |
ENUM Name |
Description |
0x0 |
SW6 |
Output GPOCTRL1.SW |
0x1 |
TRANSPARENT_OUT |
The bit is 1 |
0x2 |
TWO |
HW source 2 |
0x3 |
THREE |
HW Source 3 |
|
RW |
0b00 |
11:10
|
GPO5 |
Value |
ENUM Name |
Description |
0x0 |
SW5 |
Output GPOCTRL1.SW |
0x1 |
DEM_OUT_WORD |
The bit is 1 |
0x2 |
TWO |
HW source 2 |
0x3 |
THREE |
HW Source 3 |
|
RW |
0b00 |
9:8
|
GPO4 |
Value |
ENUM Name |
Description |
0x0 |
SW4 |
Output GPOCTRL1.SW |
0x1 |
CORR_PEAK_C |
The bit is 1 |
0x2 |
TWO |
HW source 2 |
0x3 |
THREE |
HW Source 3 |
|
RW |
0b00 |
7:6
|
GPO3 |
Value |
ENUM Name |
Description |
0x0 |
SW3 |
Output GPOCTRL1.SW |
0x1 |
CORR_PEAK_B |
The bit is 1 |
0x2 |
TWO |
HW source 2 |
0x3 |
THREE |
HW Source 3 |
|
RW |
0b00 |
5:4
|
GPO2 |
Value |
ENUM Name |
Description |
0x0 |
SW2 |
Output GPOCTRL1.SW |
0x1 |
CORR_PEAK_A |
The bit is 1 |
0x2 |
TWO |
HW source 2 |
0x3 |
THREE |
HW Source 3 |
|
RW |
0b00 |
3:2
|
GPO1 |
Value |
ENUM Name |
Description |
0x0 |
SW1 |
Output GPOCTRL1.SW |
0x1 |
HWCLK1 |
Output Loopback symbol on pin MDMGPO1 |
0x2 |
TWO |
HW source 2 |
0x3 |
THREE |
HW Source 3 |
|
RW |
0b00 |
1:0
|
GPO0 |
Value |
ENUM Name |
Description |
0x0 |
SW0 |
Output GPOCTRL1.SW |
0x1 |
HWCLK0 |
Output hardware clock on pin MDMGPO0 |
0x2 |
LOOPBACK |
HW source 2 |
0x3 |
THREE |
HW Source 3 |
|
RW |
0b00 |