LRFCC23X0.h

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/*
 * Copyright (c) 2021-2023, Texas Instruments Incorporated
 * All rights reserved.
 *
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 * modification, are permitted provided that the following conditions
 * are met:
 *
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 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
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 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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 */

#ifndef ti_drivers_LRFCC2340_h__include
#define ti_drivers_LRFCC2340_h__include

#include <stdint.h>
#include <stddef.h>
#include <stdbool.h>
#include <ti/devices/DeviceFamily.h>
#include DeviceFamily_constructPath(inc/hw_memmap.h)
#include DeviceFamily_constructPath(inc/hw_lrfdpbe.h)
#include DeviceFamily_constructPath(inc/pbe_generic_regdef_regs.h)

#include <ti/drivers/rcl/RCL_Types.h>

#ifdef DeviceFamily_CC27XX
/* TODO: See RCL-556 */
#define LRFDPBE32_BASE          0x40081400 // LRFDPBE32
#define LRFDMDM32_BASE          0x40082400 // LRFDMDM32
#define LRFDRFE32_BASE          0x40083400 // LRFDRFE32
typedef union
{
    struct {
        uint16_t ibBoost: 2;
        uint16_t ib: 6;
        uint16_t gain: 3;
        uint16_t mode: 2;
        uint16_t reserved: 2;
        uint16_t noIfampRfLdoBypass: 1;
    };
    uint16_t rawValue;
} LRF_TxPowerTable_Value;
#else
typedef union
{
    struct {
        uint16_t reserved: 5;
        uint16_t ib: 6;
        uint16_t gain: 3;
        uint16_t mode: 1;
        uint16_t noIfampRfLdoBypass: 1;
    };
    uint16_t rawValue;
} LRF_TxPowerTable_Value;
#endif
#define LRF_TxPowerTable_INVALID_VALUE ((LRF_TxPowerTable_Value){.rawValue = 0xFFFF})              
typedef uint8_t LRF_TxPowerTable_TempCoeff;

typedef enum LRF_TxPowerResult_e {
    TxPowerResult_Ok,                  
    TxPowerResult_Error,               
} LRF_TxPowerResult;


#define LRF_EventNone                  ((LRF_Events){ .value = (0U << 0U)})   
#define LRF_EventOpDone                ((LRF_Events){ .value = (1U << 0U)})   
#define LRF_EventPingRsp               ((LRF_Events){ .value = (1U << 1U)})   
#define LRF_EventRxCtrl                ((LRF_Events){ .value = (1U << 2U)})   
#define LRF_EventRxCtrlAck             ((LRF_Events){ .value = (1U << 3U)})   
#define LRF_EventRxNok                 ((LRF_Events){ .value = (1U << 4U)})   
#define LRF_EventRxIgnored             ((LRF_Events){ .value = (1U << 5U)})   
#define LRF_EventRxEmpty               ((LRF_Events){ .value = (1U << 6U)})   
#define LRF_EventRxBufFull             ((LRF_Events){ .value = (1U << 7U)})   
#define LRF_EventRxOk                  ((LRF_Events){ .value = (1U << 8U)})   
#define LRF_EventTxCtrl                ((LRF_Events){ .value = (1U << 9U)})   
#define LRF_EventTxCtrlAckAck          ((LRF_Events){ .value = (1U << 10U)})  
#define LRF_EventTxRetrans             ((LRF_Events){ .value = (1U << 11U)})  
#define LRF_EventTxAck                 ((LRF_Events){ .value = (1U << 12U)})  
#define LRF_EventTxDone                ((LRF_Events){ .value = (1U << 13U)})  
#define LRF_EventTxCtrlAck             ((LRF_Events){ .value = (1U << 14U)})  
#define LRF_EventOpError               ((LRF_Events){ .value = (1U << 15U)})  
#define LRF_EventRxfifo                ((LRF_Events){ .value = (1U << 16U)})  
#define LRF_EventTxfifo                ((LRF_Events){ .value = (1U << 17U)})  
#define LRF_EventLossOfLock            ((LRF_Events){ .value = (1U << 18U)})  
#define LRF_EventLock                  ((LRF_Events){ .value = (1U << 19U)})  
#define LRF_EventRfesoft0              ((LRF_Events){ .value = (1U << 20U)})  
#define LRF_EventRfesoft1              ((LRF_Events){ .value = (1U << 21U)})  
#define LRF_EventRfedone               ((LRF_Events){ .value = (1U << 22U)})  
#define LRF_EventMdmsoft0              ((LRF_Events){ .value = (1U << 23U)})  
#define LRF_EventMdmsoft1              ((LRF_Events){ .value = (1U << 24U)})  
#define LRF_EventMdmsoft2              ((LRF_Events){ .value = (1U << 25U)})  
#define LRF_EventMdmout                ((LRF_Events){ .value = (1U << 26U)})  
#define LRF_EventMdmin                 ((LRF_Events){ .value = (1U << 27U)})  
#define LRF_EventMdmdone               ((LRF_Events){ .value = (1U << 28U)})  
#define LRF_EventSystim0               ((LRF_Events){ .value = (1U << 29U)})  
#define LRF_EventSystim1               ((LRF_Events){ .value = (1U << 30U)})  
#define LRF_EventSystim2               ((LRF_Events){ .value = (1U << 31U)})  
union LRF_Events_u {
    struct {
        uint32_t opDone              : 1; 
        uint32_t pingRsp             : 1; 
        uint32_t rxCtrl              : 1; 
        uint32_t rxCtrlAck           : 1; 
        uint32_t rxNok               : 1; 
        uint32_t rxIgnored           : 1; 
        uint32_t rxEmpty             : 1; 
        uint32_t rxBufFull           : 1; 
        uint32_t rxOk                : 1; 
        uint32_t txCtrl              : 1; 
        uint32_t txCtrlAckAck        : 1; 
        uint32_t txRetrans           : 1; 
        uint32_t txAck               : 1; 
        uint32_t txDone              : 1; 
        uint32_t txCtrlAck           : 1; 
        uint32_t opError             : 1; 
        uint32_t rxfifo              : 1; 
        uint32_t txfifo              : 1; 
        uint32_t lossOfLock          : 1; 
        uint32_t lock                : 1; 
        uint32_t rfesoft0            : 1; 
        uint32_t rfesoft1            : 1; 
        uint32_t rfedone             : 1; 
        uint32_t mdmsoft0            : 1; 
        uint32_t mdmsoft1            : 1; 
        uint32_t mdmsoft2            : 1; 
        uint32_t mdmout              : 1; 
        uint32_t mdmin               : 1; 
        uint32_t mdmdone             : 1; 
        uint32_t systim0             : 1; 
        uint32_t systim1             : 1; 
        uint32_t systim2             : 1; 
    };
    uint32_t value;
};

typedef struct LRF_RegConfig_s {
    uint32_t configLen;
    uint32_t regConfig[];
} LRF_RegConfig;

typedef union
{
    struct {
        uint8_t fraction : 1;
        int8_t dBm : 7;
    };
    int8_t rawValue;
} LRF_TxPowerTable_Index;

typedef struct {
    LRF_TxPowerTable_Index power;            
    LRF_TxPowerTable_TempCoeff tempCoeff;    
    LRF_TxPowerTable_Value value;            
} LRF_TxPowerTable_Entry;

#define LRF_TxPowerEntry_INVALID_VALUE \
((LRF_TxPowerTable_Entry) {\
    .power = LRF_TxPower_None,\
    .tempCoeff = 0,\
    .value = LRF_TxPowerTable_INVALID_VALUE,\
})

typedef struct {
    uint32_t numEntries;
    LRF_TxPowerTable_Entry powerTable[];
} LRF_TxPowerTable;

typedef struct LRF_TxShape_s {
    struct {
        uint32_t      scale    :17;
        uint32_t      numCoeff :15;
    };
    uint8_t       coeff[];
} LRF_TxShape;

#define LRF_TRIM_NUM_VARIANTS 2
#define LRF_TRIM_NORMAL_BW    0
#define LRF_TRIM_HIGH_BW      1                 /* Revision >= 4 only */

#define LRF_TRIM_MIN_VERSION_FULL_FEATURES  4    /* Only AppTrims revision 4 and above has all features */

/* RCL-335: Some devices (State D) have an error in the programmed RSSI offset */
#define LRF_TRIM_VERSION_RSSIOFFSET_ISSUE 4     /* AppTrims revision with issue in rssiOffset field */
#define LRF_TRIM_LIMIT_RSSIOFFSET_ISSUE  (-4)   /* If rssiOffset is less or equal to this, apply correction */
#define LRF_TRIM_CORRECTION_RSSIOFFSET_ISSUE 5  /* Correction to apply to devices with wrong RSSI offset */

/* Definitions for trim */
typedef struct {
    uint32_t word[2];
} LRF_DoubleWord;

typedef union {
    struct {
        // Trim value for LRFDRFE:PA0.TRIM
        struct {    // length: 2B
            uint16_t trim           : 5;
            uint16_t zero           : 11;
        } pa0;
        // Trim value for LRFDRFE:ATSTREFH.IREFTRIM
        struct {    // length: 2B
            uint16_t zero0          : 10;
            uint16_t irefTrim       : 5;
            uint16_t zero1          : 1;
        } atstRefH;
    } fields;
    struct {
        uint16_t pa0;
        uint16_t atstRefH;
    };
    uint32_t data;
} LRF_Trim0;

typedef union {
    struct {
        // Trim value for LRFDRFE:LNA.TRIM
        struct {    // length: 2B
            uint16_t zero0          : 4;
            uint16_t trim           : 4;
            uint16_t zero1          : 8;
        } lna;
        // Trim value for LRFDRFE:IFAMPRFLDO.TRIM
        struct {    // length: 2B
            uint16_t zero           : 9;
            uint16_t trim           : 7;
        } ifampRfLdo;
        // Trim value for LRFDRFE:DIVLDO.VOUTTRIM
        struct {    // length: 2B
            uint16_t zero0          : 8;
            uint16_t voutTrim       : 7;
            uint16_t zero1          : 1;
        } divLdo;
        // Trim value for LRFDRFE:TDCLDO.VOUTTRIM
        struct {    // length: 2B
            uint16_t zero0          : 8;
            uint16_t voutTrim       : 7;
            uint16_t zero1          : 1;
        } tdcLdo;
    } fields;
    struct {
        uint16_t lna;
        uint16_t ifampRfLdo;
        uint16_t divLdo;
        uint16_t tdcLdo;
    };
    LRF_DoubleWord data;
} LRF_Trim1;

typedef union {
    struct {
        // Trim values for LRFDRFE:DCOLDO0
        struct {    // length: 2B
            uint16_t zero0          : 4;
            uint16_t firstTrim      : 4;
            uint16_t secondTrim     : 6;
            uint16_t zero1          : 2;
        } dcoLdo0;
        // Trim value for LRFDRFE:IFADCALDO.TRIMOUT
        struct {    // length: 2B
            uint16_t zero0          : 8;
            uint16_t trimout        : 6;
            uint16_t zero1          : 2;
        } ifadcAldo;
        // Trim value for LRFDRFE:IFADCDLDO.TRIMOUT
        struct {    // length: 2B
            uint16_t zero0          : 8;
            uint16_t trimout        : 6;
            uint16_t zero1          : 2;
        } ifadcDldo;
        // Trim value for LRFDRFE:DCO.TAILRESTRIM
        struct {    // length: 2B
            uint16_t zero0          : 3;
            uint16_t tailresTrim    : 4;
            uint16_t zero1          : 9;
        } dco;
    } fields;
    struct {
        uint16_t dcoLdo0;
        uint16_t ifadcAldo;
        uint16_t ifadcDldo;
        uint16_t dco;
    };
    LRF_DoubleWord data;
} LRF_Trim2;

typedef union {
    struct {
        // Trim value for LRFDRFE:IFADCQUANT.QUANTTHR
        struct {    // length: 2B
            uint16_t quantThr       : 3;
            uint16_t zero           : 13;
        } ifadcQuant;
        // Trim values for LRFDRFE:IFADC0
        struct {    // length: 2B
            uint16_t zero0          : 2;
            uint16_t aafcap         : 2;
            uint16_t int2Adj        : 4;
            uint16_t zero1          : 2;
            uint16_t ditheren       : 2;    /* Revision >= 4 only */
            uint16_t dithertrim     : 3;
            uint16_t zero2          : 1;
        } ifadc0;
        // Trim value for LRFDRFE:IFADC1.TRIM
        struct {    // length: 2B
            uint16_t zero0          : 9;
            uint16_t trim           : 6;
            uint16_t nrz            : 1;
        } ifadc1;
        // Trim values for LRFDRFE:IFADCLF
        struct {    // length: 2B
            uint16_t int3           : 4;
            uint16_t ff1            : 4;
            uint16_t ff2            : 4;
            uint16_t ff3            : 4;
        } ifadclf;
    } fields;
    struct {
        uint16_t ifadcQuant;
        uint16_t ifadc0;
        uint16_t ifadc1;
        uint16_t ifadclf;
    };
    LRF_DoubleWord data;
} LRF_Trim_Variant;

typedef struct
{
    uint16_t rtrimMinOffset : 2;
    uint16_t rtrimMaxOffset : 2;
    uint16_t divLdoMinOffset: 2;
    uint16_t divLdoMaxOffset: 2;
    uint16_t tdcLdoMinOffset: 2;
    uint16_t tdcLdoMaxOffset: 2;
    uint16_t tThrl          : 2;
    uint16_t tThrh          : 2;
} LRF_Trim_tempLdoRtrim;

typedef struct {
    int32_t rssiTcomp      : 4;
    int32_t magnTcomp      : 4;
    int32_t magnOffset     : 4;
    int32_t rfu            : 4;
    int32_t agcThrTcomp    : 4;
    int32_t agcThrOffset   : 4;
    int32_t lowGainOffset  : 4;
    int32_t highGainOffset : 4;
} LRF_Trim_tempRssiAgc;

typedef union {
    struct {
        struct {    // length: 4B
            LRF_Trim_tempLdoRtrim tempLdoRtrim;
            uint8_t hfxtPdError;
            uint8_t res;
         } lrfdrfeExtTrim1;                  /* Revision >= 4 only */
        // Trim values for synth divider 0
        LRF_Trim_tempRssiAgc lrfdrfeExtTrim0;
    } fields;
    struct {
        uint32_t lrfdrfeExtTrim1;
        uint32_t lrfdrfeExtTrim0;
    };
    uint32_t data;
} LRF_Trim3;

typedef union {
    struct {
        struct {    // length: 2B
                    // RSSI measured for front end 0 in production test.
                    // Value is read by RF Core FW during RF Core initialization
            uint16_t offset         : 8;
            uint16_t trimCompleteN  : 1;
            uint16_t zero           : 7;
        } fend0Rssi;
        // Trim values for synth divider 0
        struct {    // length: 2B
                    // Trim value for IQ mismatch compensation.
                    // Value is read by RF Core FW during RF Core initialization
            uint16_t iqmc           : 16;
        } syntDiv0;
        uint16_t res1;
        struct {
            uint8_t zero            : 4;
            uint8_t aafcap          : 4;
        } ifamprfldo[LRF_TRIM_NUM_VARIANTS];     /* Revision >= 4 only */
    } fields;
    struct {
        int8_t   rssiOffset;
        uint8_t  trimCompleteN;
        uint16_t demIQMC0;
        uint16_t res1;
        uint8_t  ifamprfldo[LRF_TRIM_NUM_VARIANTS];
    };
    uint32_t data;
} LRF_Trim4;

/* This definition is used instead of the definition from hw_fcfg.h to accommodate implementation
   and cut parameters not relevant to LRF */
typedef struct {
    uint8_t             revision;           /* Revision of appTrims */
    uint8_t             nToolsClientOffset;
    uint8_t             reserved[2];
    LRF_Trim0           trim0;
    LRF_Trim1           trim1;
    LRF_Trim2           trim2;
    LRF_Trim_Variant    trimVariant[LRF_TRIM_NUM_VARIANTS];
    LRF_Trim3           trim3;
    LRF_Trim4           trim4;
} LRF_TrimDef;

typedef struct LRF_SwConfig_s {
    int32_t           rxIntFrequency;         
    int32_t           rxFrequencyOffset;      
    int32_t           txFrequencyOffset;      
    uint32_t          modFrequencyDeviation;  
    const LRF_TxShape *txShape;               
    uint8_t           bwIndex;                
    uint8_t           bwIndexDither;          
} LRF_SwConfig;

typedef struct LRF_SwParam_s {
    const LRF_SwConfig      *swConfig;          
    const LRF_TxPowerTable  *txPowerTable;      
    const LRF_TrimDef       *trimDef;           
} LRF_SwParam;

typedef struct LRF_Config_s {
    const LRF_TOPsmImage    *pbeImage;       
    const LRF_TOPsmImage    *mceImage;       
    const LRF_TOPsmImage    *rfeImage;       
    const LRF_RegConfigList *regConfigList;  
} LRF_Config;

#define LRF_BASE_ADDR           0x40080000U
#define PBE_RAM_BASE_ADDR       0x40090000U
#define BUF_RAM_BASE_ADDR       0x40092000U
#define RXF_UNWRAPPED_BASE_ADDR 0x40093000U
#define TXF_UNWRAPPED_BASE_ADDR 0x40093800U
#define MCE_RAM_BASE_ADDR       0x40094000U
#define RFE_RAM_BASE_ADDR       0x40096000U
#define S2R_RAM_BASE_ADDR       0x40098000U
#define TOPSM_RAM_SZ            0x00001000U /* 4 KB */
#define MAX_REG_CONFIG_LEN      1024U        /* 1024 entries, using 4 KB */

#define LRF_TXPOWER_REFERENCE_TEMPERATURE 25    
#define LRF_TXPOWER_TEMPERATURE_SCALING  0x100 
extern const LRF_TxShape LRF_shapeBaseGfsk05;
extern const LRF_TxShape LRF_shapeBaseGfsk067;
extern const LRF_TxShape LRF_shapeBaseGfsk20;

static inline void LRF_sendHardStop(void)
{
    /* Send stop to PBE */
    /* This API is the same across PBE banks */
    HWREG(LRFDPBE_BASE + LRFDPBE_O_API) = PBE_GENERIC_REGDEF_API_OP_STOP;
}

static inline void LRF_sendGracefulStop(void)
{
    /* Send stop to PBE */
    /* This API is the same across PBE banks */
    HWREG(LRFDPBE_BASE + LRFDPBE_O_API) = PBE_GENERIC_REGDEF_API_OP_EOPSTOP;
}

static inline void LRF_hardStop(void)
{
    /* LRF does not need to do anything special after hard stop is sent */
}

static inline uint32_t LRF_getTxFifoWritable(void)
{
    return HWREG_READ_LRF(LRFDPBE_BASE + LRFDPBE_O_TXFWRITABLE);
}

void LRF_programTemperatureCompensatedTxPower(void);

LRF_TxPowerResult LRF_programTxPower(LRF_TxPowerTable_Index powerLevel);

#endif