Instance: FPE
Component: FPE
Base address: 0xE000EF34
Register Name |
Type |
Register Width (Bits) |
Register Reset |
Address Offset |
Physical Address |
32 |
0xC000 0000 |
0x0000 0004 |
0xE000 EF38 |
||
32 |
0x0000 0000 |
0x0000 0008 |
0xE000 EF3C |
||
32 |
0x0000 0000 |
0x0000 000C |
0xE000 EF40 |
||
32 |
0x1011 0021 |
0x0000 0010 |
0xE000 EF44 |
||
32 |
0x1100 0011 |
0x0000 0014 |
0xE000 EF48 |
||
32 |
0x0000 0040 |
0x0000 0018 |
0xE000 EF4C |
Address Offset | 0x0000 0004 | ||
Physical Address | 0xE000 EF38 | Instance | 0xE000 EF38 |
Description | Holds control data for the Floating-point extension | ||
Type |
Bits | Field Name | Description | Type | Reset | ||
31 | ASPEN | When this bit is set to 1, execution of a floating-point instruction sets the CONTROL.FPCA bit to 1 | RW | 1 | ||
30 | LSPEN | Enables lazy context save of floating-point state | RW | 1 | ||
29 | LSPENS | This bit controls whether the LSPEN bit is writeable from the Non-secure state | RW | 0 | ||
28 | CLRONRET | Clear floating-point caller saved registers on exception return | RW | 0 | ||
27 | CLRONRETS | This bit controls whether the CLRONRET bit is writeable from the Non-secure state | RW | 0 | ||
26 | TS | Treat floating-point registers as Secure enable | RW | 0 | ||
25:11 | RES0 | Reserved, RES0 | RO | 0b000 0000 0000 0000 | ||
10 | UFRDY | Indicates whether the software executing when the PE allocated the floating-point stack frame was able to set the UsageFault exception to pending | RW | 0 | ||
9 | SPLIMVIOL | This bit is banked between the Security states and indicates whether the floating-point context violates the stack pointer limit that was active when lazy state preservation was activated. SPLIMVIOL modifies the lazy floating-point state preservation behavior | RW | 0 | ||
8 | MONRDY | Indicates whether the software executing when the PE allocated the floating-point stack frame was able to set the DebugMonitor exception to pending | RW | 0 | ||
7 | SFRDY | Indicates whether the software executing when the PE allocated the floating-point stack frame was able to set the SecureFault exception to pending. This bit is only present in the Secure version of the register, and behaves as RAZ/WI when accessed from the Non-secure state | RW | 0 | ||
6 | BFRDY | Indicates whether the software executing when the PE allocated the floating-point stack frame was able to set the BusFault exception to pending | RW | 0 | ||
5 | MMRDY | Indicates whether the software executing when the PE allocated the floating-point stack frame was able to set the MemManage exception to pending | RW | 0 | ||
4 | HFRDY | Indicates whether the software executing when the PE allocated the floating-point stack frame was able to set the HardFault exception to pending | RW | 0 | ||
3 | THREAD | Indicates the PE mode when it allocated the floating-point stack frame | RW | 0 | ||
2 | S | Security status of the floating-point context. This bit is only present in the Secure version of the register, and behaves as RAZ/WI when accessed from the Non-secure state. This bit is updated whenever lazy state preservation is activated, or when a floating-point instruction is executed | RW | 0 | ||
1 | USER | Indicates the privilege level of the software executing when the PE allocated the floating-point stack frame | RW | 0 | ||
0 | LSPACT | Indicates whether lazy preservation of the floating-point state is active | RW | 0 |
Address Offset | 0x0000 0008 | ||
Physical Address | 0xE000 EF3C | Instance | 0xE000 EF3C |
Description | Holds the location of the unpopulated floating-point register space allocated on an exception stack frame | ||
Type |
Bits | Field Name | Description | Type | Reset | ||
31:3 | ADDRESS | The location of the unpopulated floating-point register space allocated on an exception stack frame | RW | 0b0 0000 0000 0000 0000 0000 0000 0000 | ||
2:0 | RES0 | Reserved, RES0 | RO | 0b000 |
Address Offset | 0x0000 000C | ||
Physical Address | 0xE000 EF40 | Instance | 0xE000 EF40 |
Description | Holds the default values for the floating-point status control data that the PE assigns to the FPSCR when it creates a new floating-point context | ||
Type |
Bits | Field Name | Description | Type | Reset | ||
31:27 | RES0 | Reserved, RES0 | RO | 0b0 0000 | ||
26 | AHP | Default value for FPSCR.AHP | RW | 0 | ||
25 | DN | Default value for FPSCR.DN | RW | 0 | ||
24 | FZ | Default value for FPSCR.FZ | RW | 0 | ||
23:22 | RMode | Default value for FPSCR.RMode | RW | 0b00 | ||
21:0 | RES0_1 | Reserved, RES0 | RO | 0b00 0000 0000 0000 0000 0000 |
Address Offset | 0x0000 0010 | ||
Physical Address | 0xE000 EF44 | Instance | 0xE000 EF44 |
Description | Describes the features provided by the Floating-point Extension | ||
Type |
Bits | Field Name | Description | Type | Reset | ||
31:28 | FPRound | Indicates the rounding modes supported by the FP Extension | RO | 0x1 | ||
27:24 | RES0 | Reserved, RES0 | RO | 0x0 | ||
23:20 | FPSqrt | Indicates the support for FP square root operations | RO | 0x1 | ||
19:16 | FPDivide | Indicates the support for FP divide operations | RO | 0x1 | ||
15:12 | RES0_1 | Reserved, RES0 | RO | 0x0 | ||
11:8 | FPDP | Indicates support for FP double-precision operations | RO | 0x0 | ||
7:4 | FPSP | Indicates support for FP single-precision operations | RO | 0x2 | ||
3:0 | SIMDReg | Indicates size of FP register file | RO | 0x1 |
Address Offset | 0x0000 0014 | ||
Physical Address | 0xE000 EF48 | Instance | 0xE000 EF48 |
Description | Describes the features provided by the Floating-point Extension | ||
Type |
Bits | Field Name | Description | Type | Reset | ||
31:28 | FMAC | Indicates whether the FP Extension implements the fused multiply accumulate instructions | RO | 0x1 | ||
27:24 | FPHP | Indicates whether the FP Extension implements half-precision FP conversion instructions | RO | 0x1 | ||
23:8 | RES0 | Reserved, RES0 | RO | 0x0000 | ||
7:4 | FPDNaN | Indicates whether the FP hardware implementation supports NaN propagation | RO | 0x1 | ||
3:0 | FPFtZ | Indicates whether subnormals are always flushed-to-zero | RO | 0x1 |
Address Offset | 0x0000 0018 | ||
Physical Address | 0xE000 EF4C | Instance | 0xE000 EF4C |
Description | Describes the features provided by the Floating-point Extension | ||
Type |
Bits | Field Name | Description | Type | Reset | ||
31:8 | RES0 | Reserved, RES0 | RO | 0x00 0000 | ||
7:4 | FPMisc | Indicates support for miscellaneous FP features | RO | 0x4 | ||
3:0 | RES0_1 | Reserved, RES0 | RO | 0x0 |
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