Instance: NVIC
Component: NVIC
Base address: 0xE000E000
|
Register Name |
Type |
Register Width (Bits) |
Register Reset |
Address Offset |
Physical Address |
|
32 |
0x0000 0000 |
0x0000 0100 |
0xE000 E100 |
||
|
32 |
0x0000 0000 |
0x0000 0180 |
0xE000 E180 |
||
|
32 |
0x0000 0000 |
0x0000 0200 |
0xE000 E200 |
||
|
32 |
0x0000 0000 |
0x0000 0280 |
0xE000 E280 |
||
|
32 |
0x0000 0000 |
0x0000 0400 |
0xE000 E400 |
||
|
32 |
0x0000 0000 |
0x0000 0404 |
0xE000 E404 |
||
|
32 |
0x0000 0000 |
0x0000 0408 |
0xE000 E408 |
||
|
32 |
0x0000 0000 |
0x0000 040C |
0xE000 E40C |
||
|
32 |
0x0000 0000 |
0x0000 0410 |
0xE000 E410 |
||
|
32 |
0x0000 0000 |
0x0000 0414 |
0xE000 E414 |
||
|
32 |
0x0000 0000 |
0x0000 0418 |
0xE000 E418 |
||
|
32 |
0x0000 0000 |
0x0000 041C |
0xE000 E41C |
| Address Offset | 0x0000 0100 | ||
| Physical Address | 0xE000 E100 | Instance | 0xE000 E100 |
| Description | Interrupt Set-Enable Register Use the Interrupt Set-Enable Register to enable interrupts and determine which interrupts are currently enabled. |
||
| Type | |||
| Bits | Field Name | Description | Type | Reset | ||
| 31:0 | SETENA | Writing 0 to a SETENA bit has no effect, writing 1 to a bit enables the corresponding interrupt. Reading the bit returns its current enable state. Reset clears the SETENA fields. | RW | 0x0000 0000 | ||
| Address Offset | 0x0000 0180 | ||
| Physical Address | 0xE000 E180 | Instance | 0xE000 E180 |
| Description | Interrupt Clear-Enable Register Use the Interrupt Clear-Enable Registers to disable interrupts and determine which interrupts are currently enabled. |
||
| Type | |||
| Bits | Field Name | Description | Type | Reset | ||
| 31:0 | CLRENA | Writing 0 to a CLRENA bit has no effect, writing 1 to a bit disables the corresponding interrupt. Reading the bit returns its current enable state. Reset clears the CLRENA field. | RW | 0x0000 0000 | ||
| Address Offset | 0x0000 0200 | ||
| Physical Address | 0xE000 E200 | Instance | 0xE000 E200 |
| Description | Interrupt Set-Pending Register Use the Interrupt Set-Pending Register to force interrupts into the pending state and determine which interrupts are currently pending |
||
| Type | |||
| Bits | Field Name | Description | Type | Reset | ||
| 31:0 | SETPEND | Interrupt set-pending bits for a: Write: 1 = pend interrupt 0 = no effect; Read: 1 = interrupt is pending 0 = interrupt is not pending. | RW | 0x0000 0000 | ||
| Address Offset | 0x0000 0280 | ||
| Physical Address | 0xE000 E280 | Instance | 0xE000 E280 |
| Description | Interrupt Clear-Pending Register Use the Interrupt Clear-Pending Register to clear pending interrupts and determine which interrupts are currently pending. |
||
| Type | |||
| Bits | Field Name | Description | Type | Reset | ||
| 31:0 | CLRPEND | Interrupt clear-pending bits: Write: 1 = clear interrupt pending bit, 0 = no effect; Read: 1 = interrupt is pending 0 = interrupt is not pending. | RW | 0x0000 0000 | ||
| Address Offset | 0x0000 0400 | ||
| Physical Address | 0xE000 E400 | Instance | 0xE000 E400 |
| Description | Interrupt Priority Register 0 Use the Interrupt Priority Registers to assign a priority from 0 to 3 to each of the available interrupts. 0 is the highest priority, and 3 is the lowest. |
||
| Type | |||
| Bits | Field Name | Description | Type | Reset | ||
| 31:30 | IP_3 | Priority of interrupt 3 | RW | 0b00 | ||
| 29:24 | RESERVED24 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 23:22 | IP_2 | Priority of interrupt 2 | RW | 0b00 | ||
| 21:16 | RESERVED16 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 15:14 | IP_1 | Priority of interrupt 1 | RW | 0b00 | ||
| 13:8 | RESERVED8 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 7:6 | IP_0 | Priority of interrupt 0 | RW | 0b00 | ||
| 5:0 | RESERVED0 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| Address Offset | 0x0000 0404 | ||
| Physical Address | 0xE000 E404 | Instance | 0xE000 E404 |
| Description | Interrupt Priority Register 1 Use the Interrupt Priority Registers to assign a priority from 0 to 3 to each of the available interrupts. 0 is the highest priority, and 3 is the lowest. |
||
| Type | |||
| Bits | Field Name | Description | Type | Reset | ||
| 31:30 | IP_7 | Priority of interrupt 7 | RW | 0b00 | ||
| 29:24 | RESERVED24 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 23:22 | IP_6 | Priority of interrupt 6 | RW | 0b00 | ||
| 21:16 | RESERVED16 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 15:14 | IP_5 | Priority of interrupt 5 | RW | 0b00 | ||
| 13:8 | RESERVED8 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 7:6 | IP_4 | Priority of interrupt 4 | RW | 0b00 | ||
| 5:0 | RESERVED0 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| Address Offset | 0x0000 0408 | ||
| Physical Address | 0xE000 E408 | Instance | 0xE000 E408 |
| Description | Interrupt Priority Register 2 Use the Interrupt Priority Registers to assign a priority from 0 to 3 to each of the available interrupts. 0 is the highest priority, and 3 is the lowest. |
||
| Type | |||
| Bits | Field Name | Description | Type | Reset | ||
| 31:30 | IP_11 | Priority of interrupt 11 | RW | 0b00 | ||
| 29:24 | RESERVED24 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 23:22 | IP_10 | Priority of interrupt 10 | RW | 0b00 | ||
| 21:16 | RESERVED16 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 15:14 | IP_9 | Priority of interrupt 9 | RW | 0b00 | ||
| 13:8 | RESERVED8 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 7:6 | IP_8 | Priority of interrupt 8 | RW | 0b00 | ||
| 5:0 | RESERVED0 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| Address Offset | 0x0000 040C | ||
| Physical Address | 0xE000 E40C | Instance | 0xE000 E40C |
| Description | Interrupt Priority Register 3 Use the Interrupt Priority Registers to assign a priority from 0 to 3 to each of the available interrupts. 0 is the highest priority, and 3 is the lowest. |
||
| Type | |||
| Bits | Field Name | Description | Type | Reset | ||
| 31:30 | IP_15 | Priority of interrupt 15 | RW | 0b00 | ||
| 29:24 | RESERVED24 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 23:22 | IP_14 | Priority of interrupt 14 | RW | 0b00 | ||
| 21:16 | RESERVED16 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 15:14 | IP_13 | Priority of interrupt 13 | RW | 0b00 | ||
| 13:8 | RESERVED8 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 7:6 | IP_12 | Priority of interrupt 12 | RW | 0b00 | ||
| 5:0 | RESERVED0 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| Address Offset | 0x0000 0410 | ||
| Physical Address | 0xE000 E410 | Instance | 0xE000 E410 |
| Description | Interrupt Priority Register 4 Use the Interrupt Priority Registers to assign a priority from 0 to 3 to each of the available interrupts. 0 is the highest priority, and 3 is the lowest. |
||
| Type | |||
| Bits | Field Name | Description | Type | Reset | ||
| 31:30 | IP_19 | Priority of interrupt 19 | RW | 0b00 | ||
| 29:24 | RESERVED24 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 23:22 | IP_18 | Priority of interrupt 18 | RW | 0b00 | ||
| 21:16 | RESERVED16 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 15:14 | IP_17 | Priority of interrupt 17 | RW | 0b00 | ||
| 13:8 | RESERVED8 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 7:6 | IP_16 | Priority of interrupt 16 | RW | 0b00 | ||
| 5:0 | RESERVED0 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| Address Offset | 0x0000 0414 | ||
| Physical Address | 0xE000 E414 | Instance | 0xE000 E414 |
| Description | Interrupt Priority Register 5 Use the Interrupt Priority Registers to assign a priority from 0 to 3 to each of the available interrupts. 0 is the highest priority, and 3 is the lowest. |
||
| Type | |||
| Bits | Field Name | Description | Type | Reset | ||
| 31:30 | IP_23 | Priority of interrupt 23 | RW | 0b00 | ||
| 29:24 | RESERVED24 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 23:22 | IP_22 | Priority of interrupt 22 | RW | 0b00 | ||
| 21:16 | RESERVED16 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 15:14 | IP_21 | Priority of interrupt 21 | RW | 0b00 | ||
| 13:8 | RESERVED8 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 7:6 | IP_20 | Priority of interrupt 20 | RW | 0b00 | ||
| 5:0 | RESERVED0 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| Address Offset | 0x0000 0418 | ||
| Physical Address | 0xE000 E418 | Instance | 0xE000 E418 |
| Description | Interrupt Priority Register 6 Use the Interrupt Priority Registers to assign a priority from 0 to 3 to each of the available interrupts. 0 is the highest priority, and 3 is the lowest. |
||
| Type | |||
| Bits | Field Name | Description | Type | Reset | ||
| 31:30 | IP_27 | Priority of interrupt 27 | RW | 0b00 | ||
| 29:24 | RESERVED24 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 23:22 | IP_26 | Priority of interrupt 26 | RW | 0b00 | ||
| 21:16 | RESERVED16 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 15:14 | IP_25 | Priority of interrupt 25 | RW | 0b00 | ||
| 13:8 | RESERVED8 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 7:6 | IP_24 | Priority of interrupt 24 | RW | 0b00 | ||
| 5:0 | RESERVED0 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| Address Offset | 0x0000 041C | ||
| Physical Address | 0xE000 E41C | Instance | 0xE000 E41C |
| Description | Interrupt Priority Register 7 Use the Interrupt Priority Registers to assign a priority from 0 to 3 to each of the available interrupts. 0 is the highest priority, and 3 is the lowest. |
||
| Type | |||
| Bits | Field Name | Description | Type | Reset | ||
| 31:30 | IP_31 | Priority of interrupt 31 | RW | 0b00 | ||
| 29:24 | RESERVED24 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 23:22 | IP_30 | Priority of interrupt 30 | RW | 0b00 | ||
| 21:16 | RESERVED16 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 15:14 | IP_29 | Priority of interrupt 29 | RW | 0b00 | ||
| 13:8 | RESERVED8 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
| 7:6 | IP_28 | Priority of interrupt 28 | RW | 0b00 | ||
| 5:0 | RESERVED0 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b00 0000 | ||
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