Terms and Acronyms

TI 15.4-Stack Terms and Acronyms

AES
Advanced Encryption Standard

A fast and secure form of encryption.

AES-CCM
AES Counter with CBC-MAC.

It is an authenticated encryption algorithm

AES-CMAC

AES Cipher-based Message Authentication Code.

CAP
Contention Assessment Period

Part of the beacon mode superframe. During CAP a slotted CSMA-CA mechanism is used ad any node can transmit a beacon.

CBC-MAC

Cipher Block Chaining Message Authentication Code.

CBKE

Certificate-Based Key Establishment.

CFP
Contention Free Period

Optional part of the beacon mode superframe. If the network requires certain nodes to transmit frequently, they can be assigned a slot in the CFP where they are the only node to transmit.

CLI

Command Line Interface.

CSMA-CA
Carrier Sense Multiple Access with Collision Avoidance

This prevents nodes from talking while the air is occupied. Used in all bands except 868MHz.

CSRK

Connection Signature Resolving Key.

DFE

Direct Frame Exchange.

DH1CF
Direct Hash Channel Function

This is used to produce a psuedo-random channel sequence for frequency hopping devices.

ECDH

Elliptic Curve Diffie-Hellman.

ECHDE

Elliptic Curve Diffie-Hellman Ephemeral.

ECJPAKE

Elliptic Curve J-PAKE.

FAN

Field Area Network.

FFD

Full Functionality Device.

GUI

Graphical User Interface.

HMAC

Hash-based message authentication code.

IDE

Integrated Development Environment.

IEEE
Institute of Electrical and Electronics Engineers

An organization composed of engineers, scientists, and students. Develops standards for the computer and electronics industry.

IRK

Identity Resolving Key.

J-PAKE

Password Authenticated Key Exchange by Juggling.

LBT
Listen Before Talk

This prevents nodes from talking while the air is occupied. Used in 868MHz band.

MAC

Medium Access Control.

MIC

Message Integrity Code.

MITM

Man In The Middle.

MMO

Matyas-Meyer-Oseas.

OOB

Out-Of-Box.

OSI

Open Systems Interconnection model.

PAN

Personal Area Network.

PBKDF2

Password-Based Key Derivation Function 2.

PHY
Physical layer

The physical layer is the lowest layer of the TI 15.4-Stack It configures the physical parameters of the radio transmission and reception. It determines how a bit (and its value) are represented over the air.

PIB

Personal-Area-Network Information Bases.

RAM

Random Access Memory.

RCFG
ROM Configuration

TI-RTOS in ROM Configuration Table

RNG

Random Number Generator.

RF

Radio Frequency.

RFD

Reduced Functionality Device.

SKKE

Symmetric-Key Key Establishment.

SNV
Simple Non Volatile

An abstraction layer used by the TI 15.4-Stack for reading and writing to non volatile memory. This region can also be used by the user.

SUN

Smart Utility Network.

TRNG

True Random Number Generator.

Sensor Controller Terms and Acronyms

SC
Sensor Controller

A dedicated 16-bit CPU core on CC13xx and CC26xx devices, located in the auxiliary (AUX) power/clock domain. It can perform simple background tasks autonomously and independently of the System CPU and the MCU domain power states.

SCS
Sensor Controller Studio

A stand-alone IDE used to write, test and debug code for the Sensor Controller.

TI-RTOS7 Terms and Acronyms

HWI
Hardware Interrupts

A TI-RTOS7 hardware interrupt.

Idle Task

A TI-RTOS7 default task that is executes when no other higher priority thread needs to run.

ROV
Runtime Object View

A TI-RTOS7 kernel plugin for CCS and IAR to view a target’s instrumentation data.

RTC
Real-Time Clock

An accurate computer clock which keeps track of the current time.

RTOS
Real Time Operating System

An operating system intended to serve applications with real-time requirements.

SWI
Software Interrupts

A TI-RTOS7 software interrupt.

TI-RTOS7
Texas Instruments Real Time Operating System

An RTOS developed by TI for TI microcontrollers.

Zero-Latency Interrupts

An interrupt that will not be routed through the TI-RTOS kernel’s Hwi dispatcher. For more information, see the Hwi module documentation in the TI-RTOS7 Kernel (SYS/BIOS) User’s Guide.

Over-the-Air Download (OAD) Terms and Acronyms

BIM
Boot Image Manager

A bootloader that runs after the device’s ROM startup code. The BIM is responsible for analyzing the image header of all images and determining the most suitable image to run. Once the BIM has found the proper image, it will jump to it’s program entry.

CRC
Cyclic Redundancy Check

An error-detecting code used to check the integrity of blocks of data.

ECDSA
Elliptic Curve Digital Signature Algorithm

A variant of the Digital Signature Algorithm (DSA) which uses elliptic curve cryptography.

Factory Image

The factory image is a “golden” image that resides in external flash as a fail-safe mechanism.

HIB
Halt In Boot

A mechanism in CC13xx or CC26xx to ensure that the external emulator can take control of the device before it executes any application code.

OAD
Over-the-Air Download

The process of performing a device firmware update over the air.

OAD Target

The device whose firmware is being upgraded over the air. This is assumed to be a CC26xx or CC13xx device running the TI protocol-specific transport for OAD.

OAD Distributor

The device responsible for accepting an OAD enabled image from the compiler and transferring it over the air to the OAD Target.

General Terms and Acronyms

CCFG
Customer Configuration
Customer Configuration Area

Customer Configuration is set by the application and contains configuration parameters for the ROM boot code, device hardware, and device firmware. It contains lock-bits on the last page of flash. You can read more in the Customer Configuration section in the CC13x2 CC26x2 SimpleLink Wireless MCU Technical Reference Manual.

CCS
Code Composer Studio

An integrated development environment to develop applications for Texas Instruments embedded processors. Download: Code Composer Studio

cJTAG
compact JTAG

Class 4 IEEE 1149.7: Standard for Reduced-pin and Enhanced-functionality Test Access Port and Boundary-scan Architecture. This is known by acronym cJTAG.

GCC
GNU Compiler Collection

A compiler system produced by the GNU Project, which support various programming languages such as C and C++.

GPRAM
General purpose RAM

This memory area is used for the cache per default, but can be configured to be used as RAM.

IAR

Refers to IAR Systems’ IAR Embedded Workbench, which is an integrated development environment used for building and debugging embedded applications.

JTAG
Joint Test Action Group

IEEE standard 1149.1: Standard Test Access Port and Boundary Scan Architecture Test Access Port (TAP). This standard is known by the acronym JTAG.

MCU
Microcontroller Unit

A small computer on a single integrated circuit.

NVS
Non-Volatile Storage

Storage of data in non-volatile memory (NVM). NVM retains saved data during power cycles. In the context of CC13xx and CC26xx devices, NVM either refers to the internal flash or some external flash.

ROM
Read-only Memory

Type of non-volatile memory used in computers. Once data is written to ROM, the data cannot be removed and can only be read.

RTSC
Real Time Software Components

A toolset for creating reusable code, used by TI-RTOS. See RTSC and RTSC-Pedia.

SysConfig
System Configuration Tool

SysConfig is a graphical interface for configuring software projects. Configuration files, C source files and header files are generated based on the parameters configured in the SysConfig dashboard. See Get started with SysConfig.

TI-CLANG
TI Arm Clang Compiler Toolchain

The TI Arm Clang Compiler Toolchain (tiarmclang) is the next generation TI Arm compiler, replacing the previous TI Arm Compiler Tools (armcl). You can use the tiarmclang compiler toolchain to build applications from C, C++, and/or assembly source files to be loaded and run on one of the Cortex-M or Cortex-R Arm processors that are supported by the toolchain. You can find more information here.

VIMS
Versatile Instruction Memory System

A system control module that handles access to the device memory areas from the CPU and system bus. You can read more in the CC13x2 CC26x2 SimpleLink Wireless MCU Technical Reference Manual.

.bss

Block started by symbol. This memory section usually contains uninitialized variables including the task stacks.