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Go to the documentation of this file. 33 #ifndef __HW_CPU_DWT_H__ 34 #define __HW_CPU_DWT_H__ 43 #define CPU_DWT_O_CTRL 0x00000000 46 #define CPU_DWT_O_CYCCNT 0x00000004 49 #define CPU_DWT_O_CPICNT 0x00000008 52 #define CPU_DWT_O_EXCCNT 0x0000000C 55 #define CPU_DWT_O_SLEEPCNT 0x00000010 58 #define CPU_DWT_O_LSUCNT 0x00000014 61 #define CPU_DWT_O_FOLDCNT 0x00000018 64 #define CPU_DWT_O_PCSR 0x0000001C 67 #define CPU_DWT_O_COMP0 0x00000020 70 #define CPU_DWT_O_MASK0 0x00000024 73 #define CPU_DWT_O_FUNCTION0 0x00000028 76 #define CPU_DWT_O_COMP1 0x00000030 79 #define CPU_DWT_O_MASK1 0x00000034 82 #define CPU_DWT_O_FUNCTION1 0x00000038 85 #define CPU_DWT_O_COMP2 0x00000040 88 #define CPU_DWT_O_MASK2 0x00000044 91 #define CPU_DWT_O_FUNCTION2 0x00000048 94 #define CPU_DWT_O_COMP3 0x00000050 97 #define CPU_DWT_O_MASK3 0x00000054 100 #define CPU_DWT_O_FUNCTION3 0x00000058 103 #define CPU_DWT_O_LAR 0x00000FB0 114 #define CPU_DWT_CTRL_NUMCOMP 0xF0000000 115 #define CPU_DWT_CTRL_NUMCOMP_BITN 28 116 #define CPU_DWT_CTRL_NUMCOMP_M 0xF0000000 117 #define CPU_DWT_CTRL_NUMCOMP_S 28 122 #define CPU_DWT_CTRL_NOCYCCNT 0x02000000 123 #define CPU_DWT_CTRL_NOCYCCNT_BITN 25 124 #define CPU_DWT_CTRL_NOCYCCNT_M 0x02000000 125 #define CPU_DWT_CTRL_NOCYCCNT_S 25 130 #define CPU_DWT_CTRL_NOPRFCNT 0x01000000 131 #define CPU_DWT_CTRL_NOPRFCNT_BITN 24 132 #define CPU_DWT_CTRL_NOPRFCNT_M 0x01000000 133 #define CPU_DWT_CTRL_NOPRFCNT_S 24 143 #define CPU_DWT_CTRL_CYCEVTENA 0x00400000 144 #define CPU_DWT_CTRL_CYCEVTENA_BITN 22 145 #define CPU_DWT_CTRL_CYCEVTENA_M 0x00400000 146 #define CPU_DWT_CTRL_CYCEVTENA_S 22 157 #define CPU_DWT_CTRL_FOLDEVTENA 0x00200000 158 #define CPU_DWT_CTRL_FOLDEVTENA_BITN 21 159 #define CPU_DWT_CTRL_FOLDEVTENA_M 0x00200000 160 #define CPU_DWT_CTRL_FOLDEVTENA_S 21 170 #define CPU_DWT_CTRL_LSUEVTENA 0x00100000 171 #define CPU_DWT_CTRL_LSUEVTENA_BITN 20 172 #define CPU_DWT_CTRL_LSUEVTENA_M 0x00100000 173 #define CPU_DWT_CTRL_LSUEVTENA_S 20 182 #define CPU_DWT_CTRL_SLEEPEVTENA 0x00080000 183 #define CPU_DWT_CTRL_SLEEPEVTENA_BITN 19 184 #define CPU_DWT_CTRL_SLEEPEVTENA_M 0x00080000 185 #define CPU_DWT_CTRL_SLEEPEVTENA_S 19 194 #define CPU_DWT_CTRL_EXCEVTENA 0x00040000 195 #define CPU_DWT_CTRL_EXCEVTENA_BITN 18 196 #define CPU_DWT_CTRL_EXCEVTENA_M 0x00040000 197 #define CPU_DWT_CTRL_EXCEVTENA_S 18 206 #define CPU_DWT_CTRL_CPIEVTENA 0x00020000 207 #define CPU_DWT_CTRL_CPIEVTENA_BITN 17 208 #define CPU_DWT_CTRL_CPIEVTENA_M 0x00020000 209 #define CPU_DWT_CTRL_CPIEVTENA_S 17 217 #define CPU_DWT_CTRL_EXCTRCENA 0x00010000 218 #define CPU_DWT_CTRL_EXCTRCENA_BITN 16 219 #define CPU_DWT_CTRL_EXCTRCENA_M 0x00010000 220 #define CPU_DWT_CTRL_EXCTRCENA_S 16 230 #define CPU_DWT_CTRL_PCSAMPLEENA 0x00001000 231 #define CPU_DWT_CTRL_PCSAMPLEENA_BITN 12 232 #define CPU_DWT_CTRL_PCSAMPLEENA_M 0x00001000 233 #define CPU_DWT_CTRL_PCSAMPLEENA_S 12 246 #define CPU_DWT_CTRL_SYNCTAP_W 2 247 #define CPU_DWT_CTRL_SYNCTAP_M 0x00000C00 248 #define CPU_DWT_CTRL_SYNCTAP_S 10 249 #define CPU_DWT_CTRL_SYNCTAP_BIT28 0x00000C00 250 #define CPU_DWT_CTRL_SYNCTAP_BIT26 0x00000800 251 #define CPU_DWT_CTRL_SYNCTAP_BIT24 0x00000400 252 #define CPU_DWT_CTRL_SYNCTAP_DIS 0x00000000 264 #define CPU_DWT_CTRL_CYCTAP 0x00000200 265 #define CPU_DWT_CTRL_CYCTAP_BITN 9 266 #define CPU_DWT_CTRL_CYCTAP_M 0x00000200 267 #define CPU_DWT_CTRL_CYCTAP_S 9 268 #define CPU_DWT_CTRL_CYCTAP_BIT10 0x00000200 269 #define CPU_DWT_CTRL_CYCTAP_BIT6 0x00000000 277 #define CPU_DWT_CTRL_POSTCNT_W 4 278 #define CPU_DWT_CTRL_POSTCNT_M 0x000001E0 279 #define CPU_DWT_CTRL_POSTCNT_S 5 288 #define CPU_DWT_CTRL_POSTPRESET_W 4 289 #define CPU_DWT_CTRL_POSTPRESET_M 0x0000001E 290 #define CPU_DWT_CTRL_POSTPRESET_S 1 296 #define CPU_DWT_CTRL_CYCCNTENA 0x00000001 297 #define CPU_DWT_CTRL_CYCCNTENA_BITN 0 298 #define CPU_DWT_CTRL_CYCCNTENA_M 0x00000001 299 #define CPU_DWT_CTRL_CYCCNTENA_S 0 314 #define CPU_DWT_CYCCNT_CYCCNT_W 32 315 #define CPU_DWT_CYCCNT_CYCCNT_M 0xFFFFFFFF 316 #define CPU_DWT_CYCCNT_CYCCNT_S 0 331 #define CPU_DWT_CPICNT_CPICNT_W 8 332 #define CPU_DWT_CPICNT_CPICNT_M 0x000000FF 333 #define CPU_DWT_CPICNT_CPICNT_S 0 346 #define CPU_DWT_EXCCNT_EXCCNT_W 8 347 #define CPU_DWT_EXCCNT_EXCCNT_M 0x000000FF 348 #define CPU_DWT_EXCCNT_EXCCNT_S 0 364 #define CPU_DWT_SLEEPCNT_SLEEPCNT_W 8 365 #define CPU_DWT_SLEEPCNT_SLEEPCNT_M 0x000000FF 366 #define CPU_DWT_SLEEPCNT_SLEEPCNT_S 0 382 #define CPU_DWT_LSUCNT_LSUCNT_W 8 383 #define CPU_DWT_LSUCNT_LSUCNT_M 0x000000FF 384 #define CPU_DWT_LSUCNT_LSUCNT_S 0 395 #define CPU_DWT_FOLDCNT_FOLDCNT_W 8 396 #define CPU_DWT_FOLDCNT_FOLDCNT_M 0x000000FF 397 #define CPU_DWT_FOLDCNT_FOLDCNT_S 0 407 #define CPU_DWT_PCSR_EIASAMPLE_W 32 408 #define CPU_DWT_PCSR_EIASAMPLE_M 0xFFFFFFFF 409 #define CPU_DWT_PCSR_EIASAMPLE_S 0 421 #define CPU_DWT_COMP0_COMP_W 32 422 #define CPU_DWT_COMP0_COMP_M 0xFFFFFFFF 423 #define CPU_DWT_COMP0_COMP_S 0 438 #define CPU_DWT_MASK0_MASK_W 4 439 #define CPU_DWT_MASK0_MASK_M 0x0000000F 440 #define CPU_DWT_MASK0_MASK_S 0 452 #define CPU_DWT_FUNCTION0_MATCHED 0x01000000 453 #define CPU_DWT_FUNCTION0_MATCHED_BITN 24 454 #define CPU_DWT_FUNCTION0_MATCHED_M 0x01000000 455 #define CPU_DWT_FUNCTION0_MATCHED_S 24 461 #define CPU_DWT_FUNCTION0_CYCMATCH 0x00000080 462 #define CPU_DWT_FUNCTION0_CYCMATCH_BITN 7 463 #define CPU_DWT_FUNCTION0_CYCMATCH_M 0x00000080 464 #define CPU_DWT_FUNCTION0_CYCMATCH_S 7 471 #define CPU_DWT_FUNCTION0_EMITRANGE 0x00000020 472 #define CPU_DWT_FUNCTION0_EMITRANGE_BITN 5 473 #define CPU_DWT_FUNCTION0_EMITRANGE_M 0x00000020 474 #define CPU_DWT_FUNCTION0_EMITRANGE_S 5 511 #define CPU_DWT_FUNCTION0_FUNCTION_W 4 512 #define CPU_DWT_FUNCTION0_FUNCTION_M 0x0000000F 513 #define CPU_DWT_FUNCTION0_FUNCTION_S 0 526 #define CPU_DWT_COMP1_COMP_W 32 527 #define CPU_DWT_COMP1_COMP_M 0xFFFFFFFF 528 #define CPU_DWT_COMP1_COMP_S 0 543 #define CPU_DWT_MASK1_MASK_W 4 544 #define CPU_DWT_MASK1_MASK_M 0x0000000F 545 #define CPU_DWT_MASK1_MASK_S 0 557 #define CPU_DWT_FUNCTION1_MATCHED 0x01000000 558 #define CPU_DWT_FUNCTION1_MATCHED_BITN 24 559 #define CPU_DWT_FUNCTION1_MATCHED_M 0x01000000 560 #define CPU_DWT_FUNCTION1_MATCHED_S 24 566 #define CPU_DWT_FUNCTION1_DATAVADDR1_W 4 567 #define CPU_DWT_FUNCTION1_DATAVADDR1_M 0x000F0000 568 #define CPU_DWT_FUNCTION1_DATAVADDR1_S 16 574 #define CPU_DWT_FUNCTION1_DATAVADDR0_W 4 575 #define CPU_DWT_FUNCTION1_DATAVADDR0_M 0x0000F000 576 #define CPU_DWT_FUNCTION1_DATAVADDR0_S 12 586 #define CPU_DWT_FUNCTION1_DATAVSIZE_W 2 587 #define CPU_DWT_FUNCTION1_DATAVSIZE_M 0x00000C00 588 #define CPU_DWT_FUNCTION1_DATAVSIZE_S 10 596 #define CPU_DWT_FUNCTION1_LNK1ENA 0x00000200 597 #define CPU_DWT_FUNCTION1_LNK1ENA_BITN 9 598 #define CPU_DWT_FUNCTION1_LNK1ENA_M 0x00000200 599 #define CPU_DWT_FUNCTION1_LNK1ENA_S 9 612 #define CPU_DWT_FUNCTION1_DATAVMATCH 0x00000100 613 #define CPU_DWT_FUNCTION1_DATAVMATCH_BITN 8 614 #define CPU_DWT_FUNCTION1_DATAVMATCH_M 0x00000100 615 #define CPU_DWT_FUNCTION1_DATAVMATCH_S 8 622 #define CPU_DWT_FUNCTION1_EMITRANGE 0x00000020 623 #define CPU_DWT_FUNCTION1_EMITRANGE_BITN 5 624 #define CPU_DWT_FUNCTION1_EMITRANGE_M 0x00000020 625 #define CPU_DWT_FUNCTION1_EMITRANGE_S 5 671 #define CPU_DWT_FUNCTION1_FUNCTION_W 4 672 #define CPU_DWT_FUNCTION1_FUNCTION_M 0x0000000F 673 #define CPU_DWT_FUNCTION1_FUNCTION_S 0 684 #define CPU_DWT_COMP2_COMP_W 32 685 #define CPU_DWT_COMP2_COMP_M 0xFFFFFFFF 686 #define CPU_DWT_COMP2_COMP_S 0 701 #define CPU_DWT_MASK2_MASK_W 4 702 #define CPU_DWT_MASK2_MASK_M 0x0000000F 703 #define CPU_DWT_MASK2_MASK_S 0 715 #define CPU_DWT_FUNCTION2_MATCHED 0x01000000 716 #define CPU_DWT_FUNCTION2_MATCHED_BITN 24 717 #define CPU_DWT_FUNCTION2_MATCHED_M 0x01000000 718 #define CPU_DWT_FUNCTION2_MATCHED_S 24 725 #define CPU_DWT_FUNCTION2_EMITRANGE 0x00000020 726 #define CPU_DWT_FUNCTION2_EMITRANGE_BITN 5 727 #define CPU_DWT_FUNCTION2_EMITRANGE_M 0x00000020 728 #define CPU_DWT_FUNCTION2_EMITRANGE_S 5 765 #define CPU_DWT_FUNCTION2_FUNCTION_W 4 766 #define CPU_DWT_FUNCTION2_FUNCTION_M 0x0000000F 767 #define CPU_DWT_FUNCTION2_FUNCTION_S 0 778 #define CPU_DWT_COMP3_COMP_W 32 779 #define CPU_DWT_COMP3_COMP_M 0xFFFFFFFF 780 #define CPU_DWT_COMP3_COMP_S 0 795 #define CPU_DWT_MASK3_MASK_W 4 796 #define CPU_DWT_MASK3_MASK_M 0x0000000F 797 #define CPU_DWT_MASK3_MASK_S 0 809 #define CPU_DWT_FUNCTION3_MATCHED 0x01000000 810 #define CPU_DWT_FUNCTION3_MATCHED_BITN 24 811 #define CPU_DWT_FUNCTION3_MATCHED_M 0x01000000 812 #define CPU_DWT_FUNCTION3_MATCHED_S 24 819 #define CPU_DWT_FUNCTION3_EMITRANGE 0x00000020 820 #define CPU_DWT_FUNCTION3_EMITRANGE_BITN 5 821 #define CPU_DWT_FUNCTION3_EMITRANGE_M 0x00000020 822 #define CPU_DWT_FUNCTION3_EMITRANGE_S 5 859 #define CPU_DWT_FUNCTION3_FUNCTION_W 4 860 #define CPU_DWT_FUNCTION3_FUNCTION_M 0x0000000F 861 #define CPU_DWT_FUNCTION3_FUNCTION_S 0 863 #endif // __CPU_DWT__
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