102 #ifndef ti_drivers_UDMACC26XX__include 103 #define ti_drivers_UDMACC26XX__include 111 #include <ti/devices/DeviceFamily.h> 112 #include DeviceFamily_constructPath(inc/hw_types.h) 113 #include DeviceFamily_constructPath(driverlib/udma.h) 148 #if !defined(UDMACC26XX_CONFIG_BASE) && (DeviceFamily_PARENT == DeviceFamily_PARENT_CC13X2_CC26X2) 149 #define UDMACC26XX_CONFIG_BASE 0x20001800 150 #elif !defined(UDMACC26XX_CONFIG_BASE) 151 #define UDMACC26XX_CONFIG_BASE 0x20000400 155 #if(UDMACC26XX_CONFIG_BASE & 0x3FF) 156 #error "Base address for DMA control table 'UDMACC26XX_CONFIG_BASE' must be 1024 bytes aligned." 160 #if defined(__IAR_SYSTEMS_ICC__) 161 #define ALLOCATE_CONTROL_TABLE_ENTRY(ENTRY_NAME, CHANNEL_INDEX) \ 162 __no_init static volatile tDMAControlTable ENTRY_NAME @ UDMACC26XX_CONFIG_BASE + CHANNEL_INDEX * sizeof(tDMAControlTable) 163 #elif defined(__TI_COMPILER_VERSION__) || defined(__clang__) 164 #define ALLOCATE_CONTROL_TABLE_ENTRY(ENTRY_NAME, CHANNEL_INDEX) \ 165 PRAGMA(LOCATION( ENTRY_NAME , UDMACC26XX_CONFIG_BASE + CHANNEL_INDEX * sizeof(tDMAControlTable) );)\ 166 static volatile tDMAControlTable ENTRY_NAME 167 #define PRAGMA(x) _Pragma(#x) 168 #elif defined(__GNUC__) 169 #define ALLOCATE_CONTROL_TABLE_ENTRY(ENTRY_NAME, CHANNEL_INDEX) \ 170 extern int UDMACC26XX_ ## ENTRY_NAME ## _is_placed; __attribute__ ((section("."#ENTRY_NAME))) static volatile tDMAControlTable ENTRY_NAME = {&UDMACC26XX_ ## ENTRY_NAME ## _is_placed} 172 #error "don't know how to define ALLOCATE_CONTROL_TABLE_ENTRY for this toolchain" 176 #define UDMACC26XX_SET_TRANSFER_SIZE(SIZE) (((SIZE - 1) << UDMA_XFER_SIZE_S) & UDMA_XFER_SIZE_M) 178 #define UDMACC26XX_GET_TRANSFER_SIZE(CONTROL) (((CONTROL & UDMA_XFER_SIZE_M) >> UDMA_XFER_SIZE_S) + 1) 296 HWREG(hwAttrs->
baseAddr + UDMA_O_SETCHANNELEN) = channelBitMask;
325 return (uDMAIntStatus(hwAttrs->
baseAddr) & channelBitMask) ?
true :
false;
353 uDMAIntClear(hwAttrs->
baseAddr, channelBitMask);
377 HWREG(hwAttrs->
baseAddr + UDMA_O_CLEARCHANNELEN) = channelBitMask;
401 uint32_t channelNum, uint32_t attr)
405 uDMAChannelAttributeDisable(hwAttrs->
baseAddr, channelNum, attr);
bool isOpen
Definition: UDMACC26XX.h:184
HwiP_Struct hwi
Definition: UDMACC26XX.h:185
void UDMACC26XX_hwiIntFxn(uintptr_t callbacks)
PowerCC26XX_Resource powerMngrId
Definition: UDMACC26XX.h:193
void UDMACC26XX_close(UDMACC26XX_Handle handle)
Function to close the DMA driver.
__STATIC_INLINE void UDMACC26XX_clearInterrupt(UDMACC26XX_Handle handle, uint32_t channelBitMask)
Definition: UDMACC26XX.h:345
__STATIC_INLINE void UDMACC26XX_channelEnable(UDMACC26XX_Handle handle, uint32_t channelBitMask)
Definition: UDMACC26XX.h:288
uint8_t intNum
Definition: UDMACC26XX.h:194
__STATIC_INLINE void UDMACC26XX_init(UDMACC26XX_Handle handle)
Function to initialize the CC26XX DMA driver.
Definition: UDMACC26XX.h:247
__STATIC_INLINE void UDMACC26XX_disableAttribute(UDMACC26XX_Handle handle, uint32_t channelNum, uint32_t attr)
Definition: UDMACC26XX.h:400
UDMACC26XX Global configuration.
Definition: UDMACC26XX.h:222
Power manager interface for CC26XX/CC13XX.
UDMACC26XX_Handle UDMACC26XX_open()
Function to initialize the CC26XX DMA peripheral.
UDMACC26XX hardware attributes.
Definition: UDMACC26XX.h:191
void * object
Definition: UDMACC26XX.h:223
uint8_t intPriority
UDMACC26XX error interrupt priority. intPriority is the DMA peripheral's interrupt priority...
Definition: UDMACC26XX.h:216
__STATIC_INLINE void UDMACC26XX_channelDisable(UDMACC26XX_Handle handle, uint32_t channelBitMask)
Definition: UDMACC26XX.h:373
__STATIC_INLINE bool UDMACC26XX_channelDone(UDMACC26XX_Handle handle, uint32_t channelBitMask)
Definition: UDMACC26XX.h:317
uint32_t baseAddr
Definition: UDMACC26XX.h:192
UDMACC26XX object.
Definition: UDMACC26XX.h:183
UDMACC26XX_Config * UDMACC26XX_Handle
A handle that is returned from a UDMACC26XX_open() call.
Definition: UDMACC26XX.h:230
void const * hwAttrs
Definition: UDMACC26XX.h:224