PDMCC26XX_util.h

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/*
 * Copyright (c) 2015-2019, Texas Instruments Incorporated
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
#ifndef ti_drivers_i2s_PDMCC26XX_I2S__include
#define ti_drivers_i2s_PDMCC26XX_I2S__include

#include <ti/drivers/pin/PINCC26XX.h>
#include <ti/drivers/Power.h>
#include <ti/drivers/power/PowerCC26XX.h>

#include <ti/drivers/dpl/HwiP.h>
#include <ti/drivers/dpl/SemaphoreP.h>

#ifdef __cplusplus
extern "C" {
#endif

#define xI2S_DEBUG

#define PDMCC26XX_I2S_MIN_ALLOWED_QUEUE_SIZE        3

#ifdef I2S_DEBUG
#define I2S_BLOCK_OVERHEAD_IN_BYTES             16
#else //I2S_DEBUG
#define I2S_BLOCK_OVERHEAD_IN_BYTES             12
#endif //I2S_DEBUG

#define PDMCC26XX_I2S_CMD_SUCCESS              0

#define PDMCC26XX_I2S_CMD_UNDEFINED            -1

#define PDMCC26XX_I2S_CMD_NO_SUCCESS           -2

#define PDMCC26XX_I2S_GENERIC_DISABLED              0

#define PDMCC26XX_I2S_GENERIC_ENABLED               1

typedef void *(*PDMCC26XX_I2S_MallocFxn)(size_t memSize);

typedef void (*PDMCC26XX_I2S_FreeFxn)(void *ptr, size_t memSize);

typedef struct {
    void                        *object;

    void                const   *hwAttrs;
} PDMCC26XX_I2S_Config;

typedef PDMCC26XX_I2S_Config *PDMCC26XX_I2S_Handle;

typedef enum {
    PDMCC26XX_I2S_STREAM_IDLE = 0,          
    PDMCC26XX_I2S_STREAM_STARTED,           
    PDMCC26XX_I2S_STREAM_CANCELED,          
    PDMCC26XX_I2S_STREAM_FAILED,            
    PDMCC26XX_I2S_STREAM_ERROR,             
    PDMCC26XX_I2S_STREAM_BUFFER_READY,      
    PDMCC26XX_I2S_STREAM_BUFFER_DROPPED,    
    PDMCC26XX_I2S_STREAM_STOPPING,          
    PDMCC26XX_I2S_STREAM_STOPPED,           
    PDMCC26XX_I2S_STREAM_FAILED_TO_STOP     
} PDMCC26XX_I2S_Status;

typedef enum {
    PDMCC26XX_I2S_PDM       = 0,    
    PDMCC26XX_I2S_I2S       = 1     
} PDMCC26XX_I2S_Mode;

#define PDMCC26XX_I2S_DEFAULT_SAMPLE_STAMP_MOD      0x0000FFFF

#define PDMCC26XX_I2S_WordClockPhase_Single         0

#define PDMCC26XX_I2S_WordClockPhase_Dual           1

#define PDMCC26XX_I2S_WordClockPhase_UserDefined    2

#define PDMCC26XX_I2S_SampleEdge_Negative   0

#define PDMCC26XX_I2S_SampleEdge_Postive    1

#define PDMCC26XX_I2S_WordClockSource_Ext       1

#define PDMCC26XX_I2S_WordClockSource_Int       2

#define PDMCC26XX_I2S_BitClockSource_Ext       0

#define PDMCC26XX_I2S_BitClockSource_Int       1

#define PDMCC26XX_I2S_ClockSource_Normal    0

#define PDMCC26XX_I2S_ClockSource_Inverted  1

#define PDMCC26XX_I2S_ADUsageDisabled       0

#define PDMCC26XX_I2S_ADUsageInput          1

#define PDMCC26XX_I2S_ADUsageOutput         2

#define PDMCC26XX_I2S_CHAN0_ACT           0x00000001

#define PDMCC26XX_I2S_CHAN1_ACT           0x00000002

#define PDMCC26XX_I2S_CHAN2_ACT           0x00000004

#define PDMCC26XX_I2S_CHAN3_ACT           0x00000008

#define PDMCC26XX_I2S_CHAN4_ACT           0x00000010

#define PDMCC26XX_I2S_CHAN5_ACT           0x00000020

#define PDMCC26XX_I2S_CHAN6_ACT           0x00000040

#define PDMCC26XX_I2S_CHAN7_ACT           0x00000080

#define PDMCC26XX_I2S_MONO_MODE           0x00000001

#define PDMCC26XX_I2S_STEREO_MODE         0x00000003

#define PDMCC26XX_I2S_DISABLED_MODE       0x00000000

#define PDMCC26XX_I2S_CHAN_CFG_MASK       0x000000FF

#define PDMCC26XX_I2S_WordLengthMin         8

#define PDMCC26XX_I2S_WordLength16          16

#define PDMCC26XX_I2S_WordLengthMax         24

#define PDMCC26XX_I2S_SinglePhase           0

#define PDMCC26XX_I2S_DualPhase             1

#define PDMCC26XX_I2S_NegativeEdge          0

#define PDMCC26XX_I2S_PositiveEdge          1

#define PDMCC26XX_I2S_MemLen16bit  0

#define PDMCC26XX_I2S_MemLen24bit  1

#define PDMCC26XX_I2S_FormatLJF                     0

#define PDMCC26XX_I2S_FormatI2SandDSP               1

#define PDMCC26XX_I2S_FormatRJFmin                  2

#define PDMCC26XX_I2S_FormatRJFmax                  255

typedef uint32_t PDMCC26XX_I2S_TransferSize;

typedef struct {
    uint8_t          intNum;
    uint8_t          intPriority;
    PowerCC26XX_Resource   powerMngrId;
    PIN_Id           mclkPin;
    PIN_Id           bclkPin;
    PIN_Id           wclkPin;
    PIN_Id           ad0Pin;
    uint32_t         baseAddr;
} PDMCC26XX_I2S_HWAttrs;

typedef struct {
    uint16_t    wclkDiv;
    uint16_t    sampleOnPositiveEdge:1;
    uint16_t    wclkPhase:2;
    uint16_t    wclkInverted:1;
    uint16_t    wclkSource:2;
    uint16_t    bclkDiv:10;
    uint16_t    reserved:5;
    uint16_t    bclkSource:1;
    uint16_t    mclkDiv:10;
} PDMCC26XX_I2S_AudioClockConfig;

typedef union PDMCC26XX_I2S_AudioPinConfig {
  struct {
    uint16_t    ad1;
    uint16_t    ad0;
  } driverLibParams;
  struct {
    uint8_t     ad1Usage:2;
    uint8_t     enableMclkPin:1;
    uint8_t     reserved:1;
    uint8_t     ad1NumOfChannels:4;
    uint8_t     ad1ChannelMask;
    uint8_t     ad0Usage:2;
    uint8_t     enableWclkPin:1;
    uint8_t     enableBclkPin:1;
    uint8_t     ad0NumOfChannels:4;
    uint8_t     ad0ChannelMask;
  } bitFields;
} PDMCC26XX_I2S_AudioPinConfig;
#define PDMCC26XX_I2S_DIR_CHA_M     (I2S_LINE_MASK | I2S_CHAN_CFG_MASK)

typedef struct {
    uint8_t          wordLength:5;
    uint8_t          sampleEdge:1;
    uint8_t          dualPhase:1;
    uint8_t          memLen:1;
    uint8_t          dataDelay;
} PDMCC26XX_I2S_AudioFormatConfig;


typedef enum {
    PDMCC26XX_I2S_MODE_BLOCKING,
    PDMCC26XX_I2S_CALLBACK_MODE
} PDMCC26XX_I2S_RequestMode;

typedef struct {
    void      *arg;             
    PDMCC26XX_I2S_Status status;    
} PDMCC26XX_I2S_StreamNotification;

typedef struct {
    void      *bufferIn;        
    void      *bufferHandleIn;  
    PDMCC26XX_I2S_Status status;    
} PDMCC26XX_I2S_BufferRequest;

typedef struct {
    void      *bufferHandleIn;    
} PDMCC26XX_I2S_BufferRelease;

typedef void        (*PDMCC26XX_I2S_CallbackFxn) (PDMCC26XX_I2S_Handle handle, PDMCC26XX_I2S_StreamNotification *notification);

typedef struct {
    uint8_t                             blockCount;             
    uint32_t                            requestTimeout;         
    PDMCC26XX_I2S_RequestMode           requestMode;            
    PDMCC26XX_I2S_TransferSize          blockSizeInSamples;     
    PDMCC26XX_I2S_CallbackFxn           callbackFxn;            
    PDMCC26XX_I2S_MallocFxn             mallocFxn;              
    PDMCC26XX_I2S_FreeFxn               freeFxn;                
    PDMCC26XX_I2S_StreamNotification    *currentStream;         
} PDMCC26XX_I2S_Params;

typedef struct {
    bool                                isOpen;                 
    uint8_t                             blockCount;             
    uint16_t                            blockSizeInBytes;       
    PDMCC26XX_I2S_RequestMode           requestMode;            
    uint32_t                            requestTimeout;         
    int32_t                             sampleRate;          
    PIN_Handle                          pinHandle;              
    PDMCC26XX_I2S_TransferSize          blockSizeInSamples;     
    PDMCC26XX_I2S_CallbackFxn           callbackFxn;            
    PDMCC26XX_I2S_MallocFxn             mallocFxn;              
    PDMCC26XX_I2S_FreeFxn               freeFxn;                
    PDMCC26XX_I2S_StreamNotification    *currentStream;         
    PDMCC26XX_I2S_AudioFormatConfig     audioFmtCfg;            
    PDMCC26XX_I2S_AudioPinConfig        audioPinCfg;            
    HwiP_Struct hwi;                    
    SemaphoreP_Struct                    blockComplete;          
    SemaphoreP_Struct                    semStopping;            
    PIN_State                           pinState;               
    PDMCC26XX_I2S_AudioClockConfig      audioClkCfg;            
} PDMCC26XX_I2S_Object;

extern void PDMCC26XX_I2S_init(PDMCC26XX_I2S_Handle handle);

extern PDMCC26XX_I2S_Handle  PDMCC26XX_I2S_open(PDMCC26XX_I2S_Handle handle, PDMCC26XX_I2S_Params *params);

extern void PDMCC26XX_I2S_close(PDMCC26XX_I2S_Handle handle);

extern bool PDMCC26XX_I2S_startStream(PDMCC26XX_I2S_Handle handle);

extern bool PDMCC26XX_I2S_stopStream(PDMCC26XX_I2S_Handle handle);

extern bool PDMCC26XX_I2S_requestBuffer(PDMCC26XX_I2S_Handle handle, PDMCC26XX_I2S_BufferRequest *bufferRequest);

extern void PDMCC26XX_I2S_releaseBuffer(PDMCC26XX_I2S_Handle handle, PDMCC26XX_I2S_BufferRelease *bufferRelease);

#ifdef __cplusplus
}
#endif

#endif /* ti_drivers_i2s_PDMCC26XX_I2S__include */