NVSCC26XX.h

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/*
 * Copyright (c) 2015-2018, Texas Instruments Incorporated
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/*!*****************************************************************************
 *  @file       NVSCC26XX.h
 *  @brief      Non-Volatile Storage driver for CC13XX/CC26XX devices.
 *
 *  ## Interrupt Latency During Flash Operations #
 *
 *  When writing or erasing flash, interrupts must be disabled to avoid
 *  executing code in flash while the flash is being reprogrammed. This
 *  constraint is handled by the driver. Application code does not need
 *  to safeguard against this.
 *
 *  Additionally, to avoid extremely large interrupt latencies that would be
 *  incurred if entire blocks were written with interrupts disabled, block
 *  writes to flash are broken into multiple smaller sizes.
 *
 *  Even with this scheme in place, latencies of roughly 64 microseconds will
 *  be incurred while flash is being written to.
 *
 *  A similar caveat applies to flash erase operations. Erasing an entire
 *  flash sector (the minimal amount that can be erased at a time) can take
 *  roughly 8 milliseconds. This entire operation must be performed with
 *  interrupts disabled. Here again, this requirement is met internally
 *  by the driver and flash region erases are performed one sector at a
 *  time to minimize this significant latency impact.
 *
 *  Care must be taken by the user to not perform flash write or erase
 *  operations during latency critical phases of an application. See the
 *  NVS_lock() and NVS_unlock() API descriptions for more information.
 *
 *  ## Maximum flash writes before erase #
 *
 *  On CC13XX & CC26XX memory rows can be 128 or 256 bytes in length; refer to
 *  the device datasheet for the exact size.  A maximum of 83 write operations
 *  can be performed on a memory row.  Once the limit is reached, the row must
 *  be erased before it is written to again.
 *
 *  \note The 83 write limit persists through device reset & power cycles.
 *  If 60 write operations were performed on a memory page & the device is
 *  reset; the page can still only be written to 23 more times before it must
 *  be erased.
 *
 *  A write "Scoreboard" can be enabled in this driver; the scoreboard keeps
 *  track of how many times a page has been written to.  It is provided as a
 *  debug tool to ensure the 83 write limit is not exceeded.  If a page is
 *  written to more than 83 times, the NVSCC26XX driver will spin forever.
 *  Each byte in the scoreboard corresponds to a memory page in the NVS region.
 *  The byte is incremented when the memory is written to & set to 0 when
 *  erased.
 *
 *  To enable the "scoreboard" the "NVSCC26XX_INSTRUMENTED" symbol must be
 *  defined when the driver is compiled.  Three new fields are added to the
 *  #NVSCC26XX_HWAttrs structure:
 *    * scoreboard - a buffer provided by the application where each byte
 *      represents how many times a page has been written to.
 *    * scoreboardSize - number of bytes in the scoreboard.
 *    *flashPageSize - number of bytes in a flash page (i.e. 128 or 256)
 *
 *  When configured correctly, the scoreboard can be viewed in a memory browser.
 *
 *  \note The scoreboard will only keep track of writes to flash within a
 *         NVS region using a NVS driver.  Writes performed outside the NVS
 *         region or without the NVS driver are untracked.
 *
 *  \note  The scoreboard is in RAM & will be lost on reset or power cycle.
 *
 *
 *  ============================================================================
 */

#ifndef ti_drivers_nvs_NVSCC26XX__include
#define ti_drivers_nvs_NVSCC26XX__include

#include <stdint.h>
#include <stdbool.h>

#if defined (__cplusplus)
extern "C" {
#endif

#define NVSCC26XX_STATUS_LOW_VOLTAGE    (NVS_STATUS_RESERVED - 1)

extern const NVS_FxnTable NVSCC26XX_fxnTable;

typedef struct NVSCC26XX_HWAttrs {
    void        *regionBase;    
    size_t       regionSize;    
#if defined(NVSCC26XX_INSTRUMENTED)
    uint8_t     *scoreboard;         
    size_t       scoreboardSize;     
    uint32_t     flashPageSize;      
#endif
} NVSCC26XX_HWAttrs;

/*
 *  @brief      NVSCC26XX Object
 *
 *  The application must not access any member variables of this structure!
 */
typedef struct NVSCC26XX_Object {
    bool        opened;             /* Has this region been opened */
} NVSCC26XX_Object;

extern void         NVSCC26XX_close(NVS_Handle handle);
extern int_fast16_t NVSCC26XX_control(NVS_Handle handle, uint_fast16_t cmd,
                        uintptr_t arg);
extern int_fast16_t NVSCC26XX_erase(NVS_Handle handle, size_t offset,
                        size_t size);
extern void         NVSCC26XX_getAttrs(NVS_Handle handle, NVS_Attrs *attrs);
extern void         NVSCC26XX_init();
extern int_fast16_t NVSCC26XX_lock(NVS_Handle handle, uint32_t timeout);
extern NVS_Handle   NVSCC26XX_open(uint_least8_t index, NVS_Params *params);
extern int_fast16_t NVSCC26XX_read(NVS_Handle handle, size_t offset,
                        void *buffer, size_t bufferSize);
extern void         NVSCC26XX_unlock(NVS_Handle handle);
extern int_fast16_t NVSCC26XX_write(NVS_Handle handle, size_t offset,
                        void *buffer, size_t bufferSize, uint_fast16_t flags);
#if defined (__cplusplus)
}
#endif /* defined (__cplusplus) */

#endif /* ti_drivers_nvs_NVSCC26XX__include */