TMS320C6472 Chip Support Library User Guide


Contents


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About this Manual

This document describes how to install and work with Texas Instruments' TMS320C6472 Chip Support Library (CSL). In this context, the document contains instructions to:

  • Install the release
  • Build the sources contained in the release
  • Updated and changed APIs


Installation


System Requirements

Hardware Requirements:

·        TMS320C6472

Software Requirements:

·        This version of CSL has been compiled with TI Codegen tools version c6000 6.1.12.

·        Code Composer Studio version 4.1.2.00027 for running CCSv4 example projects


Package Contents

The delivery packages from Texas Instruments include four zip files for each package as shown below:

 

File name

Contents

Product Zip

csl_c6472_03_00_06_03.zip

v      All header files.

v      CSL libraries in big endian and little endian mode.

v      Release example - Each device has its own example folders.

v      User Guide and API Reference Guide for CSL are provided.

v      ReleaseNotes_C6472_03_00_06_03.html

Interrupt Controller (INTC) module zip

csl_c64xplus_intc_03_00_06_03.zip

v      INTC module header files.

v      INTC module library file in big endian and little endian mode.

v      Release examples for INTC.

This module is provided as separate library to facilitate use of CSL with an operating system.

This module should not be used with an embedded OS with interrupt controller support, such as DSP/BIOS. Please refer to the API Reference Guide for more information on the INTC module.

CSL Source zip file

csl_c6472_src_03_00_06_03.zip

v      All C6472 CSL source files.

v      All header files.

v      Build script batch file

v      Makefiles to build the library

INTC Source zip file

csl_c64xplus_intc_src_03_00_06_03.zip

v      All INTC CSL source files.

v      All INTC CSL header files.

v      Build script batch file

v      Makefiles to build the library

 


Installation Guidelines and Directory Structures

The steps to be followed for installation of the release package are as follows:

1.     Download the release zip files.

2.     Unzip the files with command “unzip <zip file name>” at the command prompt. Alternatively, use the WinZip wizard to extract the files.

 

The directory structure of the package is as shown below:

 

Installation Package

|

|_____csl_c6472

|

|_____csl_c6472_src

|

|_____csl_c64xplus_intc

|

|_____csl_c64xplus_intc_src

 

 

The directory structure of the product zip package release is as shown below:

 

csl_c6472

         |_____doc -> contains the User Guide and API Reference Guide 

         |

   |

         |_____example

         |        |          

         |        |_____bwmngmt

         |        |          

         |        |_____cache

         |        |

         |        |_____chip

         |        |

         |        |_____dat

         |        |

         |        |_____ddr2

         |        |

         |        |_____edma

         |        |

         |        |_____idma

         |        |

         |        .

         |        .

         |        |_____utopia2

         |

         |_____inc      CSL module header files

         |

         |_____lib

         |        |_____csl_c6472.lib (little endian CSL library)

         |        |

         |        |_____csl_c6472e.lib (big endian CSL library)

         |

         |

         |_____ ReleaseNotes_C6472_03_00_06_03.html (Release notes document)

 

 

The directory structure of the source zip package is as shown below:

 

csl_c6472_src

         |

         |_____batch files (to build the library)

         |

         |_____makefiles to build the library

         |

         |_____inc      ALL Header files

         |

         |_____src

                    |_____bwmngmt

                    |

                    |_____cache

        |

                    |_____cfg

                    .

                    .

                    .

                    |_____utopia2

 

 

The directory structure of the INTC zip package release is as shown below:

 

csl_C64xplus_intc

         |_____ example

         |          |

         |          c64xplus

         |             |

         |             intc

         |               |___intc_example1

         |               |

         |               .

         |               .

         |               |

         |               |___intc_example6

         |

         |_____inc      INTC module Header files

         |

         |_____lib

                    |___csl_c64xplus_intc.lib (little endian INTC CSL library)

                    |

                    |___csl_c64xplus_intce.lib (big endian INTC CSL library)

 

 

The directory structure of the INTC CSL source zip package is as shown below:

 

csl_c64xplus_intc_src

         |

         |_____batch files (to build the INTC library)

         |

         |_____makefiles to build the library

         |

         |_____inc        INTC Header files

         |

         |_____src

                    |_____common

                    |

                    |_____intc

 


Supported Modules

This release of CSL for TMS320C6472 contains functional and register-level APIs for the modules listed in the table below to program the peripherals. This set of APIs provides peripheral abstraction that can be used by higher layers of software.

Module

Register Layer Provided? (Yes/No)

Functional Layer Provided? (Yes/No)

Example Provided? (Yes/No)

Example Tested on?

(NotTested/ Sim/ /QuickTurn/VDB/EVM)

Remarks

BWMNGMT

Yes

Yes

Yes

EVM

 

CACHE  

Yes

Yes

Yes

EVM

 

CFG

Yes

Yes

Yes

EVM

 

CHIP

Yes

Yes

Yes

EVM

 

DAT

Yes

Yes

Yes

EVM

 

DDR2

Yes

Yes

Yes

EVM

 

DTF

Yes

Yes

NA

NA

Example for this module is covered in other module example

DEV

Yes

NA

NA

NA

Only Register layer is provided

ECTL

Yes

Yes

NA

NA

Example for this module is covered in other module example

EDC

Yes

Yes

Yes

EVM

 

EDMA

Yes

Yes

Yes

EVM

 

EMAC

Yes

Yes

Yes

EVM

 

ETB 

Yes

Yes

Yes

EVM

 

GPIO

Yes

Yes

Yes

EVM

 

HPI

Yes

Yes

NA

EVM

Known issue

I2C

Yes

Yes

Yes

EVM

 

IDMA

Yes

Yes

Yes

EVM

 

INTC

Yes

Yes

Yes

EVM

1.       Example for INTC module is available only in
csl_c64xplus_intc package.

 

2.       INTC module is available as separate library, and should generally not be used with an embedded operating system with interrupt controller support, such as DSP/BIOS. Please refer to the API Reference Guide for more information on the INTC module.

 

Modules using INTC should use “csl_c64xplus_intc.lib” (little endian) and “csl_c64xplus_intce.lib” (big endian).

INTGEN

Yes

NA

NA

NA

Only Register layer is provided

MDIO

Yes

Yes

NA

NA

Examples are not provided

MEMPROT

Yes

Yes

Yes

EVM

 

PDMA

No

Yes

NA

NA

Example for this module is covered in other module example

PLLC

Yes

Yes

Yes

EVM

 

PSC

Yes

Yes

NA

NA

Example for this module is covered in other module example

POWERDOWN

Yes

Yes

Yes

EVM

 

SEC

Yes

NA

NA

NA

Only Register layer is provided

SMC

Yes

Yes

Yes

EVM

 

SMCP

Yes

Yes

NA

NA

Example for this module is covered in other module example

SRIO

Yes

Yes

Yes

EVM

 

TIMER

Yes

Yes

Yes

EVM

 

TSC

Yes

Yes

Yes

EVM

 

TSIP

Yes

Yes

Yes

EVM

 

UTOPIA2

Yes

Yes

NA

EVM

Known issue

Note
NA – Not Applicable (In Functional Layer column i.e., 3rd column, NA indicates that the CSL requirement for these modules is only register layer.)


Prerequisites to Run Examples

  • Make sure that EVM has been set up properly, so that CCS can be used for running examples.
  • Load corresponding GEL files before running example projects.

Gel file

Location

evm6472.gel for core 0

evm6472-MemoryMap.gel for core 1-5

Install EVMC6472 SDK, and the gel files can be found at

C:\Program Files\Texas Instruments\ccsv4\emulation\boards\evmc6472\gel

 

  • Configure PLLs if required such as when running EMAC example projects with a boot mode other than I2C and EMAC boot. When the gel files above are loaded and target core 0 is connected, PLL2 and PLL3 are enabled while PLL1 is configured to get CPU clock of 625MHz. PLL1 multiplier can also be changed through running evm6472.gel - PLL Controller Functions - PLL1_Controller_Setup.
  • Although PLL configuration is provided in the above GEL files, PLL APIs in the CSL package should to be used instead in applications to configure PLLs.
  • For running EMAC dual_emac example, connect both EMACs to a Giga bit capable (10/100/1000) Ethernet switch.
  • Additional gel file (example\emac\emac_core_restart\core_restart.gel) is provided for running EMAC core restart example. Detailed instructions for how to run this example can be found from example\emac\emac_core_restart\readme.txt.
  • For running TSIP dlb example on C6472EVM, frame sync and clock input must be supplied from such external hardware as chassis.

Build Guidelines


Environmental Variable Settings

1.     Make sure the path to the gmake executable is in the DOS PATH environment variable.

If gmake path is not set, then set path for ‘gmake’ as below if XDC tools are installed under “C:\Program Files\Texas Instruments\xdctools_3_16_02_32”.

 

set path=C:\Program Files\Texas Instruments\xdctools_3_16_02_32

 

2.     Make sure the path to the compiler executable, cl6x.exe is in the DOS PATH environment variable.

If not, then set path as below if CGT 6.1.12 is installed to “C:\Program Files\Texas Instruments\C6000 Code Generation Tools 6.1.12”.

 

set path=%path%;C:\Program Files\Texas Instruments\C6000 Code Generation Tools 6.1.12\bin


Compiling CSL Libraries

The steps to be followed to build the CSL libraries from the release source package are as follows:

1.     Download the release source zip file: “csl_c6472_src_03_00_06_03.zip”.

2.     Unzip the files with command “unzip <zip file name>” at the command prompt. Alternatively, use the WinZip wizard to extract the files.

3.     Go to the command prompt and change the current directory to <Zip folder path>\<csl_src_folder> e.g., cd C:\csl_c6472_src

4.     Setup the target name at command prompt using the following command:

 

set TARGET=c6472

 

5.     Set the environment variable “set CSL3X_ROOT_DIR=<Zip folder path>” at command prompt of the system. Compile the code with the batch file given. Different batch files for creating libraries for the device are listed below. Batch files will be found in the following path csl_c6472_src.

 

Library

Batch file to be invoked

Library name

C6472 CSL

build_csl (little endian)

csl_c6472.lib

build_csle (big endian)

csl_c6472e.lib

 

6.     To clean the built object files, invoke the corresponding batch file with the argument ‘cleanall’: .\build_csl.bat cleanall.

Note: Each time while building the library, use the ‘cleanall’ option with the build script and then build the library.


Compiling INTC CSL Libraries

The steps to be followed to build the INTC CSL library from the release are as follows:

1.     Download the release zip file, “csl_c64xplus_intc_src_03_00_06_03.zip”.

2.     Unzip the files with the command “unzip <zip file name>” at the command prompt. Alternatively, use the WinZip wizard to extract the files.

3.     Go to the command prompt and change the current directory to <Zip folder path>\<csl_intc_src_folder> e.g., cd C:\ csl_c64xplus_intc_src.

4.     Set the environment variable “set CSL3X_ROOT_DIR=<Zip folder path>” at command prompt of the system. Compile the code with the batch file given. Different batch files for creating libraries for the device are listed below. It will be found in the following path csl_c64xplus_intc_src\.

 

Library

Batch file to be invoked

Library name

INTC CSL

build_c64xplus_intc (little endian)

csl_c64xplus_intc.lib

build_c64xplus_intce (big endian)

csl_c64xplus_intce.lib

 

5.     To clean the built object files, invoke the corresponding batch file with the argument ‘cleanall’: .\build_c64xplus_intc.bat cleanall.

Note: Each time while building the library, use the ‘cleanall’ option with the build script and then build the library.


Updated and Changed APIs

Table below provides information on updated and changed APIs in this release.

File

API

Change Description

Any changes required in applications

Notes

 

csl_psc.h

CSL_PscPowerDomain

Non-existing  power domain CSL_PSC_PWRDMN_SRIO is removed

 

YES

CSL_PSC_PWRDMN_ALWAYSON should be used instead. Please refer to the SRIO example provided.

csl_psc.h

CSL_PscRailnum CSL_PscRailcount

Both data structures are removed

YES

Not specified. Remove from applications if used earlier.

csl_psc.h

CSL_PscHwControlCmd

CSL_PSC_QUERY_PWRDMN_STAT CSL_PSC_QUERY_PWRAIL_STAT are removed

YES

Not specified. Remove from applications if used earlier.

 

csl_srio.h

PLL enable macros

PLL enable MACROs are removed

CSL_SRIO_PLL1_ENABLE CSL_SRIO_PLL2_ENABLE CSL_SRIO_PLL3_ENABLE CSL_SRIO_PLL4_ENABLE

 

YES

 

Not configurable. Remove from applications if used earlier.

 

csl_srio.h

Port error input/output
stop status macros

CSL_SRIO_ERR_OUTPUT_ERROR_STP   CSL_SRIO_ERR_INPUT_ERROR_STP are added

YES

Use the provided MACROs instead of specifying bit values for OUTPUT_ERROR_STP and INPUT_ERROR_STP bits in  register SPn_ERR_STAT. Please refer to the SRIO example provided.

 

 

csl_srio.h

Port ip mode macros

CSL_SRIO_IDLE_ERR_DISABLE CSL_SRIO_TX_FIFO_BYPASS CSL_SRIO_PW_DISABLE CSL_SRIO_SRC_TGT_ID_DISABLE CSL_SRIO_SELF_RESET CSL_SRIO_F8_TGT_ID_DISABLE CSL_SRIO_MLTC_ENABLE CSL_SRIO_RST_ENABLE CSL_SRIO_PW_ENABLE are added      

 

 

YES

Use the provided MACROs instead of specifying bit values for the corresponding bits in register SP_IP_MODE. Please refer to the SRIO example provided.

csl_srio.h

CSL_SrioHwControlCmd

CSL_SRIO_CMD_PLL_CONTROL is removed

YES

Not configurable. Remove from applications if used earlier.

csl_srio.h

CSL_SrioSerDesTermination

Data structure is removed

YES

Not configurable. Remove from applications if used earlier.

csl_srio.h

CSL_SrioControlSetup

pllEn is removed

YES

Not configurable. Remove from applications if used earlier.

csl_srio.h

 

CSL_SrioSpErrDetStat CSL_SrioPortCntlIndpEn

Both data structures are added

YES

Support bit-wise configuration of SPn_CTL_INDEP.

csl_srio.h

CSL_SrioPidNumber

Content of data structure is modified

YES

Modified as in SRIO user’s guide. Update with the new data structure if CSL_SrioPidNumber is used in applications.

csl_srio.h

CSL_SrioLsuCompStat

Replace portNum with lsuNum

YES

Bug fix. Replace portNum with lsuNum in application when using CSL_SrioLsuCompStat. Please refer to the SRIO example provided.

 

csl_srio.h

CSL_SrioSerDesRxCfg

enTest is added

YES to use serDes loopback

Support SerDes loopback. Please refer to the SRIO example provided.

termination is removed

YES

Not configurable. Remove from applications if used earlier.

 

csl_srio.h

CSL_SrioSerDesTxCfg

enTest is added

YES to use serDes loopback

Support SerDes loopback. Please refer to the SRIO example provided.

enableFixedPhase is removed

YES

Not configurable. Remove from applications if used earlier.

 

 

csl_srio.h

CSL_SrioHwSetup

serDesLoopback is added

YES to use serDes loopback

Support SerDes loopback. Please refer to the SRIO example provided.

portCntlIndpEn is defined as CSL_SrioPortCntlIndpEn instead of Uint32

YES

Support bit-wise configuration of SPn_CTL_INDEP. Please refer to the SRIO example provided for configuration details.

 


Last updated: June 25, 2010