41 #ifndef RL_MONITORING_H 42 #define RL_MONITORING_H 56 #define RL_MON_RF_FREQ_CNT (3U) 61 #define RL_NUM_MON_SLICES_MAX (127U) 72 typedef struct rlMonDigEnables
105 #ifndef MMWL_BIG_ENDIAN 146 typedef struct rlDigMonPeriodicConf
148 #ifndef MMWL_BIG_ENDIAN 171 rlUInt8_t reportMode;
195 typedef struct rlMonAnaEnables
252 typedef struct rlTempMonConf
254 #ifndef MMWL_BIG_ENDIAN 277 rlUInt8_t reportMode;
341 typedef struct rlRxGainPhaseMonConf
343 #ifndef MMWL_BIG_ENDIAN 416 rlUInt8_t rfFreqBitMask;
420 rlUInt8_t profileIndx;
436 rlUInt8_t reportMode;
499 rlInt16_t rxGainMismatchOffsetVal[RL_RX_CNT][RL_MON_RF_FREQ_CNT];
513 rlUInt16_t rxGainPhaseMismatchOffsetVal[RL_RX_CNT][RL_MON_RF_FREQ_CNT];
547 typedef struct rlRxNoiseMonConf
549 #ifndef MMWL_BIG_ENDIAN 586 rlUInt8_t rfFreqBitMask;
590 rlUInt8_t profileIndx;
596 #ifndef MMWL_BIG_ENDIAN 619 rlUInt8_t reportMode;
639 typedef struct rlRxIfStageMonConf
641 #ifndef MMWL_BIG_ENDIAN 660 rlUInt8_t reportMode;
664 rlUInt8_t profileIndx;
683 #ifndef MMWL_BIG_ENDIAN 716 rlUInt8_t lpfCutoffStopBandAttenThresh;
726 rlUInt8_t lpfCutoffBandEdgeDroopThresh;
747 typedef struct rlTxPowMonConf
749 #ifndef MMWL_BIG_ENDIAN 788 rlUInt8_t rfFreqBitMask;
792 rlUInt8_t profileIndx;
798 #ifndef MMWL_BIG_ENDIAN 804 rlUInt8_t reportMode;
819 rlUInt8_t reportMode;
845 #ifndef MMWL_BIG_ENDIAN 878 rlInt8_t txPowOffsetValRF2;
885 rlInt8_t txPowOffsetValRF1;
896 rlInt8_t txPowOffsetValRF3;
904 typedef struct rlAllTxPowMonConf
923 typedef struct rlTxBallbreakMonConf
925 #ifndef MMWL_BIG_ENDIAN 948 rlUInt8_t reportMode;
957 rlInt16_t txReflCoeffMagThresh;
966 #ifndef MMWL_BIG_ENDIAN 989 rlUInt8_t txPowBackOff;
1000 typedef struct rlAllTxBallBreakMonCfg
1019 typedef struct rlTxGainPhaseMismatchMonConf
1021 #ifndef MMWL_BIG_ENDIAN 1114 rlUInt8_t rfFreqBitMask;
1121 rlUInt8_t profileIndx;
1165 rlInt8_t monChirpSlope;
1172 rlUInt8_t reportMode;
1208 rlUInt16_t txGainMismatchOffsetVal[RL_MON_RF_FREQ_CNT][RL_TX_CNT];
1222 rlUInt16_t txPhaseMismatchOffsetVal[RL_MON_RF_FREQ_CNT][RL_TX_CNT];
1236 typedef struct rlSynthFreqMonConf
1238 #ifndef MMWL_BIG_ENDIAN 1257 rlUInt8_t reportMode;
1261 rlUInt8_t profileIndx;
1273 #ifndef MMWL_BIG_ENDIAN 1330 rlUInt8_t monitorMode;
1338 rlInt8_t monStartTime;
1342 rlUInt8_t reserved1;
1363 typedef struct rlExtAnaSignalsMonConf
1365 #ifndef MMWL_BIG_ENDIAN 1426 rlUInt8_t signalSettlingTime[6U];
1448 rlUInt8_t signalThresh[12U];
1453 rlUInt8_t reserved0;
1460 rlUInt8_t reportMode;
1475 rlUInt8_t signalBuffEnables;
1490 rlUInt8_t signalInpEnables;
1510 rlUInt8_t signalSettlingTime[6U];
1532 rlUInt8_t signalThresh[12U];
1551 typedef struct rlTxIntAnaSignalsMonConf
1553 #ifndef MMWL_BIG_ENDIAN 1574 rlUInt8_t reportMode;
1580 rlUInt8_t profileIndx;
1599 typedef struct rlAllTxIntAnaSignalsMonConf
1615 typedef struct rlRxIntAnaSignalsMonConf
1617 #ifndef MMWL_BIG_ENDIAN 1623 rlUInt8_t profileIndx;
1630 rlUInt8_t reportMode;
1638 rlUInt8_t reportMode;
1644 rlUInt8_t profileIndx;
1649 rlUInt16_t reserved0;
1653 rlUInt32_t reserved1;
1654 } rlRxIntAnaSignalsMonConf_t;
1659 typedef struct rlPmClkLoIntAnaSignalsMonConf
1661 #ifndef MMWL_BIG_ENDIAN 1721 rlUInt8_t reportMode;
1732 rlUInt8_t profileIndx;
1739 rlInt8_t sync20GMinThresh;
1754 rlUInt8_t sync20GSigSel;
1759 rlUInt8_t reserved0;
1766 rlInt8_t sync20GMaxThresh;
1777 typedef struct rlGpadcIntAnaSignalsMonConf
1779 #ifndef MMWL_BIG_ENDIAN 1795 rlUInt8_t reserved0;
1802 rlUInt8_t reportMode;
1817 typedef struct rlPllContrlVoltMonConf
1819 #ifndef MMWL_BIG_ENDIAN 1835 rlUInt8_t reserved0;
1842 rlUInt8_t reportMode;
1884 typedef struct rlDualClkCompMonConf
1886 #ifndef MMWL_BIG_ENDIAN 1902 rlUInt8_t reserved0;
1909 rlUInt8_t reportMode;
1936 typedef struct rlRxSatMonConf
1938 #ifndef MMWL_BIG_ENDIAN 1953 rlUInt8_t satMonSel;
1957 rlUInt8_t profileIndx;
1996 #ifndef MMWL_BIG_ENDIAN 2015 rlUInt8_t reserved1;
2025 rlUInt8_t rxChannelMask;
2044 typedef struct rlSigImgMonConf
2046 #ifndef MMWL_BIG_ENDIAN 2059 rlUInt8_t numSlices;
2063 rlUInt8_t profileIndx;
2095 typedef struct rlRxMixInPwrMonConf
2097 #ifndef MMWL_BIG_ENDIAN 2135 rlUInt8_t reportMode;
2141 rlUInt8_t profileIndx;
2145 rlUInt8_t reserved0;
2184 typedef struct rlRfSigImgPowerCqData
2215 rlUInt16_t sigImgPowerCqVal[RL_NUM_MON_SLICES_MAX];
2221 typedef struct rlRfRxSaturationCqData
2254 rlUInt8_t satCqVal[RL_NUM_MON_SLICES_MAX];
2257 typedef struct rlAnaFaultInj
2259 #ifndef MMWL_BIG_ENDIAN 2263 rlUInt8_t reserved0;
2278 rlUInt8_t rxGainDrop;
2307 rlUInt8_t rxHighNoise;
2325 rlUInt8_t rxIfStagesFault;
2338 rlUInt8_t rxLoAmpFault;
2352 rlUInt8_t txLoAmpFault;
2366 rlUInt8_t txGainDrop;
2406 rlUInt8_t synthFault;
2420 rlUInt8_t supplyLdoFault;
2431 rlUInt8_t miscFault;
2445 rlUInt8_t miscThreshFault;
2449 rlUInt8_t reserved1;
2465 rlUInt8_t rxGainDrop;
2469 rlUInt8_t reserved0;
2484 rlUInt8_t rxHighNoise;
2510 rlUInt8_t rxLoAmpFault;
2528 rlUInt8_t rxIfStagesFault;
2542 rlUInt8_t txGainDrop;
2555 rlUInt8_t txLoAmpFault;
2574 rlUInt8_t synthFault;
2606 rlUInt8_t miscFault;
2620 rlUInt8_t supplyLdoFault;
2624 rlUInt8_t reserved1;
2638 rlUInt8_t miscThreshFault;
2643 rlUInt16_t reserved2;
2647 rlUInt16_t reserved3;
2651 rlUInt16_t reserved4;
2657 typedef struct rlTxPhShiftMonConf
2659 #ifndef MMWL_BIG_ENDIAN 2678 rlUInt8_t reportMode;
2682 rlUInt8_t profileIndx;
2688 #ifndef MMWL_BIG_ENDIAN 2838 rlUInt8_t phShifterMonCfg;
2842 rlUInt8_t reserved1;
2865 rlInt8_t monChirpSlope;
2876 rlUInt8_t phShifterIncVal2;
2887 rlUInt8_t phShifterIncVal1;
2898 rlUInt8_t phShifterIncVal4;
2909 rlUInt8_t phShifterIncVal3;
2917 rlUInt8_t phShifterMon2;
2925 rlUInt8_t phShifterMon1;
2933 rlUInt8_t phShifterMon4;
2941 rlUInt8_t phShifterMon3;
2976 typedef struct rlAllTxPhShiftMonConf
3161 rlRxIntAnaSignalsMonConf_t* data);
3181 MMWL_EXPORT rlReturnVal_t rlRfRxMixerInPwrConfig(rlUInt8_t deviceMap,
3185 rlAnaFaultInj_t* data);
rlUInt32_t reserved2
Reserved for Future use.
rlInt8_t sync20GMinThresh
Minimum threshold for 20GHz monitoring 1 LSB = 1 dBm Valid Range: -63 to +63 dBm.
rlUInt16_t reserved0
Reserved for Future use.
rlUInt32_t reserved2
Reserved for Future use.
rlUInt16_t reserved0
Reserved for Future use.
rlUInt8_t reserved1
Reserved for Future use.
rlUInt16_t reserved1
Reserved for Future use.
rlUInt8_t reportMode
Value Definition 0 Report is sent every monitoring period without threshold check 1 Report is sen...
rlUInt8_t phShifterIncVal1
Phase shifter monitoring increment value for phase1, the monitoring phase will be incremented by this...
rlUInt8_t testMode
Value Definition 0 Production mode. Latent faults are tested and any failures are reported 1 Char...
rlUInt8_t reportMode
Value Definition 0 Report is sent every monitoring period without threshold check 1 Report is sen...
rlUInt8_t reportMode
Value Definition 0 Report is sent every monitoring period without threshold check 1 Report is sen...
rlUInt32_t reserved2
Reserved for Future use.
rlUInt16_t reserved0
Reserved for Future use.
TX power monitoring configuration.
Internal signals for DCC based clock monitoring configuration.
rlUInt16_t timeSliceNumSamples
This field specifies the number of samples constituting each time slice. The minimum allowed value ...
rlUInt16_t numSlices
Number of (primary + secondary) slices to monitor Valid range: 1 to 127.
Signal and image band energy monitoring configuration.
rlUInt8_t reserved0
Reserved for Future use.
External analog signals monitoring configuration.
rlUInt8_t reportMode
Value Definition 0 Report is sent every monitoring period without threshold check 1 Report is sen...
rlUInt16_t signalEnables
This field indicates the sets of signals which are to be monitored. When each bit in this field is ...
rlUInt16_t primarySliceDuration
It specifies the duration of each (primary) time slice. 1 LSB = 0.16us. Valid range: 4 to floor(A...
rlInt16_t txGainMismatchThresh
The magnitude of difference between measured TX powers across the enabled channels at each enabled ...
RX saturation monitoring configuration.
rlUInt8_t reportMode
Indicates the desired reporting verbosity and threshold usage. Value = 0 Report is sent every monit...
MMWL_EXPORT rlReturnVal_t rlRfTxBallbreakMonConfig(rlUInt8_t deviceMap, rlAllTxBallBreakMonCfg_t *data)
Sets information related to TX ball break detection.
MMWL_EXPORT rlReturnVal_t rlRfAnaMonConfig(rlUInt8_t deviceMap, rlMonAnaEnables_t *data)
This function contains the consolidated configuration of all analog monitoring. The enabled monitorin...
rlUInt32_t enMask
Bit Analog monitoring control 0 TEMPERATURE_MONITOR_EN 1 RX_GAIN_PHASE_MONITOR_EN 2 RX_NOISE_MO...
rlUInt32_t reserved1
Reserved for Future use.
rlUInt32_t reserved3
Reserved for Future use.
rlTxPhShiftMonConf_t * tx2PhShiftMonCfg
Tx-2 Phase shifter monitoring config.
rlUInt8_t reserved0
Reserved for Future use.
rlUInt32_t reserved2
Reserved for Future use.
rlUInt32_t ldoVmonScEn
LDO short circuit monitoring enable. There are no reports for these monitors. If there is any fault...
rlUInt16_t reserved1
Reserved for Future use.
rlUInt8_t numSlices
Number of (primary + secondary) slices to monitor Valid range: 1 to 127.
rlInt8_t monStartTime
This field determines when the monitoring starts in each chirp relative to the start of the ramp....
rlUInt16_t noiseThresh
The measured RX input referred noise figure at the enabled RF frequencies, for all channels,...
rlUInt8_t reserved1
Reserved for Future use.
rlUInt8_t reserved1
Reserved for Future use.
Digital monitoring latent fault reporting configuration.
rlUInt8_t numSlices
Number of (primary + secondary) slices to monitor Valid range: 1 to 127.
rlUInt8_t profileIndx
This field indicates the profile index for which this configuration applies.
rlUInt8_t reportMode
Value Definition 0 Report is sent every monitoring period 1 Report is sent only on a failure 2 ...
MMWL_EXPORT rlReturnVal_t rlRfRxGainPhMonConfig(rlUInt8_t deviceMap, rlRxGainPhaseMonConf_t *data)
This API is to set RX gain and phase monitoring config to device.
rlUInt8_t reserved1
Reserved for Future use.
MMWL_EXPORT rlReturnVal_t rlRfRxSigImgMonConfig(rlUInt8_t deviceMap, rlSigImgMonConf_t *data)
Sets information related to signal and image band energy.
rlTxBallbreakMonConf_t * tx0BallBrkMonCfg
Tx ballbreak monitoring config for Tx0.
rlUInt32_t reserved2
Reserved for Future use.
rlUInt8_t reportMode
Value Definition 0 RESERVED 1 Report is send only upon a failure (after checking for thresholds) ...
rlUInt8_t phShifterMon4
TXn Phase shifter phase4 monitor value. Bits Phase shift definition b1:0 Reserved (set it to 0b00...
rlInt8_t monChirpSlope
Frequency slope for each monitoring chirp is encoded in 1 bytes (8 bit signed number)....
Internal signals for PLL control voltage monitoring configuration.
rlUInt16_t reserved0
Reserved for Future use.
MMWL_EXPORT rlReturnVal_t rlRfRxIfStageMonConfig(rlUInt8_t deviceMap, rlRxIfStageMonConf_t *data)
Sets information related to RX IF filter attenuation monitoring.
rlUInt8_t rfFreqBitMask
This field indicates the exact RF frequencies inside the profile's RF band at which to measure the ...
rlUInt8_t profileIndx
This field indicates the Profile Index for which this configuration applies.
MMWL_EXPORT rlReturnVal_t rlRfTxPhShiftMonConfig(rlUInt8_t deviceMap, rlAllTxPhShiftMonConf_t *data)
Sets information related to TX Phase shifter monitoring.
rlUInt16_t reserved1
Reserved for Future use.
rlUInt8_t reserved0
Reserved for Future use.
rlUInt8_t profileIndx
This field indicates the Profile Index for which this monitoring configuration applies....
rlUInt8_t rxEn
This field indicates the RX channels that should be enabled for TX to RX loopback measurement....
rlTxBallbreakMonConf_t * tx1BallBrkMonCfg
Tx ballbreak monitoring config for Tx1.
rlUInt8_t reserved0
Reserved for Future use.
rlUInt8_t reserved0
Reserved for Future use.
rlUInt32_t reserved2
Reserved for Future use.
rlUInt16_t rxGainMismatchErrThresh
The magnitude of difference between measured RX gains across the enabled channels at each enabled R...
rlUInt8_t profileIndx
This field indicates the profile Index for which this configuration applies.
rlUInt32_t monStartFreqConst
For AWR2243 devices : This field is reserved. Set to 0x0. For xWR6x43 devices : Start frequency of ...
MMWL_EXPORT rlReturnVal_t rlRfSynthFreqMonConfig(rlUInt8_t deviceMap, rlSynthFreqMonConf_t *data)
Sets information related to synthesizer frequency.
rlUInt8_t phShifterIncVal2
Phase shifter monitoring increment value for phase2, the monitoring phase will be incremented by this...
MMWL_EXPORT rlReturnVal_t rlRfDigMonEnableConfig(rlUInt8_t deviceMap, rlMonDigEnables_t *data)
Sets the consolidated configuration of all digital monitoring.
rlUInt32_t reserved3
Reserved for Future use.
rlUInt8_t txEnable
This field indicates if and which TX channels should be enabled while measuring RX mixer input powe...
rlUInt16_t reserved1
Reserved for Future use.
rlUInt8_t reserved0
Reserved for Future use.
rlUInt32_t reserved2
Reserved for Future use.
rlUInt8_t reportMode
Value Definition 0 RESERVED 1 Report is send only upon a failure(after checking for thresholds) ...
rlUInt32_t reserved2
Reserved for Future use.
rlUInt8_t profileIndx
The RF analog settings corresponding to this profile are used for monitoring the enabled signals,...
rlUInt16_t txPowFlatnessErrThresh
The magnitude of measured TX power flatness error, for each enabled channel, is compared against th...
rlUInt16_t rxGainFlatnessErrThresh
The magnitude of measured RX gain flatness error, for each enabled channel, is compared against thi...
rlUInt8_t rxChannelMask
This field is applicable only for SAT_MON_MODE = 0 Masks RX channels used for monitoring....
rlUInt8_t profileIndx
This field indicates the Profile Index for which this configuration applies.
MMWL_EXPORT rlReturnVal_t rlRfAnaFaultInjConfig(rlUInt8_t deviceMap, rlAnaFaultInj_t *data)
Sets information related to RF fault injection.
rlUInt8_t profileIndx
This field indicates the profile Index for which this configuration applies.
rlUInt8_t reportMode
Value Definition 0 Report is sent every monitoring period without threshold check 1 Report is sen...
rlUInt8_t reserved0
Reserved for Future use.
TX Phase shifter monitoring configuration.
rlUInt8_t reserved0
Reserved for Future use.
TX power monitoring configuration.
rlInt32_t rf1rf2FreqDitherLimits
Minimum and maximum offset frequency dither limits for RF1 and RF2, when dither limit selection bit b...
RX noise monitoring configuration.
RX IF stage monitoring configuration.
rlUInt16_t reserved2
Reserved for Future use.
rlUInt8_t reportMode
Value Definition 0 Report is sent every monitoring period without threshold check 1 Report is sen...
rlTxIntAnaSignalsMonConf_t * tx2IntAnaSgnlMonCfg
Internal signals in the Tx-2 path monitoring config.
TX ballbreak monitoring configuration.
rlUInt8_t reserved1
Reserved for Future use.
rlInt8_t sync20GMaxThresh
Maximum threshold for 20GHz monitoring 1 LSB = 1 dBm Valid Range: -63 to +63 dBm.
MMWL_EXPORT rlReturnVal_t rlRfPllContrlVoltMonConfig(rlUInt8_t deviceMap, rlPllContrVoltMonConf_t *data)
Sets information related to APLL and Synthesizer's control voltage signals monitoring.
rlUInt8_t txEn
This field indicates the TX channels that should be compared for gain and phase balance....
Internal signals in the TX path monitoring configuration.
rlUInt8_t profileIndx
This field indicates the profile Index for which this configuration applies.
rlUInt16_t reserved0
Reserved for Future use.
rlUInt8_t lpfCutoffBandEdgeDroopThresh
The LPF band edge droop of RX channels are compared against the corresponding thresholds given in t...
rlUInt8_t monitorMode
This field configures whether this monitor should be done for functional active chirps (mode 0) or ...
rlUInt8_t txPowBackOff
For AWR2243 devices : This field is reserved. Set to 0x0. For xWR6x43 devices : TX Power Backoff se...
rlUInt16_t numSlices
Number of (primary + secondary) time slices to monitor. Valid range: 1 to 127 .
MMWL_EXPORT rlReturnVal_t rlRfRxIfSatMonConfig(rlUInt8_t deviceMap, rlRxSatMonConf_t *data)
Sets information related to RX saturation detector monitoring.
RX ADC and IF saturation information.
rlInt16_t rf3FreqDitherLimits
Minimum and maximum offset frequency dither limits for RF3, when dither limit selection bit b3 of RF_...
rlTxPowMonConf_t * tx1PowrMonCfg
Power Monitoring Configuration for Tx1.
MMWL_EXPORT rlReturnVal_t rlRfTempMonConfig(rlUInt8_t deviceMap, rlTempMonConf_t *data)
This API configure the on chip temperature monitors and report the soft results from the monitor....
TX gain and phase mismatch monitoring configuration.
rlUInt32_t reserved4
Reserved for Future use.
rlTxPhShiftMonConf_t * tx1PhShiftMonCfg
Tx-1 Phase shifter monitoring config.
rlUInt8_t vcoMonEn
This bit mask can be used to enable/disable the monitoring of non-live VCO profiles,...
rlUInt16_t reserved2
Reserved for Future use.
rlUInt16_t freqErrThresh
During the chirp, the error of the measured instantaneous chirp frequency w.r.t. the desired value ...
rlUInt8_t profileIndx
The RF analog settings corresponding to this profile are used for monitoring RX mixer input power u...
rlUInt8_t txSel
Value Definition 0 TX0 is used for generating loopback signal for RX gain measurement 1 TX1 is us...
MMWL_EXPORT rlReturnVal_t rlRfGpadcIntAnaSignalsMonConfig(rlUInt8_t deviceMap, rlGpadcIntAnaSignalsMonConf_t *data)
Sets information related to GPADC Internal Analog Signals monitoring.
rlUInt32_t reserved2
Reserved for Future use.
rlUInt16_t reserved1
Reserved for Future use.
MMWL_EXPORT rlReturnVal_t rlRfDigMonPeriodicConfig(rlUInt8_t deviceMap, rlDigMonPeriodicConf_t *data)
Sets the consolidated configuration.
TX ballbreak monitoring configuration.
MMWL_EXPORT rlReturnVal_t rlRfExtAnaSignalsMonConfig(rlUInt8_t deviceMap, rlExtAnaSignalsMonConf_t *data)
Sets information related to external DC signals monitoring.
rlUInt16_t txPhaseMismatchThresh
The magnitude of measured TX phase mismatch across the enabled channels at each enabled RF frequenc...
Synthesizer frequency monitoring configuration.
rlUInt8_t phShifterMonCfg
Enable at least two phase settings to measure phase error and to apply threshold in reporting mode 1 ...
Digital monitoring configuration.
rlUInt16_t hpfCutoffErrThresh
The absolute values of RX IF HPF cutoff percentage frequency errors are compared against the corres...
rlTxIntAnaSignalsMonConf_t * tx1IntAnaSgnlMonCfg
Internal signals in the Tx-1 path monitoring config.
rlUInt8_t rfFreqBitMask
This field indicates the exact RF frequencies inside the profile's RF band at which to measure the ...
rlUInt16_t ifaGainErrThresh
The absolute deviation of RX IFA Gain from the expected gain for each enabled RX channel is compare...
MMWL_EXPORT rlReturnVal_t rlRfPmClkLoIntAnaSignalsMonConfig(rlUInt8_t deviceMap, rlPmClkLoIntAnaSignalsMonConf_t *data)
Sets information related to Power Management, Clock generation and LO distribution.
rlUInt8_t reportMode
Value Definition 0 Report is sent every monitoring period without threshold check 1 Report is sen...
Internal signals for GPADC monitoring configuration.
TX Phase shifter monitoring configuration.
rlUInt16_t txPhShiftDacMonThresh
The TX phase shifter DAC monitor delta threshold when TX_PS_DAC_MON is Enabled 1 LSB = 1....
rlInt16_t anaTempThreshMax
The temperatures read from near the sensors near the RF analog modules are compared against a maximum...
rlInt8_t txPowOffsetValRF3
For AWR2243 devices : This field is reserved. Set it to 0x0. For xWR6243 devices : The offset value...
rlUInt16_t reserved1
Reserved for Future use.
rlUInt8_t profileIndx
The RF analog settings corresponding to this profile are used for monitoring the enabled signals,...
rlTxIntAnaSignalsMonConf_t * tx0IntAnaSgnlMonCfg
Internal signals in the Tx-0 path monitoring config.
RX mixer input power monitoring configuration.
rlUInt32_t reserved1
Reserved for Future use.
rlUInt8_t satMonSel
01 => Enable only the ADC saturation monitor 11 => Enable both the ADC and IFA1 saturation monitors
rlUInt16_t rxGainAbsThresh
The magnitude of difference between the programmed and measured RX gain for each enabled channel at...
rlUInt32_t reserved3
Reserved for Future use.
rlUInt16_t tempDiffThresh
The maximum difference across temperatures read from all the enabled sensors is compared against this...
MMWL_EXPORT rlReturnVal_t rlRfTxIntAnaSignalsMonConfig(rlUInt8_t deviceMap, rlAllTxIntAnaSignalsMonConf_t *data)
Sets information related to TX Internal Analog Signals monitoring.
rlUInt16_t dccPairEnables
This field indicates which pairs of clocks to monitor. When a bit in the field is set to 1,...
MMWL_EXPORT rlReturnVal_t rlRfRxNoiseMonConfig(rlUInt8_t deviceMap, rlRxNoiseMonConf_t *data)
Sets information related to RX noise monitoring.
rlUInt8_t phShifterIncVal3
Phase shifter monitoring increment value for phase3, the monitoring phase will be incremented by this...
rlUInt8_t phShifterMon3
TXn Phase shifter phase3 monitor value. Bits Phase shift definition b1:0 Reserved (set it to 0b00...
rlUInt8_t rfFreqBitMask
This field indicates the exact RF frequencies inside the profile's RF band at which to measure the ...
rlUInt16_t txPowAbsErrThresh
The magnitude of difference between the programmed and measured TX power for each enabled channel a...
rlUInt16_t reserved0
Reserved for Future use.
rlTxBallbreakMonConf_t * tx2BallBrkMonCfg
Tx ballbreak monitoring config for Tx2.
Analog monitoring configuration.
rlUInt8_t profileIndx
This field indicates the profile Index for which this configuration applies.
rlUInt8_t signalBuffEnables
This field indicates the sets of externally fed DC signals which are to be buffered before being fe...
rlInt8_t monChirpSlope
Frequency slope for each monitoring chirp is encoded in 1 bytes (8 bit signed number) For 77GHz Dev...
rlUInt32_t reserved0
Reserved for Future use.
rlUInt32_t reserved2
Reserved for Future use.
rlTxPowMonConf_t * tx2PowrMonCfg
Power Monitoring Configuration for Tx2.
rlUInt8_t rxEn
This field indicates the RX channels that should be enabled for TX to RX loopback measurement....
RX signal and image band energy statistics.
MMWL_EXPORT rlReturnVal_t rlRfRxIntAnaSignalsMonConfig(rlUInt8_t deviceMap, rlRxIntAnaSignalsMonConf_t *data)
Sets information related to RX Internal Analog Signals monitoring.
rlUInt8_t reportMode
Value Definition 0 RESERVED 1 Report is send only upon a failure(after checking for thresholds) ...
rlInt8_t txPowOffsetValRF2
For AWR2243 devices : This field is reserved. Set it to 0x0. For xWR6243 devices : The offset value...
rlUInt8_t signalInpEnables
This field indicates the sets of externally fed DC signals which are to be monitored using GPADC....
rlUInt32_t periodicEnableMask
Bit Monitoring 0 PERIODIC_CONFG_REGISTER_READ_EN 1 RESERVED 2 DFE_STC_EN 3 FRAME_TIMING_MONIT...
rlInt16_t anaTempThreshMin
The temperatures read from near the sensors near the RF analog modules are compared against a minimum...
Temperature sensor monitoring configuration.
rlUInt8_t reserved0
Reserved for Future use.
rlUInt8_t phShifterMon2
TXn Phase shifter phase2 monitor value. Bits Phase shift definition b1:0 Reserved (set it to 0b00...
rlUInt8_t lpfCutoffStopBandAttenThresh
The LPF stop band attenuation at 2x analog LPF’s band edge with respect to the analog LPF’s band ed...
rlInt16_t digTempThreshMax
The temperatures read from near the sensor near the digital module are compared against a maximum thr...
Internal signals in the TX path monitoring configuration.
rlUInt16_t rxGainPhaseMismatchErrThresh
The magnitude of measured RX phase mismatch across the enabled channels at each enabled RF frequenc...
Internal signals for PM, CLK and LO monitoring configuration.
rlUInt8_t sync20GSigSel
Value Definition 0 20GHz SYNC monitoring disabled 1 FMCW_SYNC_IN monitoring enabled 2 FMCW_SYNC...
MMWL_EXPORT rlReturnVal_t rlRfDualClkCompMonConfig(rlUInt8_t deviceMap, rlDualClkCompMonConf_t *data)
Sets information related to the DCC based clock frequency monitoring.
rlTxPowMonConf_t * tx0PowrMonCfg
Power Monitoring Configuration for Tx0.
rlTxPhShiftMonConf_t * tx0PhShiftMonCfg
Tx-0 Phase shifter monitoring config.
rlUInt8_t profileIndx
This field indicates the profile Index for which this configuration applies.
rlInt8_t txPowOffsetValRF1
For AWR2243 devices : This field is reserved. Set it to 0x0. For xWR6243 devices : The offset value...
rlUInt16_t txPhaseErrorThresh
The threshold for deviation of the TX output phase difference between the measured phase values and c...
rlUInt8_t reserved1
Reserved for Future use.
MMWL_EXPORT rlReturnVal_t rlRfTxGainPhaseMismatchMonConfig(rlUInt8_t deviceMap, rlTxGainPhaseMismatchMonConf_t *data)
Sets information related to TX gain and phase mismatch monitoring.
rlUInt8_t reportMode
Value Definition 0 Report is sent every monitoring period without threshold check 1 Report is sen...
rlUInt8_t reportMode
Value Definition 0 RESERVED 1 Report is send only upon a failure (after checking for thresholds) ...
rlUInt32_t reserved2
Reserved for Future use.
rlUInt16_t thresholds
The measured RX mixer input voltage swings during this monitoring is compared against the minimum a...
RX gain and phase monitoring configuration.
rlUInt8_t reserved0
Reserved for Future use.
rlUInt8_t reportMode
Value Definition 0 RESERVED 1 Report is send only upon a failure (after checking for thresholds) ...
rlUInt16_t reserved1
Reserved for Future use.
rlInt16_t digTempThreshMin
The temperatures read from near the sensor near the digital module are compared against a minimum thr...
rlUInt8_t phShifterMon1
TXn Phase shifter phase1 monitor value. Bits Phase shift definition b1:0 Reserved (set it to 0b00...
rlUInt8_t reportMode
Value Definition 0 Report is sent every monitoring period without threshold check 1 Report is sen...
rlUInt16_t reserved2
Reserved for Future use.
rlUInt16_t reserved1
Reserved for Future use.
rlUInt32_t reserved1
Reserved for Future use.
rlUInt8_t reserved3
Reserved for Future use.
rlUInt8_t phShifterIncVal4
Phase shifter monitoring increment value for phase4, the monitoring phase will be incremented by this...
rlUInt8_t rfFreqBitMask
This field indicates the RF frequencies inside the profile's RF band at which to measure the required...
rlUInt32_t reserved1
Reserved for Future use.
MMWL_EXPORT rlReturnVal_t rlRfTxPowrMonConfig(rlUInt8_t deviceMap, rlAllTxPowMonConf_t *data)
Sets information related to TX power monitoring.
rlUInt16_t txAmplErrorThresh
The threshold for deviation of the TX output amplitude difference between all enabled phase settings....
rlUInt32_t enMask
Bit: Dig Monitoring 0 Reserved 1 CR4 and VIM lockstep test of diagnostic 2 Reserved 3 VIM tes...
rlUInt32_t reserved1
Reserved for Future use.