Data Fields
rlDevCsi2Cfg_t Struct Reference

CSI2 configuration. More...

#include <control/mmwavelink/include/rl_device.h>

Data Fields

rlUInt32_t lanePosPolSel
 b2:0 - DATA_LANE0_POS
Valid values (Should be a unique position, lane 0 cannot be disabled):
001b - Position 1 (default),
010b - Position 2, 011b - Position 3,
100b - Position 4, 101b - Position 5
b3 DATA_LANE0_POL
0b - PLUSMINUS pin order, 1b - MINUSPLUS pin order
b6:4 DATA_LANE1_POS
Valid values (Should be a unique position if lane 1 is
enabled, ignored if lane 1 is not enabled):
000b - Unused, 001b - Position 1,
010b - Position 2 (default), 011b - Position 3,
100b - Position 4, 101b - Position 5
b7 DATA_LANE1_POL
0b - PLUSMINUS pin order, 1b - MINUSPLUS pin order
b10:8 DATA_LANE2_POS
Valid values (Should be a unique position if lane 2 is
enabled, ignored if lane 2 is not enabled):
000b - Unused, 001b - Position 1,
010b - Position 2, 011b - Position 3,
100b - Position 4 (default), 101b - Position 5
b11 DATA_LANE2_POL
0b - PLUSMINUS pin order, 1b - MINUSPLUS pin order
b14:12 DATA_LANE3_POS
Valid values (Should be a unique position if lane 3 is
enabled, ignored if lane 3 is not enabled):
000b - Unused, 001b - Position 1,
010b - Position 2, 011b - Position 3,
100b - Position 4, 101b - Position 5 (default)
b15 DATA_LANE3_POL
0b - PLUSMINUS pin order, 1b - MINUSPLUS pin order
b18:16 CLOCK_POS
Valid values (Should be a unique position):
001b - Position 1,
010b - Position 2, 011b - Position 3 (default),
100b - Position 4
b19 CLOCK_POL
0b - PLUSMINUS pin order, 1b - MINUSPLUS pin order
b31:20 RESERVED

 
rlUInt8_t lineStartEndDis
 CSI2 Line Start and End 1 - Disable 0 - Enable.
 
rlUInt8_t reserved0
 Reserved for future use.
 
rlUInt16_t reserved1
 Reserved for future use.
 

Detailed Description

CSI2 configuration.

Definition at line 963 of file rl_device.h.


The documentation for this struct was generated from the following file:

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