59 #define RL_MAX_TST_SRC_OBJECTS (2U) 62 #define RL_MAX_CALIB_DATA_CHUNK (3U) 67 #define RL_RX_CNT (4U) 72 #define RL_TX_CNT (3U) 77 #define RL_CHANNEL_DISABLE (0U) 78 #define RL_CHANNEL_ENABLE (1U) 83 #define RL_FRAME_TRIGGER_STOP (0x0U) 84 #define RL_FRAME_TRIGGER_START (0x1U) 89 #define RL_MAX_SUBFRAMES (4U) 94 #define RL_MAX_PROFILES_CNT (4U) 99 #define RL_RX_NOISE_FIGURE_LOW (0U) 100 #define RL_RX_NOISE_FIGURE_HIGH (1U) 101 #define RL_RX_NOISE_FIGURE_MAX (2U) 106 #define RL_ADC_DATA_12_BIT (0U) 107 #define RL_ADC_DATA_14_BIT (1U) 108 #define RL_ADC_DATA_16_BIT (2U) 109 #define RL_ADC_DATA_BIT_MAX (3U) 114 #define RL_ADC_FORMAT_REAL (0U) 115 #define RL_ADC_FORMAT_COMPLEX_1X (1U) 116 #define RL_ADC_FORMAT_COMPLEX_2X (2U) 117 #define RL_ADC_FORMAT_PSEUDO_REAL (3U) 118 #define RL_ADC_FORMAT_MAX (4U) 123 #define RL_ADC_MODE_REGULAR (0U) 124 #define RL_ADC_MODE_LOW_POWER (1U) 125 #define RL_ADC_MODE_MAX (2U) 130 #define RL_RX_BB_BW_AUTO (0x0U) 131 #define RL_RX_BB_BW_350_KHz (0x1U) 132 #define RL_RX_BB_BW_10_MHz (0x2U) 133 #define RL_RX_BB_BW_15_MHz (0x3U) 134 #define RL_RX_BB_BW_MAX (0x4U) 139 #define RL_RX_HPF1_175_KHz (0U) 140 #define RL_RX_HPF1_235_KHz (1U) 141 #define RL_RX_HPF1_350_KHz (2U) 142 #define RL_RX_HPF1_700_KHz (3U) 143 #define RL_RX_HPF1_MAX (4U) 148 #define RL_RX_HPF2_350_KHz (0U) 149 #define RL_RX_HPF2_700_KHz (1U) 150 #define RL_RX_HPF2_1p4_MHz (2U) 151 #define RL_RX_HPF2_2p8_MHz (3U) 152 #define RL_RX_HPF2_5p0_MHz (4U) 153 #define RL_RX_HPF2_7p5_MHz (5U) 154 #define RL_RX_HPF2_10_MHz (6U) 155 #define RL_RX_HPF2_15_MHz (7U) 156 #define RL_RX_HPF2_MAX (8U) 161 #define RL_RX_GAIN_30_dB (0x1EU) 162 #define RL_RX_GAIN_36_dB (0x24U) 163 #define RL_RX_GAIN_44_dB (0x2cU) 164 #define RL_RX_GAIN_50_dB (0x32U) 169 #define RL_FRAME_SYNC_MODE_SINGLE_CHIP (0x0U) 170 #define RL_FRAME_SYNC_MODE_MULT_CHIP_MASTER (0x1U) 171 #define RL_FRAME_SYNC_MODE_MULT_CHIP_SLAVE (0x2U) 172 #define RL_FRAME_SYNC_MODE_MAX (0x3U) 178 #define RL_FRAMESTRT_API_TRIGGER (0x1U) 179 #define RL_FRAMESTRT_SYNCIN_TRIGGER (0x2U) 184 #define RL_RXANA_COMPLEX (0U) 185 #define RL_RXANA_REAL (1U) 186 #define RL_RXANA_MODES_MAX (2U) 191 #define RL_MAX_NUM_OF_TEMP10_RANGES (19U) 196 #define RL_LUT_CHIRP_PROFILE_VAR (0x0U) 197 #define RL_LUT_CHIRP_FREQ_START_VAR (0x1U) 198 #define RL_LUT_CHIRP_FREQ_SLOPE_VAR (0x2U) 199 #define RL_LUT_CHIRP_IDLE_TIME_VAR (0x3U) 200 #define RL_LUT_CHIRP_ADC_START_TIME_VAR (0x4U) 201 #define RL_LUT_CHIRP_TX_EN_VAR (0x5U) 202 #define RL_LUT_CHIRP_BPM_VAL_VAR (0x6U) 203 #define RL_LUT_TX0_PHASE_SHIFT_VAR (0x7U) 204 #define RL_LUT_TX1_PHASE_SHIFT_VAR (0x8U) 205 #define RL_LUT_TX2_PHASE_SHIFT_VAR (0x9U) 210 #define RL_MAX_ADV_CHIRP_LUT_CHUNK_SIZE (212U) 220 typedef struct rlChanCfg
306 #ifndef MMWL_BIG_ENDIAN 307 typedef struct rlAdcBitFormat
335 typedef struct rlAdcBitFormat
340 rlUInt32_t b14Reserved1 :14;
344 rlUInt32_t b2AdcOutFmt :2;
352 rlUInt32_t b8FullScaleReducFctr:8;
356 rlUInt32_t b6Reserved0 :6;
360 rlUInt32_t b2AdcBits :2;
367 typedef struct rlAdcOutCfg
387 #ifndef MMWL_BIG_ENDIAN 388 typedef struct rlBpmModeCfg
408 typedef struct rlBpmModeCfg
413 rlUInt16_t b13Reserved1 :13;
417 rlUInt16_t b1Reserved0 :1;
425 rlUInt16_t b2SrcSel :2;
432 #ifndef MMWL_BIG_ENDIAN 433 typedef struct rlBpmKCounterSel
449 typedef struct rlBpmKCounterSel
454 rlUInt16_t b14Reserved :14;
458 rlUInt16_t b1BpmKEnd :1;
462 rlUInt16_t b1BpmKStart :1;
469 typedef struct rlBpmCommonCfg
500 typedef struct rlBpmChirpCfg
532 typedef struct rlLowPowerModeCfg
548 typedef struct rlPowerSaveModeCfg
571 rlUInt32_t reserved[4U];
580 typedef struct rlProfileCfg
586 #ifndef MMWL_BIG_ENDIAN 651 rlUInt8_t pfCalLutUpdate;
677 rlUInt8_t pfVcoSelect;
804 #ifndef MMWL_BIG_ENDIAN 829 rlUInt8_t hpfCornerFreq2;
837 rlUInt8_t hpfCornerFreq1;
902 typedef struct rlChirpCfg
971 typedef struct rlWordParam
973 rlUInt16_t halfWordOne;
974 rlUInt16_t halfWordTwo;
980 typedef struct rlFrameCfg
1075 typedef struct rlSubFrameCfg
1172 typedef struct rlAdvFrameSeqCfg
1174 #ifndef MMWL_BIG_ENDIAN 1218 rlUInt8_t forceProfile;
1222 rlUInt8_t numOfSubFrames;
1232 rlUInt8_t subFrameTrigger;
1241 rlUInt8_t loopBackCfg;
1292 typedef struct rlFrameApplyCfg
1315 typedef struct rlSubFrameDataCfg
1338 #ifndef MMWL_BIG_ENDIAN 1371 rlUInt8_t numChirpsInDataPacket;
1380 typedef struct rlAdvFrameDataCfg
1382 #ifndef MMWL_BIG_ENDIAN 1395 rlUInt8_t reserved0;
1399 rlUInt8_t numSubFrames;
1414 typedef struct rlAdvFrameCfg
1429 typedef struct rlContModeCfg
1475 #ifndef MMWL_BIG_ENDIAN 1530 rlUInt8_t hpfCornerFreq2;
1538 rlUInt8_t hpfCornerFreq1;
1551 rlUInt8_t vcoSelect;
1579 typedef struct rlContModeEn
1596 typedef struct rlFrameTrigger
1622 typedef struct rlTestSourceObject
1694 typedef struct rlTestSourceAntPos
1709 typedef struct rlTestSource
1727 #ifndef MMWL_BIG_ENDIAN 1746 rlUInt8_t reserved2;
1756 rlUInt8_t miscFunCtrl;
1763 typedef struct rlTestSourceEn
1778 typedef struct rlRfTempData
1831 typedef struct rlDfeRxdStatReport
1858 typedef struct rlDfeStatReport
1869 typedef struct rlDynPwrSave
1895 typedef struct rlRfDevCfg
1911 #ifndef MMWL_BIG_ENDIAN 1990 rlUInt8_t bssAnaControl;
2000 rlUInt8_t aeControl;
2016 rlUInt8_t bssDigCtrl;
2020 rlUInt8_t reserved1;
2024 rlUInt8_t reserved2;
2033 rlUInt8_t aeCrcConfig;
2045 typedef struct rlGpAdcSamples
2047 #ifndef MMWL_BIG_ENDIAN 2062 rlUInt8_t settlingTime;
2066 rlUInt8_t sampleCnt;
2073 typedef struct rlGpAdcCfg
2075 #ifndef MMWL_BIG_ENDIAN 2107 rlUInt8_t bufferEnable;
2133 rlUInt32_t reserved1[3U];
2139 typedef struct rlRfLdoBypassCfg
2159 #ifndef MMWL_BIG_ENDIAN 2187 rlUInt8_t ioSupplyIndicator;
2198 rlUInt8_t supplyMonIrDrop;
2206 typedef struct rlRfPhaseShiftCfg
2216 #ifndef MMWL_BIG_ENDIAN 2253 rlUInt8_t tx1PhaseShift;
2261 rlUInt8_t tx0PhaseShift;
2273 rlUInt8_t tx2PhaseShift;
2280 typedef struct rlRfPALoopbackCfg
2292 #ifndef MMWL_BIG_ENDIAN 2312 rlUInt8_t paLoopbackEn;
2319 typedef struct rlRfPSLoopbackCfg
2329 #ifndef MMWL_BIG_ENDIAN 2386 rlUInt8_t psLoopbackTxId;
2391 rlUInt8_t psLoopbackEn;
2395 rlUInt8_t reserved1;
2428 rlUInt8_t pgaGainIndex;
2435 typedef struct rlRfIFLoopbackCfg
2456 #ifndef MMWL_BIG_ENDIAN 2475 rlUInt8_t ifLoopbackEn;
2482 typedef struct rlRfProgFiltCoeff
2527 rlInt16_t coeffArray[104];
2533 typedef struct rlRfProgFiltConf
2535 #ifndef MMWL_BIG_ENDIAN 2577 rlUInt8_t coeffStartIdx;
2581 rlUInt8_t profileId;
2589 rlUInt8_t progFiltFreqShift;
2598 rlUInt8_t progFiltLen;
2605 typedef struct rlRfMiscConf
2657 typedef struct rlRfCalMonTimeUntConf
2685 #ifndef MMWL_BIG_ENDIAN 2764 rlUInt8_t numOfCascadeDev;
2778 rlUInt8_t monitoringMode;
2789 typedef struct rlRfCalMonFreqLimitConf
2830 typedef struct rlRfInitCalConf
2859 #ifndef MMWL_BIG_ENDIAN 2872 rlUInt8_t reserved1;
2876 rlUInt8_t reserved0;
2891 typedef struct rlRunTimeCalibConf
2943 #ifndef MMWL_BIG_ENDIAN 3080 rlUInt8_t reserved0;
3108 rlUInt8_t CalTempIdxOverrideEn;
3125 rlUInt8_t txPowerCalMode;
3149 rlUInt8_t CalTempIdxRx;
3173 rlUInt8_t CalTempIdxTx;
3177 rlUInt8_t reserved1;
3201 rlUInt8_t CalTempIdxLodist;
3208 typedef struct rlRxGainTempLutReadReq
3210 #ifndef MMWL_BIG_ENDIAN 3223 rlUInt8_t reserved0;
3227 rlUInt8_t profileIndx;
3238 typedef struct rlTxGainTempLutReadReq
3240 #ifndef MMWL_BIG_ENDIAN 3253 rlUInt8_t reserved0;
3257 rlUInt8_t profileIndx;
3268 typedef struct rlRxGainTempLutData
3270 #ifndef MMWL_BIG_ENDIAN 3320 rlUInt8_t rxGainTempLut[RL_MAX_NUM_OF_TEMP10_RANGES + 1U];
3325 rlUInt8_t reserved0;
3329 rlUInt8_t profileIndx;
3372 rlUInt8_t rxGainTempLut[RL_MAX_NUM_OF_TEMP10_RANGES + 1U];
3383 typedef struct rlTxGainTempLutData
3385 #ifndef MMWL_BIG_ENDIAN 3422 rlUInt8_t txGainTempLut[RL_TX_CNT][RL_MAX_NUM_OF_TEMP10_RANGES + 1U];
3427 rlUInt8_t reserved0;
3431 rlUInt8_t profileIndx;
3460 rlUInt8_t txGainTempLut[RL_TX_CNT][RL_MAX_NUM_OF_TEMP10_RANGES + 1U];
3471 typedef struct rlRfTxFreqPwrLimitMonConf
3548 #ifndef MMWL_BIG_ENDIAN 3577 rlUInt8_t tx1PwrBackOff;
3583 rlUInt8_t tx0PwrBackOff;
3587 rlUInt8_t reserved0;
3593 rlUInt8_t tx2PwrBackOff;
3616 typedef struct rlLoopbackBurst
3618 #ifndef MMWL_BIG_ENDIAN 3657 rlUInt8_t baseProfileIndx;
3671 rlUInt8_t loopbackSel;
3675 rlUInt8_t reserved0;
3681 rlUInt8_t burstIndx;
3734 #ifndef MMWL_BIG_ENDIAN 3757 rlUInt8_t reserved2;
3799 #ifndef MMWL_BIG_ENDIAN 3891 rlUInt8_t ps2PgaIndx;
3926 rlUInt8_t ps1PgaIndx;
3958 rlUInt16_t reserved4[3U];
3964 typedef struct rlChirpRow
4017 typedef struct rlDynChirpCfg
4019 #ifndef MMWL_BIG_ENDIAN 4051 rlUInt8_t chirpSegSel;
4070 rlUInt8_t chirpRowSelect;
4090 typedef struct rlDynChirpEnCfg
4101 typedef struct rlChirpPhShiftPerTx
4135 typedef struct rlDynPerChirpPhShftCfg
4137 #ifndef MMWL_BIG_ENDIAN 4154 rlUInt8_t chirpSegSel;
4179 typedef struct rlCalDataGetCfg
4195 typedef struct rlCalDataStore
4208 rlUInt8_t calData[224U];
4303 typedef struct rlCalibrationData
4311 typedef struct rlInterRxGainPhConf
4313 #ifndef MMWL_BIG_ENDIAN 4346 rlUInt8_t digCompEn;
4350 rlUInt8_t profileIndx;
4356 #ifndef MMWL_BIG_ENDIAN 4368 rlInt8_t digRxGainComp[RL_RX_CNT];
4381 rlInt8_t digRxGainComp[RL_RX_CNT];
4395 rlUInt16_t digRxPhShiftComp[RL_RX_CNT];
4396 #ifndef MMWL_BIG_ENDIAN 4410 rlUInt8_t digRxDelayComp[RL_RX_CNT];
4425 rlUInt8_t digRxDelayComp[RL_RX_CNT];
4430 rlUInt32_t reserved2[4U];
4447 rlInt16_t digRxFreqShift[RL_RX_CNT];
4474 rlInt16_t digTxFreqShift[RL_RX_CNT];
4478 rlUInt32_t reserved3[4U];
4484 typedef struct rlRfBootStatusCfg
4537 typedef struct rlInterChirpBlkCtrlCfg
4652 typedef struct rlSubFrameStartCfg
4669 typedef struct rlPhShiftCalDataGetCfg
4671 #ifndef MMWL_BIG_ENDIAN 4687 rlUInt8_t reserved0;
4706 typedef struct rlPhShiftCalibrationStore
4708 #ifndef MMWL_BIG_ENDIAN 4726 rlUInt8_t calibApply;
4774 rlUInt8_t observedPhShiftData[128U];
4786 typedef struct rlPhShiftCalibrationData
4794 typedef struct rlRfDieIdCfg
4833 typedef struct rlAdvChirpCfg
4835 #ifndef MMWL_BIG_ENDIAN 4879 rlUInt8_t resetMode;
4898 rlUInt8_t chirpParamIdx;
5056 #ifndef MMWL_BIG_ENDIAN 5092 rlUInt8_t lutChirpParamScale;
5105 rlUInt8_t lutChirpParamSize;
5131 typedef struct rlMonTypeTrigCfg
5133 #ifndef MMWL_BIG_ENDIAN 5151 rlUInt8_t reserved0;
5160 rlUInt8_t monTrigTypeEn;
5165 rlUInt16_t reserved1[3U];
5171 typedef struct rlRfApllSynthBwControl
5173 #ifndef MMWL_BIG_ENDIAN 5208 rlUInt8_t synthRzTrim;
5212 rlUInt8_t synthIcpTrim;
5216 rlUInt8_t apllRzTrimLpf;
5220 rlUInt8_t apllIcpTrim;
5224 rlUInt8_t reserved0;
5234 rlUInt8_t apllRzTrimVco;
5239 rlUInt16_t reserved[5U];
5246 typedef struct rlAdvChirpLUTCfg
5275 rlInt8_t calData[RL_MAX_ADV_CHIRP_LUT_CHUNK_SIZE];
5282 typedef struct rlAdvChirpDynLUTAddrOffCfg
5323 rlUInt16_t lutAddressOffset[10U];
5905 MMWL_EXPORT rlReturnVal_t
rlRfInit(rlUInt8_t deviceMap);
5909 rlUInt16_t profileId,
5916 MMWL_EXPORT rlReturnVal_t
rlGetChirpConfig(rlUInt8_t deviceMap, rlUInt16_t chirpStartIdx,
5929 MMWL_EXPORT rlReturnVal_t
rlSensorStart(rlUInt8_t deviceMap);
5930 MMWL_EXPORT rlReturnVal_t
rlSensorStop(rlUInt8_t deviceMap);
5977 MMWL_EXPORT rlReturnVal_t rlRfSetLdoBypassConfig(rlUInt8_t deviceMap,
6027 MMWL_EXPORT rlReturnVal_t rlRxGainTempLutGet(rlUInt8_t deviceMap,
6034 MMWL_EXPORT rlReturnVal_t rlTxGainTempLutGet(rlUInt8_t deviceMap,
rlInt16_t rxLoChainTurnOnTime
Time to wait after ramp end before turning on RX LO chain. 1 LSB = 10 ns Valid range: -1024 to 10...
Radar RF LDO bypass enable/disable configuration.
rlUInt32_t dieIDHexVal0
Die ID Hex Value 0.
rlInt16_t velY
Relative velocity in Cartesian coordinate Y velocity of object 1lsb = 1cm/s, Valid Range -5000 to +...
rlUInt16_t numOfBurstLoops
Number of times to loop over the set of above defined bursts, in the sub frame. Valid Range: 1 - 64...
rlUInt8_t reserved
Reserved for Future use.
rlUInt32_t subFramePeriodicity
subFramePeriodicity >= Sum total time of all bursts + InterSubFrameBlankTime, Where,...
rlInt16_t txLoChainTurnOnTime
Time to wait after ramp end before turning on TX LO chain. 1 LSB = 10 ns Valid range: -1024 to 10...
rlUInt8_t profileIndx
This field indicates the profile Index for which this configuration applies.
ADC format and payload justification Configuration.
MMWL_EXPORT rlReturnVal_t rlSetInterChirpBlkCtrl(rlUInt8_t deviceMap, rlInterChirpBlkCtrlCfg_t *data)
Sets Inter-chip turn on and turn off times or various RF blocks.
rlUInt32_t txPhaseShifter
Concatenated phase shift for TX0/1/2, Bit Description b1:0 Reserved (set to 0b00) b7:2 TX0 phase...
MMWL_EXPORT rlReturnVal_t rlGetRfBootupStatus(rlUInt8_t deviceMap, rlRfBootStatusCfg_t *data)
Get radarSS bootup status.
Test source Enable API parameters RL_RF_TEST_SOURCE_ENABLE_SB.
Radar RF Calibration monitoring time unit configuration.
rlInt16_t rxLoChainTurnOffTime
Time to wait after ramp end before turning off RX LO chain. 1 LSB = 10 ns Valid range: -1024 to 1...
MMWL_EXPORT rlReturnVal_t rlSetTestSourceConfig(rlUInt8_t deviceMap, rlTestSource_t *data)
Configures the Test Source.
Advanced chirp configuration structure.
rlUInt8_t baseProfileIndx
Base profile used for loopback chirps to configure the RF/analog/digital front end sections....
rlUInt16_t freqSlopeVar
Ramp slope For 77GHz devices(76GHz to 81GHz): 1 LSB = 3.6e6 * 900/2^26 = 48.279 KHz/us valid ran...
Advance Frame Sequence config API parameters rlAdvFrameCfg, 148 bytes.
rlUInt16_t reserved2
Reserved for future, should set to zero.
rlInt16_t tmpTx1Sens
TX1 temperature sensor reading (signed value). 1 LSB = 1 deg C.
rlUInt16_t triggerSelect
Selects the mode for triggering start of transmission of frame 0x0001 SWTRIGGER (Software API based...
MMWL_EXPORT rlReturnVal_t rlSetProfileConfig(rlUInt8_t deviceMap, rlUInt16_t cnt, rlProfileCfg_t *data)
Sets Chirp profile Configuration.
MMWL_EXPORT rlReturnVal_t rlFrameStartStop(rlUInt8_t deviceMap, rlFrameTrigger_t *data)
Triggers/Stops Transmission of Frames.
rlUInt32_t freqConst
Start frequency for loopback For 77GHz devices (76 GHz to 81 GHz): 1 LSB = 3.6e9 / 2^26 Hz = 53....
rlUInt16_t digCorrDis
Bits Digital corrections b0 IQMM correction disable (Applicable only in PS and PA loopback modes,...
MMWL_EXPORT rlReturnVal_t rlRfInterRxGainPhaseConfig(rlUInt8_t deviceMap, rlInterRxGainPhConf_t *data)
Sets different Rx gain/phase offset.
rlUInt8_t reserved0
Reserved for Future use.
rlUInt16_t chirpStartIdx
Chirp start index (0-511)
MMWL_EXPORT rlReturnVal_t rlTxGainTempLutSet(rlUInt8_t deviceMap, rlTxGainTempLutData_t *data)
Overwrites TX gain temperature based Lookup table (LUT)
rlInt32_t sf0ChirpParamDelta
This field indicates the delta increment (Delta Dither) value for sub-frame 0 (Also applicable for le...
API radarSS GPADC API MEAS SET SBC M_API_AR_RF_GPADC_API_SET_SB.
rlUInt16_t triggerSelect
Selects the mode for triggering start of transmission of frame 0x0001 SWTRIGGER (Software API based...
Dynamic chirp enable configuration.
MMWL_EXPORT rlReturnVal_t rlRfGetTemperatureReport(rlUInt8_t deviceMap, rlRfTempData_t *data)
Gets Time and Temperature information report.
rlUInt8_t synthRzTrim
Synth RZ trim code .
rlUInt8_t profileIndx
This field indicates the profile Index for which this configuration applies.
MMWL_EXPORT rlReturnVal_t rlGetRfDieId(rlUInt8_t deviceMap, rlRfDieIdCfg_t *data)
Get device die ID status.
rlUInt32_t bssSysStatus
radarSS bootup status Bit definition [1: pass, 0: fail] 0 image CRC validation 1 CPU and VIM self-tes...
rlUInt16_t programMode
Indicates when the configuration needs to be applied Bit Definition 0 Program the new configurati...
rlUInt32_t reserved2
Reserved for Future use.
Structure to hold the BSS ESM Fault data strucutre for event RL_RF_AE_ESMFAULT_SB.
rlUInt8_t profileIndx
This field indicates the profile Index for which this configuration applies.
MMWL_EXPORT rlReturnVal_t rlSetAdvChirpDynLUTAddrOffConfig(rlUInt8_t deviceMap, rlAdvChirpDynLUTAddrOffCfg_t *data)
Configure LUT address offset dynamically for each chirp parameters defined in rlSetAdvChirpConfig API...
rlUInt8_t reportEn
Calibration Report Enable Configuration [b0] Enable Calibration Reports Bitmap 0 - Disable Calibr...
rlUInt8_t reserved0
Reserved for Future use.
Structure to store all Phase shifter calibration data chunks which device provides in response of rlR...
rlInt32_t iqAvgCroCorrel
Average cross correlation between I and Q chains for profile x, RX channel x.
rlUInt16_t reserved1
Reserved for Future use.
Radar RF Phase shift loopback configuration.
rlUInt16_t cascading
Enable Cascading 0x0000 SINGLECHIP: Single mmWave sensor application 0x0001 MULTICHIP_MASTER: Mult...
rlUInt16_t lutBurstIndexOffset
This field provides the LUT index start offset for subsequent bursts in advanced frame config API....
rlInt16_t rx02BbTurnOffTime
Time to wait after ramp end before turning off RX0 and RX2 baseband stages. 1 LSB = 10 ns Valid r...
rlInt16_t posY
Relative position in Cartesian coordinate from sensor to objects Y position of object 1lsb = 1cm,...
rlUInt16_t lpAdcMode
0x00 : Regular ADC mode 0x01 : Low poer ADC mode
MMWL_EXPORT rlReturnVal_t rlRfGetCpuFault(rlUInt8_t deviceMap, rlCpuFault_t *data)
Get RadarSS CPU fault status.
MMWL_EXPORT rlReturnVal_t rlRfSetMiscConfig(rlUInt8_t deviceMap, rlRfMiscConf_t *data)
Sets misc feature such as per chirp phase shifter.
MMWL_EXPORT rlReturnVal_t rlTestSourceEnable(rlUInt8_t deviceMap, rlTestSourceEnable_t *data)
Enables the Test Source.
rlUInt16_t numBytes
Number of valid bytes to write. Valid range: 4 to 212, must be multiple of 4. .
MMWL_EXPORT rlReturnVal_t rlRfRunTimeCalibConfig(rlUInt8_t deviceMap, rlRunTimeCalibConf_t *data)
Set RF one time & periodic calibration of various RF/analog aspects and trigger.
rlUInt8_t reserved0
Reserved for Future use.
rlInt16_t posYMin
Boundary min limit, Obj location resets to posY if cross boundary Y position of min boundary 1lsb =...
RX gain temperature LUT inject.
Test source config API parameters E_API_AR_TEST_SOURCE_CONF_SB.
rlUInt16_t paLoopbackFreq
value is a 100MHz divider which sets the loopback frequency For e.g. for a 1 MHz frequency,...
rlUInt8_t numChirpsInDataPacket
Number of Chirps Per Data Packet to process at a time in sub frame 1. In AWR2243/AWR1243/xWR1443/xW...
rlUInt16_t chirpStartIdx
Start Index of Chirp Valid range = 0-511.
rlUInt16_t reserved1
Reserved for Future use.
rlUInt16_t profileId
Profile index (0-3)
MMWL_EXPORT rlReturnVal_t rlSetLowPowerModeConfig(rlUInt8_t deviceMap, rlLowPowerModeCfg_t *data)
Sets Low Power Mode Configuration.
rlInt16_t txStartTime
Time of start of transmitter relative to the knee of the ramp 1 LSB = 10ns Valid range: -4096 to ...
Tx freq and power limit configuration.
rlUInt8_t vcoSelect
Bit Description b0 FORCE_VCO_SEL(Not supported for production in xWR6243 , debug purpose only) 0 - ...
MMWL_EXPORT rlReturnVal_t rlGetProfileConfig(rlUInt8_t deviceMap, rlUInt16_t profileId, rlProfileCfg_t *data)
Gets Chirp profile Configuration.
rlUInt16_t maxTxPhShiftIntDither
This field is applicable only if SFn_CHIRP_PARAM_DELTA increment (Delta Dither) is enabled for Phase ...
rlUInt16_t reserved1
Reserved for Future use.
rlInt16_t posZMax
Boundary max limit, Obj location resets to posX if cross boundary Z position of max boundary 1lsb =...
MMWL_EXPORT rlReturnVal_t rlRfInit(rlUInt8_t deviceMap)
Initializes the RF/Analog Subsystem.
rlUInt16_t freqLimitLowTx0
rlUInt16_t freqLimitHighTx2
The sensor's higher frequency limit for calibrations and monitoring for TX2 is encoded in 2 bytes (...
rlUInt32_t reserved1
Reserved for future use.
rlUInt8_t reserved2
Reserved for Future use.
rlInt16_t txLoChainTurnOffTime
Time to wait after ramp end before turning off TX LO chain. 1 LSB = 10 ns Valid range: -1024 to 1...
rlInt16_t tmpPmSens
PM temperature sensor reading (signed value). 1 LSB = 1 deg C.
rlUInt8_t progFiltLen
The length (number of taps) of the filter corresponding to this profile. Together with the previous f...
rlUInt8_t numOfSubFrames
Number of sub frames enabled in this frame Valid range: 1 to 4.
rlUInt8_t lutChirpParamSize
This field is applicable only for LUT chirp parameters (LUT Dither) of type CHIRP_FREQ_START_VAR or C...
Get phase shift calibration data configuration structure.
rlUInt32_t frameTriggerDelay
Optional time delay from sync_in trigger to the occurance of frame chirps Applicable only in SINGLE...
rlUInt8_t numOfCascadeDev
The number of cascaded devices in system. This configuration by default set to value 1 in single ch...
Chirp config API parameters. This structure contains fine dithering to coarse profile defined in rlPr...
rlUInt32_t chirpNR3
Nth Chirp config Row 3 Bits Definition b11:0 IDLE_TIME_VAR 1 LSB = 10 ns Valid range: 0 to 4095 b15:1...
rlUInt8_t chirpNTx1PhaseShifter
Nth Chirp TX1 phase shift value Bits TX1 phase shift definition b1:0 RESERVED (set it to 0b00) b7:2 T...
rlUInt8_t pgaGainIndex
PGA gain value 0 : PGA is OFF 1 : -22 dB 2 : -16 dB 3 : -15 dB 4 : -14 dB 5 : -13 dB 6 ...
MMWL_EXPORT rlReturnVal_t rlRfGetEsmFault(rlUInt8_t deviceMap, rlBssEsmFault_t *data)
Get RadarSS ESM fault status.
rlInt16_t rx02RfPreEnTime
Time before TX Start Time when RX0 and RX2 RF stages are to be put in fast-charge state....
rlUInt16_t numFrames
Number of frame to transmit Valid Range 0 to 65535 (0 for infinite frames) .
rlUInt16_t idleTimeVar
Idle time for each chirp 1 LSB = 10ns valid range = 0-4096 .
rlUInt8_t reserved0
Reserved for Future use.
Frame config API parameters.
rlUInt16_t programMode
Indicates when the configuration needs to be applied Bit Definition 0 Program the new configurati...
rlUInt16_t qAvgPwr
Average power in Q chain for profile x, RX channel x.
rlUInt16_t b1Reserved0
Reserved for Future use.
rlUInt16_t reserved1
Reserved for Future use.
rlUInt16_t freqLimitLowTx1
rlInt8_t antPosX
Antenna position X 1lsb=wavelength/8 Valid range = +/-15 wave lengths.
rlUInt16_t reserved3
Reserved for Future use.
rlUInt8_t ifLbMag
1 LSB = 10 mV Valid range: 1 to 63
rlUInt16_t reserved
Reserved for Future use.
rlUInt16_t b13Reserved1
Reserved for Future use.
MMWL_EXPORT rlReturnVal_t rlRfSetCalMonFreqLimitConfig(rlUInt8_t deviceMap, rlRfCalMonFreqLimitConf_t *data)
Set Calibration monitoring Frequency Limit.
MMWL_EXPORT rlReturnVal_t rlMonTypeTrigConfig(rlUInt8_t deviceMap, rlMonTypeTrigCfg_t *data)
Maintains monitoring timing synchronization in cascaded devices to avoid mutual interference of monit...
rlUInt32_t reserved3
Reserved for future use.
rlUInt16_t b1BpmKStart
K Counter Start Select (Reserved for future)
rlUInt32_t bssBootUpTime
RF BIST SS power up time 1 LSB = 5ns.
rlInt16_t slopeConst
Ramp slope for loopback burst (16 bit signed number) For 77GHz devices (76 GHz to 81 GHz): 1 LSB ...
rlUInt32_t calibPeriodicity
This field is applicable only for those calibrations which are enabled to be done periodically in t...
rlUInt16_t chirpStartIdx
Chirp Start Index, Valid Range 0 -511.
rlUInt32_t reserved0
Reserved for Future use.
rlUInt16_t forceProfileIdx
Force profile index. This is applicable only if FORCE_SINGLE_PROFILE is set to 1.
rlInt16_t posZMin
Boundary min limit, Obj location resets to posZ if cross boundary Z position of min boundary 1lsb =...
rlUInt16_t ifLoopbackFreq
IF loopback frequency value 0: 180 kHz 1 : 240 kHz 2 : 360 kiHz 3 : 720 kHz 4 : 1 MHz 5 :...
rlInt8_t antPosZ
Antenna position Z 1lsb=wavelength/8 Valid range = +/-15 wave lengths.
MMWL_EXPORT rlReturnVal_t rlSetAdcOutConfig(rlUInt8_t deviceMap, rlAdcOutCfg_t *data)
Sets ADC Output Configuration.
rlUInt16_t chirpEndIdx
Chirp end index (0-511)
Radar RF Init Calibration configuration.
rlUInt32_t startFreqConst
Start frequency for each profile For 77GHz devices (76 GHz - 81 GHz): 1 LSB = 3....
rlUInt8_t digCompEn
This field can be used to enable or disable different digital compensation. Bits Assignment b0 Di...
MMWL_EXPORT rlReturnVal_t rlRfDynamicPowerSave(rlUInt8_t deviceMap, rlDynPwrSave_t *data)
: Configure dynamic power saving feature.
rlUInt16_t lowPwrStateTransCmd
Low power state transition commands are defined as below Mode Definition 0 RESERVED 1 ENTER_RF_...
rlUInt8_t apllRzTrimVco
APLL RZ VCO trim code AWR2243 device: Value Description .
rlUInt32_t txOutPowerBackoffCode
Concatenated code for output power backoff for TX0, TX1, TX2 b7:0 TX0 output power back off b15:8...
MMWL_EXPORT rlReturnVal_t rlRfSetCalMonTimeUnitConfig(rlUInt8_t deviceMap, rlRfCalMonTimeUntConf_t *data)
Set Calibration monitoring time unit.
rlUInt16_t profileId
Associated profile id (0-3)
Phase shift calibration data which application will receive from radarSS and will feed in to the Devi...
rlUInt16_t freqLimitLow
The sensor's lower frequency limit for calibrations and monitoring is encoded in 2 bytes (16 bit un...
rlUInt8_t numSubFrames
Number of Sub Frames, Valid Range (1 - 4)
rlUInt8_t aeControl
Bit Definition b0: FRAME_START_ASYNC_EVENT_DIS 0 Frame Start async event enable 1 Frame Start a...
rlUInt8_t tx1PhaseShift
TX1 phase shift definition [b1:0] reserved (set it to 0b00) [b7:2] TX1 phase shift value 1 LSB ...
Low Power mode configuration.
rlUInt16_t reserved1
Reserved for Future use.
MMWL_EXPORT rlReturnVal_t rlRfTxFreqPwrLimitConfig(rlUInt8_t deviceMap, rlRfTxFreqPwrLimitMonConf_t *data)
Sets the limits for RF frequency transmission for each TX and also TX power limits.
MMWL_EXPORT rlReturnVal_t rlRfPhShiftCalibDataRestore(rlUInt8_t deviceMap, rlPhShiftCalibrationData_t *data)
Injects phase shifter calibration data to the device.
rlUInt16_t reserved3
Reserved for Future use.
rlBpmModeCfg_t mode
BPM Mode configuration.
Dynamic power saving API parameters.
rlInt32_t sf1ChirpParamDelta
This field indicates the delta increment (Delta Dither) value for sub-frame 1 (Also applicable for le...
rlUInt8_t lutChirpParamScale
This field is applicable only for LUT chirp parameters (LUT Dither) of type CHIRP_FREQ_START_VAR or C...
MMWL_EXPORT rlReturnVal_t rlGetFrameConfig(rlUInt8_t deviceMap, rlFrameCfg_t *data)
Gets Frame Configuration.
rlUInt8_t reserved0
Reserved for Future use.
Binary phase modulation mode configuration.
rlUInt8_t reserved0
Reserved for Future use.
rlUInt32_t reserved1
Reserved for Future use.
rlUInt32_t periodicCalibEnMask
Automatic periodic triggering of calibrations of various RF/analog aspects. It has same bit definit...
rlUInt8_t hpfCornerFreq1
Code for HPF1 corner frequency 0x00 175 kHz 0x01 235 kHz 0x02 350 kHz 0x03 700 kHz .
rlUInt16_t reserved
Reserved for future.
rlUInt8_t tx0PhaseShift
TX0 phase shift definition [b1:0] reserved (set it to 0b00) [b7:2] TX0 phase shift value 1 LSB ...
rlUInt8_t ps1PgaIndx
Programmable Gain Amplifier Setting: This configures the Phase shifter loopback path amplifier gain f...
rlUInt8_t calibApply
Set this to 1 after injecting calibration data for all Txs to enable the firmware calibration....
rlUInt16_t numFrames
Number of frames to transmit (1 frame = all enabled sub frames). If set to 0, frames are transmitte...
rlUInt8_t reserved
Reserved for Future use.
rlUInt16_t constBpmVal
b0 RESERVED b1 CONST_BPM_VAL_TX0_TXON Value of Binary Phase Shift value for TX0,...
rlUInt16_t psLoopbackFreq
Loop back frequency in kHz, 1 LSB = 1kHz.
API RF device Config SBC M_API_AR_RF_DEV_CONF_SBC.
MMWL_EXPORT rlReturnVal_t rlRfSetPSLoopbackConfig(rlUInt8_t deviceMap, rlRfPSLoopbackCfg_t *data)
Enable/Disable Phase shift loopback for all enabled profiles.
Radar RF Phase Shift enable/disable configuration.
rlUInt32_t aeDirection
Bit Definition b1:0 Global Async event direction 00 - radarSS to MSS 01 - radarSS to HOST 10 - r...
rlInt32_t reserved1
Reserved for Future use.
rlUInt32_t startFreqVar
Ramp start frequency, For 77GHz devices(76GHz to 81GHz): 1 LSB = 3.6e9/2^26 = 53....
rlUInt8_t CalTempIdxLodist
Override temperature index is used to calibrate LO distribution of front end Idx val Definition 0: ...
MMWL_EXPORT rlReturnVal_t rlRfSetPhaseShiftConfig(rlUInt8_t deviceMap, rlUInt16_t cnt, rlRfPhaseShiftCfg_t *data)
Enable/Disable phase shift configurations per chirp in each of the TXs.
rlUInt16_t reserved1
Reserved for Future use.
rlInt16_t tmpTx0Sens
TX0 temperature sensor reading (signed value). 1 LSB = 1 deg C.
rlUInt16_t chirpStartIdx
Start index of the first chirp for the first burst in sub frame. Valid range: 0 to 511 This field...
MMWL_EXPORT rlReturnVal_t rlSensorStop(rlUInt8_t deviceMap)
Stops Transmission of Frames.
rlUInt8_t supplyMonIrDrop
IR drop is the voltage drop from the PMIC output to the device pin. The user should program the volta...
rlUInt32_t dieIDHexVal2
Die ID Hex Value 2.
rlUInt8_t ps2PgaIndx
Same as above definition.
Radar RF Calibration monitoring Frequency Limit configuration.
rlUInt8_t profileId
Profile Index for which this configuration applies.
rlUInt16_t chirpEndIdx
Chirp End Index, Valid Range from chirpStartIdx to 511.
rlUInt32_t totalChirps
Number of Chirps in Sub-Frame = numOfChirps * numLoops * numOfBurst * burstLoop.
rlUInt8_t chirpNTx2PhaseShifter
Nth Chirp TX2 phase shift value Bits TX2 phase shift definition b1:0 RESERVED (set it to 0b00) ...
rlUInt32_t psLbFreq
Phase shifter loop back frequency in kHz: The TX phase shifter's phase shift command word is linearly...
RF characterization Time and Temperature data structure.
rlUInt16_t reserved4
Reserved for Future use.
MMWL_EXPORT rlReturnVal_t rlSetPowerSaveModeConfig(rlUInt8_t deviceMap, rlPowerSaveModeCfg_t *data)
Sets the power save mode Configuration.
rlUInt8_t ioSupplyIndicator
IO supply indicator. This is used to indicate the IO supply to the MMIC device for setting the correc...
rlInt16_t velX
Relative velocity in Cartesian coordinate X velocity of object 1lsb = 1 cm/s, Valid Range -5000 to ...
rlUInt8_t chirpNTx0PhaseShifter
Nth Chirp TX0 phase shift value Bits TX0 phase shift definition b1:0 RESERVED (set it to 0b00) b7:2 T...
rlUInt16_t reserved
Reserved for future use.
rlUInt16_t reserved0
Reserved for Future use.
Frame config API parameters.
rlUInt8_t synthIcpTrim
Synth ICP trim code .
rlUInt16_t rxGain
b5:0 This field defines RX gain for each channel. 1 LSB = 1 dB Valid values: AWR2243 : All even...
rlInt16_t posZ
Relative position in Cartesian coordinate from sensor to objects Z position of object 1lsb = 1cm,...
rlUInt8_t profileIndx
This field indicates the profile Index for which this configuration applies.
rlUInt32_t txPhaseShifter
Concatenated phase shift for TX0/1/2, Bit Description b1:0 Reserved (set to 0b00) b7:2 TX0 phas...
rlInt16_t tmpDig1Sens
Second digital temp sensor reading (signed value).( applicable only in xWR1642/xWR6843/xWR1843....
rlUInt16_t chirpEndIdx
Chirp End Index, Valid Range from chirpStartIdx to 511.
TX gain temperature LUT read.
rlUInt16_t tsEnable
Test source Enable - 1, Disable - 0.
Array of coefficients for the RF programmable filter.
MMWL_EXPORT rlReturnVal_t rlSetAdvFrameConfig(rlUInt8_t deviceMap, rlAdvFrameCfg_t *data)
Sets Advance Frame Configuration.
rlUInt16_t reserved1
Reserved for Future use.
rlUInt16_t reserved1
Reserved for Future use.
rlUInt32_t reserved0
Reserved for Future use.
rlUInt16_t reserved0
Reserved for Future use.
rlUInt8_t chirpRowSelect
Reserved for Future use Bits Definition b3:0 Reserved b7:4 If user does not wish to reconfigure all 3...
rlUInt8_t forceProfile
Force profile. 0x0 The profile index set in rlSetChirpConfig API governs which profile is used wh...
rlUInt32_t reserved0
Reserved for future use.
rlUInt16_t addrMaskEn
Enable mask for LUT address offset dynamic update, the address is updated for following enabled chirp...
rlUInt8_t CalTempIdxTx
Override temperature index is used to calibrate Tx front end Idx val Definition 0: Index for temper...
Get calibration data configuration structure.
rlUInt16_t numOfChirps
Number of unique chirps per burst. Valid range: 1 to 512 This field is not applicable for loop-ba...
rlUInt16_t b1BpmKEnd
K Counter End Select (Reserved for future)
rlUInt32_t reserved3
Reserved for future, should set to zero.
rlUInt16_t chirpStartIdxOffset
Chirp Start address increment for next burst, next_burst_chirp_start_idx = last_chirp_end_index + ...
rlUInt8_t txPowerCalMode
TX Power Calibration Mode [b0] Enable Calibration Reports Bitmap 0 - Update TX gain setting from LU...
Dynamic per chirp phase shifter configuration for each TX.
rlUInt8_t reserved0
Reserved for future use.
rlUInt16_t deltaParamUpdatePeriod
The chirp parameter will be incremented by SFn_CHIRP_PARAM_DELTA (Delta Dither) every N chirps....
rlInt16_t tmpRx0Sens
RX0 temperature sensor reading (signed value). 1 LSB = 1 deg C.
rlInt16_t rx13RfTurnOnTime
Time before TX Start Time when RX1 and RX3 RF stages are to be enabled. 1 LSB = 10 ns Valid range...
rlUInt16_t blkCfg
Enable dynamic power saving during inter-chirp IDLE times by turning off various circuits e....
Advanced Chirp Dynamic LUT Address Offset Configuration Structure Configure LUT address offset dynami...
rlUInt16_t reserved1
Reserved for Future use.
rlUInt8_t reserved1
Reserved for Future use.
rlUInt32_t time
radarSS local Time from device powerup. 1 LSB = 1 ms
Num of samples to collect for API GPADC sensors sampleCnt : Number of samples to collect @625KHz.
rlInt16_t tmpRx1Sens
RX1 temperature sensor reading (signed value). 1 LSB = 1 deg C.
rlUInt8_t hpfCornerFreq2
Code for HPF2 corner frequency 0x00 350 kHz 0x01 700 kHz 0x02 1.4 MHz 0x03 2....
rlUInt16_t sigLvl
Reflecting obj' sig level at ADC o/p, relative to ADC Full Scale 1 LSB = -0.1 dBFS,...
rlUInt16_t reserved
Reserved for Future use.
rlUInt16_t reserved1
Reserved for Future use.
Radar RF IF loopback configuration.
rlInt16_t rx02RfTurnOnTime
Time before TX Start Time when RX0 and RX2 RF stages are to be enabled. 1 LSB = 10 ns Valid range...
MMWL_EXPORT rlReturnVal_t rlRfPhShiftCalibDataStore(rlUInt8_t deviceMap, rlPhShiftCalibrationData_t *data)
Read calibration data from the device.
rlUInt16_t freqLimitHighTx1
The sensor's higher frequency limit for calibrations and monitoring for TX1 is encoded in 2 bytes (...
rlUInt8_t apllRzTrimLpf
APLL RZ LPF trim code .
rlUInt8_t loopbackSel
Loopback selection Value Definition 0 No loopback 1 IF loopback (loopback of an IF test signal ...
Binary phase modulation KCounter configuration.
rlUInt8_t chirpSegSel
Indicates the segment of the chirp RAM that the 16 chirps definitions in this sub block map to any ...
rlUInt8_t CalTempIdxOverrideEn
Calibration Temperature Index Override Enable Enables the Host to override the use of device’s inte...
MMWL_EXPORT rlReturnVal_t rlSetFrameConfig(rlUInt8_t deviceMap, rlFrameCfg_t *data)
Sets Frame Configuration.
rlUInt32_t rampEndTime
End of ramp time relative to the knee of the ramp 1 LSB = 10 ns Valid range: 0 to 500000 Ensure t...
rlUInt16_t startCmd
Command for sub-frame trigger Value 0 = No effect Value 1 = Trigger next sub-frame .
rlUInt8_t hpfCornerFreq2
Code for HPF2 corner frequency 0x00 350 kHz 0x01 700 kHz 0x02 1.4 MHz 0x03 2....
rlUInt32_t reserved0
Reserved for Future use.
Power saving mode configuration.
rlUInt8_t txEn
Tx enable selection bit mask b0 Enable TX0 0 Tx0 Disable 1 Tx0 Enable b1 Enable TX1 0 Tx1 D...
rlInt16_t tmpDig0Sens
Digital temp sensor reading (signed value). 1 LSB = 1 deg C.
Advance Frame config API Subframe configuration.
rlUInt16_t txCalibEnCfg
Number of transmitters to turn on during TX power calibration. During actual operation,...
rlUInt8_t hpfCornerFreq1
Code for HPF1 corner frequency 0x00 175 kHz 0x01 235 kHz 0x02 350 kHz 0x03 700 kHz .
rlUInt8_t monitoringMode
Monitoring mode. Mostly applicable for cascade devices (recommended) to control execution of monito...
rlUInt16_t b2SrcSel
BPM_SRC_SEL (select source of BPM pattern) 00 CHIRP_CONFIG_BPM (refer to rlBpmChirpCfg_t 01 RESERV...
rlUInt32_t reserved1
Reserved for Future use.
rlUInt32_t reserved2
Reserved for Future use.
rlUInt16_t reserved
Reserved for Future use.
rlUInt8_t psLoopbackEn
Enable/Disable PA loopback 1: PS loopback Enable, 0: PS loopback Disable .
rlUInt16_t reserved0
Reserved for future, should set to zero.
rlUInt16_t reserved1
Reserved for Future use.
rlUInt8_t bssDigCtrl
Bit Definition b0: WDT_ENABLE 0 Keep watchdog disabled 1 Enable watch dog b7:1: Reserved .
rlUInt16_t numAdcSamples
Number of half words of ADC samples per data packet in sub frame 1 Example 1: In real mode,...
rlUInt16_t reserved
Reserved for Future use.
rlUInt8_t ifLbFreq
Value IF Loopback frequency value 0 180 kHz 1 240 kHz 2 360 kHz 3 720 kHz 4 1 MHz 5 2 MHz...
Dynamic chirp configuration for 16 chirp configurations.
rlUInt8_t pfVcoSelect
Bit Description b0 FORCE_VCO_SEL (Not supported for production in xWR6243 , debug purpose only) 0...
MMWL_EXPORT rlReturnVal_t rlRfCalibDataStore(rlUInt8_t deviceMap, rlCalibrationData_t *data)
Read calibration data from the device.
MMWL_EXPORT rlReturnVal_t rlEnableContMode(rlUInt8_t deviceMap, rlContModeEn_t *data)
Enable/Disable Continous mode.
MMWL_EXPORT rlReturnVal_t rlRxGainTempLutSet(rlUInt8_t deviceMap, rlRxGainTempLutData_t *data)
Overwrite RX gain temperature Lookup Table(LUT) in Radar SS.
MMWL_EXPORT rlReturnVal_t rlSetContModeConfig(rlUInt8_t deviceMap, rlContModeCfg_t *data)
Sets Continous mode Configuration.
rlUInt16_t freqLimitHigh
The sensor's higher frequency limit for calibrations and monitoring is encoded in 2 bytes (16 bit u...
rlUInt32_t reserved4
Reserved for future, should set to zero.
rlInt16_t freqSlopeConst
Ramp slope frequency, For 77GHz devices (76GHz to 81GHz): 1 LSB = (3.6e6 * 900) / 2^26 = 48....
rlAdcBitFormat_t fmt
ADC Data format.
rlUInt16_t txEnable
Tx enable selection bit mask b0 Enable TX0 0 Tx0 Disable 1 Tx0 Enable b1 Enable TX1 0 Tx1 D...
rlUInt16_t lutAddressOffset
Start address offset at which to populate the bytes of patterns. Address offset has to be multiple ...
rlUInt8_t chirpSegSel
Indicates the segment of the chirp RAM that the 16 chirps definitions in this sub block map to any ...
rlUInt8_t loopBackCfg
Bit Definition b0 LOOPBACK_CFG_EN 0 - Disable 1 - Enable b2:1 SUB_FRAME_ID for which the loop...
rlUInt32_t adcStartTimeConst
Time of starting of ADC capture relative to the knee of the ramp 1 LSB = 10 ns Valid range: 0 to 4...
rlUInt16_t reserved
Reserved for Future use.
rlUInt16_t reserved2
Reserved for Future use.
rlUInt16_t reserved2
Reserved for Future use.
MMWL_EXPORT rlReturnVal_t rlRfCalibDataRestore(rlUInt8_t deviceMap, rlCalibrationData_t *data)
Injects calibration data to the device.
rlInt16_t rx02RfTurnOffTime
Time to wait after ramp end before turning off RX0 and RX2 RF stages. 1 LSB = 10 ns Valid range: ...
rlUInt16_t numAdcSamples
Number of ADC samples to capture This parameter is required only for AWR1243/AWR2243/xWR6243 and conf...
rlUInt16_t reserved1
Reserved for Future use.
Calibration data which application will receive from radarSS and will feed in to the Device in next p...
rlUInt8_t reserved1
Reserved for Future use.
rlUInt32_t reserved2
Reserved for future use.
APLL Synthesizer Bandwidth Control.
rlUInt16_t numOfBurst
Num of bursts in the sub-frame. Valid Range: 1 - 512 Valid range: 1 to 16 for loop-back sub-frame ...
rlUInt16_t chunkId
Current Calibration Data Chunk Id. Valid range 0-2.
rlInt16_t posX
Relative position in Cartesian coordinate from sensor to objects X position of object 1lsb = 1cm,...
rlUInt8_t CalTempIdxRx
Override temperature index is used to calibrate Rx front end Idx val Definition 0: Index for temper...
rlUInt8_t reserved1
Reserved for Future use.
MMWL_EXPORT rlReturnVal_t rlSetMultiBpmChirpConfig(rlUInt8_t deviceMap, rlUInt16_t cnt, rlBpmChirpCfg_t **data)
Sets Binary Phase Modulation configuration for multiple Chirp.
MMWL_EXPORT rlReturnVal_t rlRfSetDeviceCfg(rlUInt8_t deviceMap, rlRfDevCfg_t *data)
: Set different RadarSS device configurations
rlUInt8_t rxGain
This field defines RX gain for continuous streaming mode. b5:0 This field defines RX gain for each ...
rlInt32_t sf3ChirpParamDelta
This field indicates the delta increment (Delta Dither) value for sub-frame 3 (Also applicable for le...
Binary phase modulation common configuration.
rlUInt8_t reserved
Reserved for Future use.
rlUInt32_t reserved
Reserved for Future use.
The DFE Statistics Report Contents.
rlUInt32_t reserved0
Reserved for Future use.
rlUInt8_t txIndex
Index of the transmitter channel for which the phase shift is desired Valid range: 0 to (Number of ...
rlUInt8_t coeffStartIdx
The index of the first coefficient of the programmable filter taps corresponding to this profile in t...
rlUInt32_t reserved1
Reserved for Future use.
rlInt16_t posYMax
Boundary max limit, Obj location resets to posX if cross boundary Y position of max boundary 1lsb =...
rlUInt8_t tx1PwrBackOff
TX1 output power back off 1LSB = 1dB Valid Value: 0, 3, 6, 9.
rlUInt16_t reserved1
Reserved for future, should set to zero.
Dynamic per chirp phase shifter configuration.
rlInt16_t tmpRx3Sens
RX3 temperature sensor reading (signed value). 1 LSB = 1 deg C.
rlUInt8_t reserved2
Reserved for Future use.
rlUInt32_t reserved1
Reserved for future use.
rlUInt8_t apllIcpTrim
APLL ICP trim code .
rlUInt16_t reserved0
Reserved for future use.
rlUInt32_t reserved4
Reserved for future use.
TX gain temperature LUT inject.
rlUInt16_t startStop
Start/Stop Frame 0x0000 - Stop the transmission of frames after the current frame 0x0001 - Trigge...
rlUInt8_t tx0PwrBackOff
TX0 output power back off 1LSB = 1dB Valid Value: 0, 3, 6, 9.
rlUInt16_t lutSfIndexOffset
This field provides the LUT index start offset for subsequent sub-frames in advanced frame config API...
rlInt16_t qAvgDC
Average DC value in Q chain for profile x, RX channel x.
rlUInt16_t chirpStartIdx
Chirp Start Index, Valid Range 0 -511.
MMWL_EXPORT rlReturnVal_t rlSetChannelConfig(rlUInt8_t deviceMap, rlChanCfg_t *data)
Sets the Rx and Tx Channel Configuration.
rlUInt16_t reserved
Reserved for Future use.
rlUInt8_t devId
Device Index value for each devices in cascade system. This configuration by default set to value 0...
rlUInt16_t reserved0
Reserved for Future use.
Rx/Tx Channel Configuration.
MMWL_EXPORT rlReturnVal_t rlSetBpmChirpConfig(rlUInt8_t deviceMap, rlBpmChirpCfg_t *data)
Sets Binary Phase Modulation Chirp Configuration.
rlUInt32_t reserved3
Reserved for Future use.
Radar RF PA loopback configuration.
rlUInt16_t calibMonTimeUnit
Defines the basic time unit, in terms of which calibration and/or monitoring periodicities are to b...
rlUInt16_t iAvgPwr
Average power in I chain for profile x, RX channel x.
rlInt16_t rx13BbPreEnTime
Time before TX Start Time when RX1 and RX3 baseband stages are to be put in fast-charge state....
MMWL_EXPORT rlReturnVal_t rlSetSubFrameStart(rlUInt8_t deviceMap, rlSubFrameStartCfg_t *data)
Triggers the next sub-frame in software triggered sub-frame mode.
rlUInt32_t reserved3
Reserved for Future use.
rlInt32_t sf2ChirpParamDelta
This field indicates the delta increment (Delta Dither) value for sub-frame 2 (Also applicable for le...
rlUInt8_t profileIndx
This field indicates the profile Index for which this configuration applies.
rlUInt8_t reserved0
Reserved for Future use.
MMWL_EXPORT rlReturnVal_t rlSetGpAdcConfig(rlUInt8_t deviceMap, rlGpAdcCfg_t *data)
: Configure GP ADC data parameters
rlUInt8_t settlingTime
Number of samples to skip before collecting the data 1 LSB = 0.8 us, Valid range: 0 to 12 us.
rlInt16_t rx13RfTurnOffTime
Time to wait after ramp end before turning off RX1 and RX3 RF stages. 1 LSB = 10 ns Valid range: ...
rlUInt8_t reserved
Reserved for Future use.
Binary phase modulation common configuration.
rlUInt16_t deltaResetPeriod
Reset the delta increment (Delta Dither) sequence every M chirps Index Parameter 0 Reset only as ...
rlInt16_t iAvgDC
Average DC value in I chain for profile x, RX channel x.
Radar RF Miscconfiguration.
rlUInt16_t reserved
Reserved for Future use.
rlInt16_t tmpRx2Sens
RX2 temperature sensor reading (signed value). 1 LSB = 1 deg C.
Inter Chirp block control configuration.
rlUInt32_t reserved1
Reserved for Future use.
rlUInt32_t reserved3
Reserved for Future use.
The Antenna position parameter structure.
rlUInt32_t dieIDHexVal3
Die ID Hex Value 3.
rlUInt8_t psLoopbackTxId
Tx used for loopback [b0] 1: Tx0 is used for loopback [b1] 1: Tx1 is used for loopback [b7:2] :...
Structure to store all Calibration data chunks which device provides in response of rlRfCalibDataStor...
rlUInt16_t rxGain
b5:0 This field defines RX gain for each channel. 1 LSB = 1 dB Valid values: AWR2243 : All even...
rlUInt8_t reserved1
Reserved for Future use.
rlUInt8_t reserved0
Reserved for Future use.
rlUInt32_t frameTrigDelay
Optional time delay from sync_in trigger to the occurance of frame chirps Applicable only in SINGLE...
MMWL_EXPORT rlReturnVal_t rlSetDynPerChirpPhShifterCfg(rlUInt8_t deviceMap, rlUInt16_t segCnt, rlDynPerChirpPhShftCfg_t **data)
Injects per-chirp phase shifter configuration to be applied dynamically.
rlAdvFrameDataCfg_t frameData
Advance Frame data configuration. Applicable with AWR1243/AWR2243/xWR6243 devices.
rlUInt32_t reserved0
Reserved for Future use.
rlUInt8_t enable
Enable different sensors [b0] 1: ANATEST1 Enable, 0: ANATEST1 Disable [b1] 1: ANATEST2 Enable,...
rlUInt8_t reserved0
Reserved for future use.
rlUInt8_t progFiltFreqShift
Determines the magnitude of the frequency shift do be done before filtering using the real-coefficien...
rlUInt16_t numLoops
Number of times to repeat from chirpStartIdx to chirpEndIdx in each frame, valid range = 1 to 255 ...
rlUInt32_t reserved3
Reserved for future use.
MMWL_EXPORT rlReturnVal_t rlSetBpmCommonConfig(rlUInt8_t deviceMap, rlBpmCommonCfg_t *data)
Sets Binary Phase Modulation Common Configuration.
rlUInt16_t reserved
Reserved for Future use.
MMWL_EXPORT rlReturnVal_t rlSetDynChirpCfg(rlUInt8_t deviceMap, rlUInt16_t segCnt, rlDynChirpCfg_t **data)
Injects chirp configuration to be programmed dynamically.
Radar RF Run time calibration configuration.
rlUInt8_t ifLoopbackEn
Enable/Disable IF loopback [b7:0] 1: IF loopback Enable, 0: IF loopback Disable .
rlUInt32_t reserved2
Reserved for future use.
Advance Frame Sequence config API parameters rlAdvFrameCfg, 148 bytes.
rlUInt32_t reserved2
Reserved for Future use.
rlUInt8_t resetMode
Reset mode of the programmed pattern Mode Definition 0 Reset at end of frame 1 Reset at end of ...
Continous Mode Enable API parameters.
rlUInt32_t chirpNR2
Nth Chirp config Row 2 Bits Definition b22:0 FREQ_START_VAR 1 LSB = 3.6e9/2^26 ~53....
rlUInt16_t reserved1
Reserved for future use.
Radar RF programmable filter configuration.
Advanced Chirp LUT Configuration Structure Load a generic chirp parameter LUT (firmware RAM of size 1...
Monitor Type Trigger configuration structure.
rlUInt8_t reserved2
Reserved for Future use.
rlUInt16_t reserved0
Reserved for Future use.
MMWL_EXPORT rlReturnVal_t rlRfSetPALoopbackConfig(rlUInt8_t deviceMap, rlRfPALoopbackCfg_t *data)
Enable/Disable PA loopback for all enabled profiles.
Structure to hold the MSS/radarSS CPU Fault data strucutre for event RL_DEV_AE_MSS_CPUFAULT_SB and RL...
rlUInt32_t txBackoff
Concatenated code for output power backoff for TX0, TX1, TX2 b7:0 TX0 output power back off b15:8 ...
rlUInt16_t ldoBypassEnable
Enable LDO bypass [b0] 1: RF LDO bypassed, Should be used only when 1.0V RF supply is provided 0: R...
rlUInt16_t paLbFreq
This value is a 100MHz divider which sets the loopback frequency: The PA output is fed to a modulator...
rlUInt8_t reserved
Reserved for Future use.
rlUInt16_t b14Reserved
Reserved for Future use.
rlUInt8_t reserved
Reserved for Future use.
Profile config API parameters. A profile contains coarse parameters of FMCW chirp such as start frequ...
rlUInt16_t digOutSampleRate
ADC Sampling rate for each profile is encoded in 2 bytes (16 bit unsigned number) 1 LSB = 1 ksps ...
rlUInt16_t numOfChunk
Number of calibration data chunks Available in device.
Chirp start, end Index parameters for rlGetChirpConfig.
MMWL_EXPORT rlReturnVal_t rlRfSetProgFiltCoeffRam(rlUInt8_t deviceMap, rlRfProgFiltCoeff_t *data)
Set Programmable Filter coefficient RAM.
rlUInt8_t bssAnaControl
Bit Definition b0 INTER_BURST_POWER_SAVE_DIS 0 Inter burst power save enable (default) 1 Inter ...
rlInt16_t posXMax
Boundary max limit, Obj location resets to posX if cross boundary X position of max boundary 1lsb =...
rlUInt8_t monTrigTypeEn
Monitor trigger type to control sequence of execution of monitors Bit Definition 0 Trigger Type 0...
rlUInt32_t oneTimeCalibEnMask
Upon receiving this trigger message, one time calibration of various RF/analog aspects are triggere...
rlUInt8_t paLoopbackEn
Enable/Disable PA loopback 1: PA loopback Enable, 0: PA loopback Disable .
rlUInt8_t reserved0
Reserved for future use.
rlInt16_t rx13RfPreEnTime
Time before TX Start Time when RX1 and RX3 RF stages are to be put in fast-charge state....
rlInt16_t posXMin
Boundary min limit, Obj location resets to posX if cross boundary X position of min boundary 1lsb =...
rlUInt16_t freqLimitLowTx2
rlUInt32_t numChirps
Number of Chirps per Frame.
rlUInt16_t chunkId
Get Calibration Data Chunk Id.
rlUInt16_t contModeEn
Enable continuous steaming mode 0x00 Disable continuous streaming mode 0x01 Enable continuous str...
rlInt16_t rx02BbTurnOnTime
Time before TX Start Time when RX0 and RX2 baseband stages are to be enabled. 1 LSB = 10 ns Valid...
rlUInt16_t lutPatternAddressOffset
This field provides the start address offset within the Generic SW Chirp Parameter LUT which holds di...
Sub Frame data config API parameters.
rlUInt32_t reserved1
Reserved for Future use.
rlUInt32_t startFreqConst
Start frequency For 77GHz devices (76 - 81 GHz): 1 LSB = 3.6e9 / 2^26 Hz = 53....
MMWL_EXPORT rlReturnVal_t rlGetAdvFrameConfig(rlUInt8_t deviceMap, rlAdvFrameCfg_t *data)
Gets Advance Frame Configuration.
rlUInt32_t calibEnMask
Allowed values = 0x000 or 0xFFF. Normally, upon receiving RF INIT message, the radarSS performs all r...
rlUInt8_t aeCrcConfig
CRC Config for Asynchornous event message Value Description 0 16 bit CRC for radarSS async events...
rlUInt32_t chirpNR1
Nth Chirp config Row 1 Bits Definition 3:0 PROFILE_INDX Valid range 0 to 3 7:4 RESERVED 13:8 FREQ_SLO...
rlUInt32_t txOutPowerBackoffCode
Concatenated code for output power backoff for TX0, TX1, TX2 Bit Description b7:0 TX0 output power...
Continous Mode config API parameters.
rlUInt16_t reserved
Reserved for future use.
Loopback burst set configuration.
rlUInt16_t lutResetPeriod
Reset the LUT sequence (LUT Dither) every J chirps Index Parameter 0 Reset only as per RESET MODE...
rlUInt16_t reserved
Reserved for future.
rlUInt8_t burstIndx
Indicates the index of the burst in the loopback sub-frame for which this configuration applies V...
rlUInt16_t cascadingPinoutCfg
Cascading pinout config b0 - CLKOUT_MASTER_DIS 0 - 20G FM_CW_CLKOUT from master is enabled 1 - ...
rlUInt16_t digOutSampleRate
ADC Sampling rate for each profile is encoded in 2 bytes (16 bit unsigned number) 1 LSB = 1 ksps ...
RX gain temperature LUT read.
rlUInt16_t reserved0
Reserved for Future use.
MMWL_EXPORT rlReturnVal_t rlSetMultiAdvChirpLUTConfig(rlUInt8_t deviceMap, rlAdvChirpLUTCfg_t *AdvChirpLUTCfgArgs, rlInt8_t *AdvChirpLUTData)
Multi Advanced chirp LUT configuration API.
rlUInt16_t adcStartTimeVar
Adc start time for each chirp 1 LSB = 10ns valid range = 0-4096 .
BSS Bootup status data structure.
rlUInt16_t chirpEndIdx
End Index of Chirp Valid range = chirpStartIdx-511.
Advance Frame data config API parameters. This structure is only applicable when mmWaveLink instance ...
rlUInt32_t idleTimeConst
Idle time 1 LSB = 10 ns Valid range: 0 to 524287 .
MMWL_EXPORT rlReturnVal_t rlSetAdvChirpLUTConfig(rlUInt8_t deviceMap, rlAdvChirpLUTCfg_t *data)
Set the Advanced chirp LUT configuration to the device.
rlInt32_t reserved0
Reserved for Future use.
rlInt16_t tmpTx2Sens
TX2 temperature sensor reading (signed value). 1 LSB = 1 deg C.
rlUInt16_t numLoops
No. of times to loop through the unique chirps in each burst, without gaps, using HW....
rlInt16_t rx13BbTurnOnTime
Time before TX Start Time when RX1 and RX3 baseband stages are to be enabled. 1 LSB = 10 ns Valid...
MMWL_EXPORT rlReturnVal_t rlSensorStart(rlUInt8_t deviceMap)
Triggers Transmission of Frames.
MMWL_EXPORT rlReturnVal_t rlSetDynChirpEn(rlUInt8_t deviceMap, rlDynChirpEnCfg_t *data)
Triggers copy of chirp config from SW to HW RAM.
MMWL_EXPORT rlReturnVal_t rlRfSetProgFiltConfig(rlUInt8_t deviceMap, rlRfProgFiltConf_t *data)
Set Programmable Filter configuration.
MMWL_EXPORT rlReturnVal_t rlRfSetIFLoopbackConfig(rlUInt8_t deviceMap, rlRfIFLoopbackCfg_t *data)
Enable/Disable RF IF loopback for all enabled profiles. This is used for debug to check if both TX an...
rlUInt16_t freqLimitHighTx0
The sensor's higher frequency limit for calibrations and monitoring for TX0 is encoded in 2 bytes (...
rlUInt32_t dieIDHexVal1
Die ID Hex Value 1.
rlUInt16_t reserved0
Reserved for Future use.
rlUInt8_t miscFunCtrl
Miscellaneous control functionality. Bits Dither b0 value Definition 0 Dither is enabled in tes...
MMWL_EXPORT rlReturnVal_t rlSetMultiChirpCfg(rlUInt8_t deviceMap, rlUInt16_t cnt, rlChirpCfg_t **data)
Injects chirp configuration to be programmed dynamically.
MMWL_EXPORT rlReturnVal_t rlSetAdvChirpConfig(rlUInt8_t deviceMap, rlAdvChirpCfg_t *data)
Set the Advanced chirp configuration to the device.
rlUInt8_t sampleCnt
Number of samples to collect.
Frame Trigger API parameters RL_RF_FRAMESTARTSTOP_CONF_SB.
rlUInt16_t reserved0
Reserved for future use.
rlUInt32_t miscCtl
b0 PERCHIRP_PHASESHIFTER_EN 0 Per chirp phase shifter is disabled 1 Per chirp phase shifter is en...
rlUInt16_t numAdcSamples
Number of ADC samples to capture in a chirp for each RX Valid range: 2 to MAX_NUM_SAMPLES Where MA...
MMWL_EXPORT rlReturnVal_t rlRfInitCalibConfig(rlUInt8_t deviceMap, rlRfInitCalConf_t *data)
Set RF Init Calibration Mask bits and report type.
rlUInt16_t numAdcSamples
Number of half words in ADC buffer per chirp Example 1: In real mode, if number of ADC samples per ...
The DFE Statistics for Rx Channel for particular profile.
MMWL_EXPORT rlReturnVal_t rlSetLoopBckBurstCfg(rlUInt8_t deviceMap, rlLoopbackBurst_t *data)
This API is used to introduce loopback chirps within the functional frames.
rlUInt8_t subFrameTrigger
Sub frame trigger 0 - Disabled (default mode, i.e no trigger is required in SW triggered mode and a...
rlUInt16_t lutParamUpdatePeriod
The chirp parameter (LUT Dither) will be updated with new value from LUT every K chirps....
rlUInt32_t reserved
Reserved for Future use.
Inter-Rx gain and phase offset configuration.
rlUInt32_t framePeriodicity
Frame repitition period PERIOD >= Sum total time of all chirps + InterFrameBlankTime,...
rlInt16_t velZ
Relative velocity in Cartesian coordinate Z velocity of object 1lsb = 1cm/s, Valid Range -5000 to +...
rlUInt16_t numOfPatterns
This field provides the number of unique dither parameters present in LUT. This information is used...
rlUInt8_t pfCalLutUpdate
Bit Description b0 RETAIN_TXCAL_LUT 0 - Update TX calibration LUT 1 - Do not update TX calibrat...
MMWL_EXPORT rlReturnVal_t rlRfDfeRxStatisticsReport(rlUInt8_t deviceMap, rlDfeStatReport_t *data)
Gets Digital Front end statistics such as Residual DC, RMS power in I and Q chains for different Rece...
MMWL_EXPORT rlReturnVal_t rlRfApllSynthBwCtlConfig(rlUInt8_t deviceMap, rlRfApllSynthBwControl_t *data)
Control bandwidth of the APLL and Synthesizer.
rlUInt8_t tx2PhaseShift
TX2 phase shift definition [b1:0] reserved (set it to 0b00) [b7:2] TX2 phase shift value 1 LSB ...
rlInt16_t rx12BbTurnOffTime
Time to wait after ramp end before turning off RX1 and RX3 baseband stages. 1 LSB = 10 ns Valid r...
rlUInt8_t bufferEnable
Enable buffer for each input [b0] 1: ANATEST1 buffer enable, 0: ANATEST1 buffer disable [b1] 1: A...
MMWL_EXPORT rlReturnVal_t rlGetChirpConfig(rlUInt8_t deviceMap, rlUInt16_t chirpStartIdx, rlUInt16_t chirpEndIdx, rlChirpCfg_t *data)
Gets Chirp Configuration.
rlUInt8_t reserved0
Reserved for Future use.
rlUInt32_t burstPeriodicity
burstPeriodicity >= (numLoops)* (sum total of all unique chirp times per burst) + InterBurstBlankTime...
rlInt16_t rx02BbPreEnTime
Time before TX Start Time when RX0 and RX2 baseband stages are to be put in fast-charge state....
The Object position and signal strength parameter structure.
rlUInt16_t bpmConfig
Bit Definition b0 RESERVED b1 CONST_BPM_VAL_TX0_ON Value of Binary Phase Shift value for TX0,...
rlUInt8_t txIndex
Index of the transmitter channel for which the phase shift is desired Valid range: 0 to (Number of ...
rlUInt8_t tx2PwrBackOff
TX2 output power back off 1LSB = 1dB Valid Value: 0, 3, 6, 9.
rlUInt16_t reserved
Reserved for Future use.
rlUInt32_t reserved1
Reserved for Future use.
rlUInt8_t chirpParamIdx
Chirp parameter that the current API configures. The mapping and availability of dither modes are as ...
MMWL_EXPORT rlReturnVal_t rlSetChirpConfig(rlUInt8_t deviceMap, rlUInt16_t cnt, rlChirpCfg_t *data)
Sets Chirp Configuration.
rlAdvFrameSeqCfg_t frameSeq
Advance Frame sequence and Subframe configuration.
rlUInt16_t txChannelEn
TX Channel Bitmap b0 TX0 Channel Enable 0 Disable TX Channel 0 1 Enable TX Channel 0 b1 TX1 Ch...
Chirp row configuration, radarSS stores each chirp config in memory in 3 rows.