53 #include <ti/control/mmwavelink/include/rl_protocol.h> 54 #include <ti/control/mmwavelink/include/rl_sensor.h> 70 #define RL_DEV_I_FIRST (0x0U) 71 #define RL_DEV_Q_FIRST (0x1U) 72 #define RL_DEV_IQSWAP_MAX (0x2U) 77 #define RL_DEV_CH_INTERLEAVED (0x0U) 78 #define RL_DEV_CH_NON_INTERLEAVED (0x1U) 79 #define RL_DEV_CH_INTERLEAVE_MAX (0x2U) 85 typedef struct rlFileData
94 rlUInt16_t fData[RL_CMD_PL_LEN_MAX/2U];
101 typedef struct rlMcuClkCfg
103 #ifndef MMWL_BIG_ENDIAN 152 rlUInt8_t mcuClkCtrl;
175 typedef struct rlPmicClkCfg
177 #ifndef MMWL_BIG_ENDIAN 225 rlUInt8_t pmicClkSrc;
232 rlUInt8_t pmicClkCtrl;
268 #ifndef MMWL_BIG_ENDIAN 301 rlUInt8_t maxNdivVal;
307 rlUInt8_t minNdivVal;
321 rlUInt8_t clkDitherEn;
328 typedef struct rllatentFault
376 #ifndef MMWL_BIG_ENDIAN 414 typedef struct rlperiodicTest
432 #ifndef MMWL_BIG_ENDIAN 464 typedef struct rltestPattern
466 #ifndef MMWL_BIG_ENDIAN 484 rlUInt8_t testPatGenTime;
491 rlUInt8_t testPatGenCtrl;
597 typedef struct rlDevDataFmtCfg
623 #ifndef MMWL_BIG_ENDIAN 647 rlUInt8_t chInterleave;
665 typedef struct rlDevDataPathCfg
667 #ifndef MMWL_BIG_ENDIAN 754 rlUInt8_t transferFmtPkt0;
782 rlUInt8_t transferFmtPkt1;
790 rlUInt8_t cq2TransSize;
798 rlUInt8_t cq1TransSize;
810 rlUInt8_t cq0TransSize;
817 typedef struct rlDevLaneEnable
845 typedef struct rlDevDataPathClkCfg
847 #ifndef MMWL_BIG_ENDIAN 882 rlUInt8_t laneClkCfg;
893 typedef struct rlDevLvdsLaneCfg
935 typedef struct rlDevContStreamingModeCfg
950 typedef struct rlDevCsi2Cfg
995 #ifndef MMWL_BIG_ENDIAN 1010 rlUInt8_t reserved0;
1016 rlUInt8_t lineStartEndDis;
1027 typedef struct rlDevHsiClk
1048 typedef struct rlDevHsiCfg
1067 typedef struct rlDevConfig
1069 #ifndef MMWL_BIG_ENDIAN 1093 rlUInt8_t miscDevCfg;
1100 rlUInt8_t aeCrcConfig;
1119 typedef struct rlDebugSigEnConfig
1155 typedef struct rlHsiDelayDummyConfig
1157 #ifndef MMWL_BIG_ENDIAN 1176 rlUInt8_t reserved0;
1186 rlUInt8_t enableMode;
1229 typedef struct rlDevInternalCfg
1239 typedef struct rlFillLUTParams
1293 rlUInt16_t remChunks);
1381 MMWL_EXPORT rlReturnVal_t rlDeviceGetDataPathClkConfig(rlUInt8_t deviceMap,
1383 MMWL_EXPORT rlReturnVal_t rlDeviceSetLvdsLaneConfig(rlUInt8_t deviceMap,
1385 MMWL_EXPORT rlReturnVal_t rlDeviceGetLvdsLaneConfig(rlUInt8_t deviceMap,
1396 rlUInt32_t memAddr, rlUInt32_t value);
1398 rlUInt32_t memAddr, rlUInt32_t* value);
1404 rlInt8_t *outData, rlUInt16_t *LUTAddrOffset);
rlUInt8_t transferFmtPkt0
Data out Format, b5:0 Packet 0 content selection 000001 - ADC_DATA_ONLY 000110 - CP_ADC_DATA ...
MMWL_EXPORT rlReturnVal_t rlDevicePmicClkConfig(rlUInt8_t deviceMap, rlPmicClkCfg_t *data)
Sets the configurations for PMIC clock.
rlUInt16_t reserved
Reserved for future use .
MMWL_EXPORT rlReturnVal_t rlDeviceSetDataFmtConfig(rlUInt8_t deviceMap, rlDevDataFmtCfg_t *data)
Sets LVDS/CSI2 Data output format.
rlUInt16_t lutGlobalOffset
LUT offset within the entire 12kB buffer .
rlUInt8_t mcuClkSrc
This field specifies the source of the MCU clock. Applicable only in case of MCU clock enable....
MMWL_EXPORT rlReturnVal_t rlDeviceRfStart(rlUInt8_t deviceMap)
Enables mmwave RF/Analog Sub system.
mmWaveLink client callback structure
rlUInt16_t testPatrnPktSize
Number of ADC samples to capture for each RX Valid range: 64 to MAX_NUM_SAMPLES, Where MAX_NUM_SAMPLE...
rlUInt32_t reserved
Reserved for future use.
rlUInt16_t contStreamModeEn
Enable - 1, Disable - 0.
MMWL_EXPORT rlReturnVal_t rlDeviceMcuClkConfig(rlUInt8_t deviceMap, rlMcuClkCfg_t *data)
Sets the configurations to setup the desired frequency of the MCU Clock.
rlUInt32_t freqSlope
Applicable only in case of PMIC clock enable. Else ignored. Bit[25:0] - Frequency slope value to be...
rlUInt32_t testPatRx1Qcfg
This field specifies the values for Rx1, Q channel. Applicable only in case of test pattern enable....
rlUInt32_t lanePosPolSel
b2:0 - DATA_LANE0_POS Valid values (Should be a unique position if lane 0 is enabled,...
rlUInt16_t reserved2
Reserved for future use.
MMWL_EXPORT rlReturnVal_t rlDeviceGetCsi2Config(rlUInt8_t deviceMap, rlDevCsi2Cfg_t *data)
Gets Csi2 data format Configuration.
rlUInt8_t reserved0
Reserved for future use.
MMWL_EXPORT rlReturnVal_t rlDeviceLatentFaultTests(rlUInt8_t deviceMap, rllatentFault_t *data)
Sets the configurations for latent fault test.
mmWaveLink firmware version structure
MMWL_EXPORT rlReturnVal_t rlDeviceGetMmWaveLinkVersion(rlSwVersionParam_t *data)
Get mmWaveLink Version.
rlUInt16_t delayVal
Delay Count value. Mode DELAY_VAL Definition 0 NA 1 1 LSB = 20 ns delay Delay Added = (DELAY_...
rlUInt16_t clkOut
0 : NO_CLK_OUT, Disable clock out signal 1 : REF_CLK_OUT, Reference clock out enable 2 : APLL_CLK...
MMWL_EXPORT rlReturnVal_t rlDeviceSetTestPatternConfig(rlUInt8_t deviceMap, rltestPattern_t *data)
Setup for test pattern to be generated.
MMWL_EXPORT rlReturnVal_t rlDeviceSetDataPathClkConfig(rlUInt8_t deviceMap, rlDevDataPathClkCfg_t *data)
Sets LVDS Clock Configuration.
rlUInt8_t chInterleave
Channel interleaving of the samples stored in the ADC buffer to be transferred out on the data path...
Structure used for filling chirp LUT parameter buffer for Advanced chirp configuration....
rlUInt8_t srcClkDiv
This field specifies the division factor to be applie to source clock. Applicable only in case of P...
MMWL_EXPORT rlReturnVal_t rlDeviceSetContStreamingModeConfig(rlUInt8_t deviceMap, rlDevContStreamingModeCfg_t *data)
Sets Continous Streaming Mode Configuration.
MMWL_EXPORT rlReturnVal_t rlDeviceRemoveDevices(rlUInt8_t deviceMap)
Removes connected mmwave devices.
rlUInt8_t reserved
Reserved for future use.
rlDevDataPathCfg_t * dataPath
Data path config.
rlUInt16_t reserved
Reserved for future use.
rlUInt16_t rxChannelEn
RX Channel Bitmap b0 RX0 Channel Enable 0 Disable RX Channel 0 1 Enable RX Channel 0 b1 RX1 C...
mmwave radar data path config.
MMWL_EXPORT rlReturnVal_t rlDeviceSetHsiClk(rlUInt8_t deviceMap, rlDevHsiClk_t *data)
Sets High Speed Interface Clock.
rlUInt8_t lineStartEndDis
CSI2 Line Start and End 1 - Disable 0 - Enable.
rlUInt32_t testPatRx2Icfg
This field specifies the values for Rx2, I channel. Applicable only in case of test pattern enable....
rlUInt8_t aeCrcConfig
Set CRC type of Async Event message from MSS to Host 0 - 16 Bit CRC 1 - 32 Bit CRC 2 - 64 Bit C...
Continous streaming mode configuration.
rlUInt16_t laneParamCfg
Lane Parameter configurations b0 - 0(LSB first), 1(MSB first) b1 - 0(Packet End Pulse Disable),...
MMWL_EXPORT rlReturnVal_t rlDeviceEnablePeriodicTests(rlUInt8_t deviceMap, rlperiodicTest_t *data)
Sets the configurations for periodic test.
rlUInt32_t reserved1
Reserved for future use.
mmwave radar high speed Data path configuraiton
DataPath clock configuration.
mmwave radar high speed clock configuration
mmwave radar device latent fault test
rlUInt32_t testEn1
Bits Definition 0 RESERVED 1 DMA self-test 2 RESERVED 3 RTI self-test 4 RESERVED 5 EDMA s...
rlUInt8_t cq0TransSize
Number of samples (in 16 bit halfwords) of CQ0 data to be transferred. Valid range [32 halfwords to 1...
rlUInt8_t intfSel
Data Path Interface, 0x0 CSI2 interface selected 0x1 LVDS interface selected .
rlUInt16_t adcFmt
ADC out format - 0(Real), 1(Complex), 2(Complex with Image band), 3(Pseudo Real)
mmwave radar device config
MMWL_EXPORT rlReturnVal_t rlDeviceGetRfVersion(rlUInt8_t deviceMap, rlFwVersionParam_t *data)
Get mmWave RF ROM and patch version.
MMWL_EXPORT rlReturnVal_t rlDeviceGetMssVersion(rlUInt8_t deviceMap, rlFwVersionParam_t *data)
Get mmWave Master SS version.
rlUInt32_t testPatRx3Icfg
This field specifies the values for Rx3, I channel. Applicable only in case of test pattern enable....
rlUInt16_t reserved
Reserved for future use.
rlUInt16_t chirpParamIndex
Chirp Parameter Index Valid range: 0 to 9 .
rlUInt16_t reserved1
Reserved for future use.
rlUInt8_t reserved
Reserved for future use.
Frame config API parameters.
rlUInt16_t laneFmtMap
Lane format 0x0000 Format map 0 (Rx0,Rx1,...) 0x0001 Format map 1 (Rx3,Rx2,......
rlUInt8_t repMode
Value Definition 0 Report is sent every monitoring period 1 Report is sent only on a failure .
MMWL_EXPORT rlReturnVal_t rlDeviceFileDownload(rlUInt8_t deviceMap, rlFileData_t *data, rlUInt16_t remChunks)
Download mmwave Firmware/Patches over SPI.
mmwave radar test pattern config
rlUInt8_t miscDevCfg
Bit Description 0 1 - Enable MSS logger 0 - Disable MSS logger Default value : 0 1-31 Reserve...
rlUInt8_t testMode
Value Definition 0 Production mode. Latent faults are tested and any failures are reported 1 Char...
rlUInt32_t testEn2
Bits Definition 0 RESERVED 1 RESERVED 2 RESERVED 3 VIM RAM parity test 4 SCI boot time test...
rlUInt8_t dataRate
Data rate selection 0001b - 600 Mbps (DDR only) 0010b - 450 Mbps (SDR, DDR) 0011b - 400 Mbps (D...
rlUInt8_t modeSel
This field specifies the mode of operation for the PMIC clock generation. Applicable only in case o...
rlUInt32_t numTestPtrnPkts
Number of test pattern packets to send, for infinite packets set it to 0.
MMWL_EXPORT rlReturnVal_t rlDeviceSetHsiDelayDummyConfig(rlUInt8_t deviceMap, rlHsiDelayDummyCfg_t *data)
This API can be used to increase the time between the availability of chirp data and the transfer of ...
MMWL_EXPORT rlReturnVal_t rlDeviceSetDebugSigEnableConfig(rlUInt8_t deviceMap, rlDebugSigEnCfg_t *data)
Information to enable the pin-mux to bring out debug signals for the chirp cycle.
rlUInt16_t reserved3
Reserved for future use.
rlDevDataPathClkCfg_t * dataPathClk
Data path clock configuration.
rlUInt32_t periodicity
1 LSB = 1 ms Periodicity at which tests need to be run Minimum value is 40 ms Maximum value is 15...
rlUInt32_t reserved
Reserved for future use.
rlUInt8_t iqSwapSel
I/Q Swap selection for complex outputs 0 Sample interleave mode - I first 1 Sample interleave mod...
MMWL_EXPORT rlReturnVal_t rlDeviceConfigureAckTimeout(rlUInt32_t ackTimeout)
Configures the Acknowledgement timeout in mmWaveLink Driver.
MMWL_EXPORT rlReturnVal_t rlDeviceAdvFrameConfigApply(rlUInt8_t deviceMap, rlAdvFrameDataCfg_t *data)
Sets Advance Frame data path Configuration.
rlUInt16_t inputSize
No of elements/data in the buffer .
mmwave radar data path lane enable
Debug signals enable structure.
MMWL_EXPORT rlReturnVal_t rlDeviceSetLaneConfig(rlUInt8_t deviceMap, rlDevLaneEnable_t *data)
Sets Lane enable Configuration.
rlUInt16_t reserved1
Reserved for future use.
rlUInt8_t cq1TransSize
Number of samples (in 16 bit halfwords) of CQ1 data to be transferred. Valid range [32 halfwords to 1...
rlUInt32_t testPatRx0Qcfg
This field specifies the values for Rx0, Q channel. Applicable only in case of test pattern enable....
rlUInt32_t reserved3
Reserved for future use.
rlUInt8_t testPatGenCtrl
This field controls the enable-disable of the generation of the test pattern. Value Description 0...
MMWL_EXPORT rlReturnVal_t rlDeviceFrameConfigApply(rlUInt8_t deviceMap, rlFrameApplyCfg_t *data)
Sets Frame data path Configuration.
rlUInt16_t reserved1
Reserved for future use.
MMWL_EXPORT rlReturnVal_t rlDeviceGetDataPathConfig(rlUInt8_t deviceMap, rlDevDataPathCfg_t *data)
Gets data path Configuration.
MMWL_EXPORT rlReturnVal_t rlDeviceSetHsiConfig(rlUInt8_t deviceMap, rlDevHsiCfg_t *data)
: This function sets the High Speed Interface(LVDS/CSI2) clock, lane, data rate and data format
mmwave radar periodicity test config
MMWL_EXPORT rlReturnVal_t rlDeviceSetCsi2Config(rlUInt8_t deviceMap, rlDevCsi2Cfg_t *data)
Sets CSI2 data format Configuration.
rlUInt32_t testPatRx3Qcfg
This field specifies the values for Rx3, Q channel. Applicable only in case of test pattern enable....
rlUInt8_t reserved
Reserved for future use.
rlUInt32_t chunkLen
File data length.
mmwave radar data format config
mmwave radar device MCU Clock output
HSI delay dummy structure.
rlUInt8_t testPatGenTime
Number of system clocks (200 MHz) between successive samples for the test pattern gen....
mmwave radar device PMIC Clock output
rlUInt32_t testPatRx0Icfg
This field specifies the values for Rx0, I channel. Applicable only in case of test pattern enable....
rlUInt16_t reserved
Reserved for future use.
Structure to hold the MSS ESM Fault data structure for event RL_DEV_AE_MSS_ESMFAULT_SB.
MMWL_EXPORT rlReturnVal_t rlDeviceSetMiscConfig(rlUInt8_t deviceMap, rlDevMiscCfg_t *data)
Setup misc. device configurations.
rlUInt16_t adcSignalOut
Bits Description b0 ADC_VALID, ADC valid signal enabled in GPIO_0 b31:1 RESERVED Value Descript...
rlUInt32_t reserved0
Reserved for future use.
MMWL_EXPORT rlReturnVal_t rlDevicePowerOn(rlUInt8_t deviceMap, rlClientCbs_t clientCb)
Bring mmwave Device Out of Reset.
rlUInt16_t reserved1
Reserved for future use.
rlUInt8_t transferFmtPkt1
Data out Format, b5:0 Packet 1 content selection 000000 - Suppress Packet 1 001110 - CP_CQ_DATA...
rlUInt8_t minNdivVal
Applicable only in case of PMIC clock enable. Else ignored. Min allowed divider value (depends upon...
MMWL_EXPORT rlReturnVal_t rlDeviceGetInternalConf(rlUInt8_t deviceMap, rlUInt32_t memAddr, rlUInt32_t *value)
Reads Internal Configuration Memory.
rlUInt32_t reserved2
Reserved for future use.
rlUInt32_t testEn
Bit value definition: 1 - Enable, 0 - Disable Bit Monitoring type 0 PERIODIC_CONFG_REGISTER_READ_...
rlUInt16_t chirpParamSize
Chirp Parameter Size Mainly applicable for Start Frequency, Idle Time and ADC Start Time .
rlUInt8_t cqConfig
This field specifies the data size of CQ samples on the lanes. b1:0 Data size 00 12 bits 01 14 ...
mmwavelink software version structure
rlUInt8_t repMode
Value Definition 0 Report is sent after test completion 1 Report is send only upon a failure .
rlUInt32_t testPatRx2Qcfg
This field specifies the values for Rx2, Q channel. Applicable only in case of test pattern enable....
MMWL_EXPORT rlReturnVal_t rlDeviceGetEsmFault(rlUInt8_t deviceMap, rlMssEsmFault_t *data)
Get MasterSS ESM fault status.
MMWL_EXPORT rlReturnVal_t rlDevicePowerOff(void)
Shutdown mmwave Device.
rlUInt8_t pmicClkCtrl
This field controls the enable - disable of the PMIC clock. Value Description 0x0 Disable PMIC cl...
rlUInt32_t testPatRx1Icfg
This field specifies the values for Rx1, I channel. Applicable only in case of test pattern enable....
File Dowload data structure.
Structure to hold the MSS/radarSS CPU Fault data strucutre for event RL_DEV_AE_MSS_CPUFAULT_SB and RL...
Radar Internal configuration.
rlUInt32_t reserved2
Reserved for future use.
rlUInt16_t reserved
Reserved for future use.
rlUInt16_t laneEn
Lane Enable Bitmap b0 Lane 0 Enable 0 Disable lane 0 1 Enable lane 0 b1 Lane 1 Enable 0 Dis...
rlUInt8_t reserved0
Reserved for future use.
rlUInt8_t laneClkCfg
Clock COnfiguration 0 -SDR Clock 1 - DDR Clock (Only valid value for CSI2) .
rlUInt32_t reserved4
Reserved for future use.
mmwavelink version structure
rlUInt16_t adcBits
ADC out bits - 0(12 Bits), 1(14 Bits), 2(16 Bits)
rlUInt8_t srcClkDiv
This field specifies the division factor to be applied to source clock. Applicable only in case of ...
MMWL_EXPORT rlReturnVal_t rlDeviceSetDataPathConfig(rlUInt8_t deviceMap, rlDevDataPathCfg_t *data)
Sets LVDS/CSI2 Path Configuration.
MMWL_EXPORT rlReturnVal_t rlDeviceGetContStreamingModeConfig(rlUInt8_t deviceMap, rlDevContStreamingModeCfg_t *data)
Gets continuous Streaming Mode Configuration.
MMWL_EXPORT rlReturnVal_t rlDeviceGetDataFmtConfig(rlUInt8_t deviceMap, rlDevDataFmtCfg_t *data)
Gets LVDS/CSI2 Data output format.
Advance Frame data config API parameters. This structure is only applicable when mmWaveLink instance ...
rlUInt8_t maxNdivVal
Applicable only in case of PMIC clock enable. Else ignored. Max allowed divider value (depends upon...
MMWL_EXPORT rlReturnVal_t rlDeviceConfigureCrc(rlCrcType_t crcType)
Configures the CRC Type in mmWaveLink Driver.
rlUInt8_t reserved0
Reserved for future use.
rlUInt8_t enableMode
This field decides if the Delay or Dummy option is enabled or disabled Mode Definition 0 - No Del...
rlUInt16_t hsiClk
High Speed Interface Clock configurations. Below table indicates possible values for different data r...
rlUInt16_t dummyVal
Dummy Count value. Number of dummy bytes added per chirp For 12-bit ADC data, 12 * Dummy Value ...
rlUInt8_t mcuClkCtrl
This field controls the enable - disable of the MCU clock. Value Description 0x0 Disable MCU cloc...
rlUInt8_t cq2TransSize
Number of samples (in 16 bit halfwords) of CQ2 data to be transferred. Valid range [32 halfwords to 1...
MMWL_EXPORT rlReturnVal_t rlDeviceSetRetryCount(rlUInt8_t retryCnt)
: Set the command retry count
MMWL_EXPORT rlReturnVal_t rlDevSetFillLUTBuff(rlFillLUTParams_t *fillLUTParams, rlInt8_t *inData, rlInt8_t *outData, rlUInt16_t *LUTAddrOffset)
Filling chirp LUT parameter buffer for Advanced chirp configuration.
MMWL_EXPORT rlReturnVal_t rlDeviceAddDevices(rlUInt8_t deviceMap)
Bring mmwave Device Out of Reset.
MMWL_EXPORT rlReturnVal_t rlDeviceGetLaneConfig(rlUInt8_t deviceMap, rlDevLaneEnable_t *data)
Gets Lane enable Configuration.
rlDevDataFmtCfg_t * datafmt
Data format config.
rlUInt8_t pmicClkSrc
This field specifies the source of the PMIC clock. Applicable only in case of PMIC clock enable....
rlUInt8_t clkDitherEn
Applicable only in case of PMIC clock enable. Else ignored. This field controls the enable-disable ...
MMWL_EXPORT rlReturnVal_t rlDeviceSetInternalConf(rlUInt8_t deviceMap, rlUInt32_t memAddr, rlUInt32_t value)
Writes Internal Configuration Memory.
MMWL_EXPORT rlReturnVal_t rlDeviceGetCpuFault(rlUInt8_t deviceMap, rlCpuFault_t *data)
Get MasterSS CPU fault status.
MMWL_EXPORT rlReturnVal_t rlDeviceGetVersion(rlUInt8_t deviceMap, rlVersion_t *data)
Get mmWave Hardware, Firmware/patch and mmWaveLink version.