Data Fields
rlProfileCfg_t Struct Reference

Profile config API parameters. A profile contains coarse parameters of FMCW chirp such as start frequency, chirp slope, ramp time, idle time etc. Fine dithering values need to be programmed in chirp configuration rlChirpCfg_t. More...

#include <control/mmwavelink/include/rl_sensor.h>

Data Fields

rlUInt16_t profileId
 Profile index (0-3)
 
rlUInt8_t pfVcoSelect
 Bit Description
b0 FORCE_VCO_SEL
0 - Use internal VCO selection
1 - Forced external VCO selection
b1 VCO_SEL
0 - VCO1 (77G:76 - 78 GHz or 60G:57 - 61 GHz)
1 - VCO2 (77G:77 - 81 GHz or 60G:60 - 64 GHz)
. More...
 
rlUInt8_t pfCalLutUpdate
 Bit Description
b0 RETAIN_TXCAL_LUT
0 - Update TX calibration LUT
1 - Do not update TX calibration LUT
b1 RETAIN_RXCAL_LUT
0 - Update RX calibration LUT and update RX IQMM correction
1 - Do not update RX calibration LUT
b7:2 RESERVED
If PF_TX_OUTPUT_POWER_BACKOFF is changed then set RETAIN_TXCAL_LUT to 0,
else set it to 1 and if PF_RX_GAIN is changed, then set RETAIN_RXCAL_LUT to 0
else set them to 1.
 
rlUInt32_t startFreqConst
 Start frequency for each profile
For 77GHz devices (76 GHz - 81 GHz):
1 LSB = 3.6e9 / 2^26 Hz = 53.644 Hz
Valid range: 0x5471C71B to 0x5A000000
For 60GHz devices (57 GHz - 64 GHz):
1 LSB = 2.7e9 / 2^26 Hz = 40.233 Hz
Valid range: 0x5471C71C to 0x5ED097B4
.
 
rlUInt32_t idleTimeConst
 Idle time
1 LSB = 10 ns
Valid range: 0 to 524287
.
 
rlUInt32_t adcStartTimeConst
 Time of starting of ADC capture relative to the knee of the ramp
1 LSB = 10 ns
Valid range: 0 to 4095
.
 
rlUInt32_t rampEndTime
 End of ramp time relative to the knee of the ramp
1 LSB = 10 ns
Valid range: 0 to 500000
Ensure that the total frequency sweep is either within these ranges:
77G : 76 - 78 GHz or 77 - 81 GHz
60G : 57 - 61 GHz or 60 - 64 GHz
.
 
rlUInt32_t txOutPowerBackoffCode
 Concatenated code for output power backoff for TX0, TX1, TX2
Bit Description
b7:0 TX0 output power back off
b15:8 TX1 output power back off
b23:16 TX2 output power back off
b31:24 Reserved
This field defines how much the transmit power should be reduced from the maximum
1 LSB = 1 dB
Valid range: 0 to 20
If TX power boot time calibration is disabled then only 0dB back off is
supported. 0dB back-off corresponds to typically 13dBm power level in AWR2243 device.
. More...
 
rlUInt32_t txPhaseShifter
 Concatenated phase shift for TX0/1/2,
Bit Description
b1:0 Reserved (set to 0b00)
b7:2 TX0 phase shift value
b9:8 Reserved (set to 0b00)
b15:10 TX1 phase shift value
b17:16 Reserved (set to 0b00)
b23:18 TX2 phase shift value
b31:24 Reserved
1 LSB = 360/2^6 = 5.625 degrees
This field defines the additional phase shift to be introduced on each
transmitter output. More...
 
rlInt16_t freqSlopeConst
 Ramp slope frequency,
For 77GHz devices (76GHz to 81GHz):
1 LSB = (3.6e6 * 900) / 2^26 = 48.279 kHz/uS
Valid range:
xWR1xxx devices: -2072 to 2072 (Max 100MHz/uS)
AWR2243 device: -5510 to 5510 (266MHz/uS)
For 60GHz devices (57GHz to 64GHz):
1 LSB = (2.7e6 * 900) / 2^26 = 36.21 kHz/uS for 60GHz devices
Valid range: -6905 to 6905 (Max 250 MHz/uS)
. More...
 
rlInt16_t txStartTime
 Time of start of transmitter relative to the knee of the ramp
1 LSB = 10ns
Valid range: -4096 to 4095
.
 
rlUInt16_t numAdcSamples
 Number of ADC samples to capture in a chirp for each RX
Valid range: 2 to MAX_NUM_SAMPLES
Where MAX_NUM_SAMPLES is such that all the enabled RX channels' data fits
into 16 kB memory memory in AWR1243/xWR1443/AWR2243 or 32 kB memory in
xWR1642/xWR6843/xWR1843, with each sample consuming 2 bytes for real ADC
output case and 4 bytes for complex 1x and complex 2x ADC output cases.
For example in AWR1243/ xWR1443/AWR2243 when the ADC buffer size is 16 kB
number of RX chains ADC format Maximum Number of samples
4 complex 1024
4 Real 2048
2 Complex 2048
2 Real 4096
.
 
rlUInt16_t digOutSampleRate
 ADC Sampling rate for each profile is encoded in
2 bytes (16 bit unsigned number)
1 LSB = 1 ksps
Valid range:
xWR1xxx and xWR6843 devices: 2000 to 37500 (Max 15MHz IF bandwidth)
AWR2243 device: 2000 to 50000 (Max 20MHz IF bandwidth)
The maximum sampling rate supported is limited based on the information below.
. More...
 
rlUInt8_t hpfCornerFreq1
 Code for HPF1 corner frequency
0x00 175 kHz
0x01 235 kHz
0x02 350 kHz
0x03 700 kHz
.
 
rlUInt8_t hpfCornerFreq2
 Code for HPF2 corner frequency
0x00 350 kHz
0x01 700 kHz
0x02 1.4 MHz
0x03 2.8 MHz
.
 
rlUInt16_t txCalibEnCfg
 Number of transmitters to turn on during TX power
calibration. During actual operation, if more than
1 TXs are enabled during the chirp, then enabling
the same TXs during calibration will have better TX
output power accuracy
b2:0 TX enabled during TX0 calibration
b0 - TX0, b1 - TX1, b2 - TX2
b5:3 TX enabled during TX1 calibration
b3 - TX0, b4 - TX1, b5 - TX2
b8:6 TX enabled during TX2 calibration
b6 - TX0, b7 - TX1, b8 - TX2
b14:9 RESERVED
b15 Enable multi TX enable during TX power calibration.
. More...
 
rlUInt16_t rxGain
 b5:0 This field defines RX gain for each channel.
1 LSB = 1 dB
Valid values: All even values from 32 to 52
b7:6 Code for RF gain target
The RF gain target for AWR2243 device: Value RF gain target 00 30 dB
01 33 dB
10 36 dB (Recommended)
11 RESERVED
The RF gain target for xWR6843 ES2.0 device: Value RF gain target 00 30 dB
01 34 dB
10 36 dB
11 RESERVED
b15:8 RESERVED
More...
 
rlUInt16_t reserved
 Reserved for Future use.
 

Detailed Description

Profile config API parameters. A profile contains coarse parameters of FMCW chirp such as start frequency, chirp slope, ramp time, idle time etc. Fine dithering values need to be programmed in chirp configuration rlChirpCfg_t.

Note
Maximum of 4 profiles can be configured.

Definition at line 550 of file rl_sensor.h.

Field Documentation

◆ digOutSampleRate

rlUInt16_t rlProfileCfg_t::digOutSampleRate

ADC Sampling rate for each profile is encoded in
2 bytes (16 bit unsigned number)
1 LSB = 1 ksps
Valid range:
xWR1xxx and xWR6843 devices: 2000 to 37500 (Max 15MHz IF bandwidth)
AWR2243 device: 2000 to 50000 (Max 20MHz IF bandwidth)
The maximum sampling rate supported is limited based on the information below.
.

When device supports 15 MHz IF bandwidth (refer device data sheet)
ADC mode Real/PseudoReal Complex1x Complex2x
Regular ADC mode37.5 Msps18.75 Msps37.5 Msps
Low power ADC mode18.75 Msps9.375 Msps18.75 Msps
When device supports 10 MHz IF bandwidth (refer device data sheet)
ADC mode Real/PseudoReal Complex1x Complex2x
Regular ADC mode25 Msps12.5 Msps25 Msps
Low power ADC mode18.75 Msps9.375 Msps18.75 Msps
When device supports 5 MHz IF bandwidth (refer device data sheet)
ADC mode Real/PseudoReal Complex1x Complex2x
Regular ADC mode12.5 Msps6.25 Msps12.5 Msps
Low power ADC mode12.5 Msps6.25 Msps12.5 Msps

Definition at line 763 of file rl_sensor.h.

◆ freqSlopeConst

rlInt16_t rlProfileCfg_t::freqSlopeConst

Ramp slope frequency,
For 77GHz devices (76GHz to 81GHz):
1 LSB = (3.6e6 * 900) / 2^26 = 48.279 kHz/uS
Valid range:
xWR1xxx devices: -2072 to 2072 (Max 100MHz/uS)
AWR2243 device: -5510 to 5510 (266MHz/uS)
For 60GHz devices (57GHz to 64GHz):
1 LSB = (2.7e6 * 900) / 2^26 = 36.21 kHz/uS for 60GHz devices
Valid range: -6905 to 6905 (Max 250 MHz/uS)
.

Note
: Refer rlRfApllSynthBwControl_t bandwidth control API for
constraints on max slope.

Definition at line 710 of file rl_sensor.h.

◆ pfVcoSelect

rlUInt8_t rlProfileCfg_t::pfVcoSelect

Bit Description
b0 FORCE_VCO_SEL
0 - Use internal VCO selection
1 - Forced external VCO selection
b1 VCO_SEL
0 - VCO1 (77G:76 - 78 GHz or 60G:57 - 61 GHz)
1 - VCO2 (77G:77 - 81 GHz or 60G:60 - 64 GHz)
.

Note
1: xWR1xxx devices: There is an overlap region of 77-78 GHz in which any
of the VCOs can be used, for other regions use only the VCO which can
work in that region. For e.g. for 76-78 GHz use only VCO1 and for
77-81GHz use only VCO2, for 77-78 GHz, any VCO can be used. Also note
that users can inter-mix chirps from different VCOs within the same
frame.
2: xWR6843 device: There is an overlap region of 60-61 GHz in which
any of the VCOs can be used.
3: AWR2243 device: VCO2 range is 76 - 81GHz (5GHz RF Bandwidth). There
is an overlap region of 76-78 GHz in which any of the VCOs can be
used
b7:2 RESERVED

Definition at line 578 of file rl_sensor.h.

◆ rxGain

rlUInt16_t rlProfileCfg_t::rxGain

b5:0 This field defines RX gain for each channel.
1 LSB = 1 dB
Valid values: All even values from 32 to 52
b7:6 Code for RF gain target
The RF gain target for AWR2243 device: Value RF gain target 00 30 dB
01 33 dB
10 36 dB (Recommended)
11 RESERVED
The RF gain target for xWR6843 ES2.0 device: Value RF gain target 00 30 dB
01 34 dB
10 36 dB
11 RESERVED
b15:8 RESERVED

Note
1: The total RX gain is achieved as a sum of RF gain and IF amplifiers gain. The RF Gain Target (30 dB, 33 dB and 36 dB) allows the user to control the RF gain independently from the total RX gain, thus giving flexibility to the user to trade-off linearity vs. noise figure. Out of multiple gain settings for the RF stages, the firmware calibration algorithm uses the one that makes the RF gain as close as possible to the user programmed RF Gain Target.
2: At high temperatures, the RF Gain Targets provide trade-off of approximately 4 dB in RF P1dB point vs 2 dB in noise figure.
3: For the lowest RF Gain Target setting 30 dB, the RF gain varies linearly from 38 dB at -40C to 30 dB at 140C for nominal process corner. Since the minimum IF gain is -6 dB, The minimum achievable RX Gain varies from 32 dB at -40C to 24 dB at 140C.
4: The maximum RX gain setting is recommended to be limited to 48dB, which can be achieved at all temperatures and RF gain target conditions. Increasing RX gain beyond 48 dB may result in degradation of in-band P1dB without improvement in noise figure.

Definition at line 852 of file rl_sensor.h.

◆ txCalibEnCfg

rlUInt16_t rlProfileCfg_t::txCalibEnCfg

Number of transmitters to turn on during TX power
calibration. During actual operation, if more than
1 TXs are enabled during the chirp, then enabling
the same TXs during calibration will have better TX
output power accuracy
b2:0 TX enabled during TX0 calibration
b0 - TX0, b1 - TX1, b2 - TX2
b5:3 TX enabled during TX1 calibration
b3 - TX0, b4 - TX1, b5 - TX2
b8:6 TX enabled during TX2 calibration
b6 - TX0, b7 - TX1, b8 - TX2
b14:9 RESERVED
b15 Enable multi TX enable during TX power calibration.
.

Note
1: If this bit is not set, only 1 TX is enabled
during the TX power calibration. For e.g. during TX0
calibration, only TX0 will be enabled; during TX1
calibration, only TX1 will be enabled and so on.

Definition at line 818 of file rl_sensor.h.

◆ txOutPowerBackoffCode

rlUInt32_t rlProfileCfg_t::txOutPowerBackoffCode

Concatenated code for output power backoff for TX0, TX1, TX2
Bit Description
b7:0 TX0 output power back off
b15:8 TX1 output power back off
b23:16 TX2 output power back off
b31:24 Reserved
This field defines how much the transmit power should be reduced from the maximum
1 LSB = 1 dB
Valid range: 0 to 20
If TX power boot time calibration is disabled then only 0dB back off is
supported. 0dB back-off corresponds to typically 13dBm power level in AWR2243 device.
.

Note
: For best inter-TX channel matching performance, same chirp profile and
same TX backoff value should be used for all the TXs that are used in
beam-forming

Definition at line 679 of file rl_sensor.h.

◆ txPhaseShifter

rlUInt32_t rlProfileCfg_t::txPhaseShifter

Concatenated phase shift for TX0/1/2,
Bit Description
b1:0 Reserved (set to 0b00)
b7:2 TX0 phase shift value
b9:8 Reserved (set to 0b00)
b15:10 TX1 phase shift value
b17:16 Reserved (set to 0b00)
b23:18 TX2 phase shift value
b31:24 Reserved
1 LSB = 360/2^6 = 5.625 degrees
This field defines the additional phase shift to be introduced on each
transmitter output.

Note
: Chirps corresponding to different profiles are not guaranteed to have
phase coherency.

Definition at line 696 of file rl_sensor.h.


The documentation for this struct was generated from the following file:

Copyright 2020, Texas Instruments Incorporated