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Structure to hold the MSS Boot error status data strucutre when booted over SPI for event RL_DEV_AE_MSS_BOOTERRSTATUS_SB. More...
#include <control/mmwavelink/mmwavelink.h>
Data Fields | |
rlUInt32_t | powerUpTime |
masterSS powerup time, 1LSB = 5ns | |
rlUInt64_t | powerUpStatus |
masterSS Bootup Status over SPI, 0 - PASS, 1- Fail Bit Error-description 0 certificate authentication failure 1 certificate parser failure 2 Rprc image1 authentication failure 3 Rprc image2 authentication failure 4 Rprc image3 authentication failure 5 Rprc header not found 6 Meta header not found 7 S/W anti roll back check failure 8 Efuse integrity failure 9 certificate field validity failure 10 certificate field invalid authentication key index 11 certificate field invalid hash type 12 certificate field invalid subsystem 13 certificate field invalid decrypt key index 14 certificate field check efuse mismatch 15 certificate field check 1 efuse mismatch 16 certificate field check 2 efuse mismatch 17 certificate field invalid subsystem bank allocation 18 certificate field invalid total banks allocation 19 Rprc parser file length mismatch 20 Rprc parser MSS file offset mismatch 21 Rprc parser BSS file offset mismatch 22 Rprc parser DSS file offset mismatch 23 certificate field invalid decrypt key 24 certificate field invalid authentication key 25 HS device certificate not present 26 Error in 2K image 27 Shared memory allocation failed 28 MSS image not found 29 Meta header num files error 30 Meta header CRC failure 31 Rprc image authentication failure 32 Rprc parser config file offset mismatch 33 Boot extension extraction failure 34 Device user ID bad size 35 Key derived function bad size 36 HMAC bad size 37 AES initialization vector bad size 38 Secure dev TI key erase failure 39 SOP5 SFlash not found 48 XTAL clock detection failure 49 Continue bootup on XTAL 50 DSP powerup timeout error 51 MSS LBIST failure 52 DSP LBIST PBIST failure 53 PBIST single port memory failure 54 PBIST two port memory failure 55 Memory init failure 56 MSS ROM PBIST CRC computation failure 57 VMON error detected 63 ESM NERROR detected | |
rlUInt64_t | bootTestStatus |
masterSS Boot Test Status, 0 - PASS, 1 - FAIL Bit Status Information 0 MibSPI self-test 1 DMA self-test 2 RESERVED 3 RTI self-test 4 ESM self-test 5 EDMA self-test 6 CRC self-test 7 VIM self-test 8 MPU self-test 9 Mailbox self-test 10 RESERVED 11 RESERVED 12 RESERVED 13 MibSPI single bit error test 14 MibSPI double bit error test 15 DMA Parity error test 16 TCMA Single bit error test 17 TCMB Single bit error test 18 RESERVED 19 RESERVED 20 RESERVED 21 RESERVED 22 VIM lockstep test 23 CCM R4 lockstep test 24 DMA MPU region test 25 MSS Mailbox single bit error test 26 MSS Mailbox double bit error test 27 BSS Mailbox single bit error test 28 BSS Mailbox double bit error test 29 EDMA MPU test 30 EDMA parity test 31 RESERVED 32 RESERVED 33 RESERVED 34 PCR test 35 VIM RAM parity test 36 SCI boot time test 63:37 RESERVED | |
Structure to hold the MSS Boot error status data strucutre when booted over SPI for event RL_DEV_AE_MSS_BOOTERRSTATUS_SB.
Definition at line 1793 of file mmwavelink.h.