5.11. GPMC

5.11.1. Introduction

GPMC driver enables communication for GPMC based peripherals on board through common API to application.

5.11.1.1. Modes of Operation

Following modes of operations are supported:

GPMC_OPER_MODE_BLOCKING GPMC_transfer() API blocks code execution until transaction has completed. By default, GPMC driver operates in blocking mode. This ensures only one GPMC transaction operates at a given time. This mode is supported only in interrupt configurations.

GPMC_OPER_MODE_POLLING GPMC_transfer() API blocks code execution until transaction has completed. By default, GPMC driver operates in blocking mode. This ensures only one GPMC transaction operates at a given time. This mode is supported only in non-interrupt configurations.

GPMC_OPER_MODE_CALLBACK GPMC_transfer() API returns without waiting for completion of transaction in this case. Callback function registered by application is invoked once transaction is complete.This mode is supported only in interrupt configuration.

5.11.2. Driver Configuration

5.11.2.1. Board Specific Configuration

All board specific configurations eg:enabling clock and pin-mux for GPMC pins are required before calling any driver APIs.By default Board_init() API supports all initialization sequence for TI supported EVMs. In addition it initializes UART instance for Console/STDIO.Refer PDK Board Support for additional details.Once board specific configuration is complete GPMC_init() API should be called to initialize driver.

5.11.2.2. SoC Specific Configuration

All SoC specific configurations (eg: GPMC module registers base address, interrupt configurations, etc.) can be set using GPMC_socSetInitCfg() SoC driver API before calling any GPMC driver APIs. The default SoC specific configurations can be retrieved using GPMC_socGetInitCfg() SoC driver API.

5.11.2.3. GPMC Configuration Structure

The GPMC_soc.c file binds driver with hardware attributes on the board through GPMC_config[] structure. This structure must be provided to the GPMC driver. It must be initialized before the GPMC_init() function is called and cannot be changed afterwards.

For details about individual fields of this library structure, see the PDK doxygen documentation

5.11.3. APIs

API Reference for application:

#include <ti/drv/gpmc/GPMC.h>

Description

5.11.3.1. Open GPMC

...
Board_init(boardCfg);
...
GPMC_socGetInitCfg(peripheralNum, &spi_cfg);
...
GPMC_socSetInitCfg(peripheralNum, &gpmc_cfg);
GPMC_Params_init(&spiParams);
spiParams.transferMode = GPMC_OPER_MODE_BLOCKING;
spiParams.transferCallbackFxn = NULL;
handle = GPMC_open(peripheralNum, &params);

At this point GPMC driver is ready for data transfer in blocking mode on specific instance identified by handle. Pseudo/Sample code for GPMC read/write transaction is included below. Refer example for additional details

...
transaction.count = n;    /* Transfer Length */
transaction.txBuf = transmitBuffer; /* Buffer to be written */
transaction.rxBuf = NULL;  /* Buffer holding the received data */
transferOK = GPMC_transfer(handle, transaction); /* Perform GPMC transfer */
if (!transferOK) {
/* GPMC transaction failed */
}

5.11.4. Examples

5.11.4.1. GPMC

Name Description Expected Results SoC Supported Build Type
GPMC_TestApplication Driver unit test application to validate features and interfaces for GPMC driver Following prints on console expected: Pass criteria: All tests have passed. am64x makefile
GPMC probing example

Example application to validate features and interfaces for GPMC driver by performing write operation in a loop.

Note: This example is intended to demonstrate the GPMC LLD API usage on the HW platforms where GPMC peripheral is not available.

Following prints on console expected: Pass criteria: All tests have passed. am64x makefile

5.11.5. Support for Benchmark Testing

Name Description Expected Results SOC/Core Supported Build Type
GPMC Test App Test application used for performance benchmarking

Test application will print on the UART console:

GPMC Write ### bytes at transfer rate #### MBps

GPMC Read ### bytes at transfer rate #### MBps

GPMC Write CPU Load ##%

GPMC Read CPU Load ##%

am64x/mpu1_0 am64x/mcu1_0 makefile

Note

  1. Data transfer between DDR and GPMC memory, performance measurement does not include time to invalidate/write back cache
  2. GTC counter (200MHz) used for throughput measurement on A53, and PMU cycle counter (400MHz) on R5
  3. sysbios load module used for load measurement
  4. Read/write transfer size of 4M bytes