2.1. Release Notes - 09_01_00¶
2.1.1. Introduction¶
This release notes provides important information that will assist you in using the PDK software package for the Jacinto family of devices. This document provides the product information and known issues that are specific to the PDK software package.
New features added / supported is listed below and defects fixed are highlighted in Fixed Issues. Also please check Upgrade and Compatibility for backward compatibility
2.1.2. What’s New¶
Please note that this is a bug fix release with limited testing. There are no new features in this release.
Fix for USB driver stability issues during super speed operation
Workaround for CPSW errata i2329 (MDIO CDC bug)
Workaround for CPSW MAC port lockup due to corrupted Start of Frame Delimiter (SFD)
2.1.3. Upgrade and Compatibility¶
2.1.3.1. FreeRTOS¶
By default all the tasks will be created with floating point context enabled; i.e, save/restore of FPU Registers will be performed during each task switch.
Until the release 08.01, this was not enabled and any task that required floating point hardware had to call portTASK_USES_FLOATING_POINT.
For more details, refer Task FPU context
2.1.4. Device Support¶
AM65XX SR1.0 SR2.0, SR2.1 and HS (BOARD=am65xx_evm)
sysfw name
AM65xx SR revision
sysfw.bin
SR1.0
sysfw-hs-enc.bin
SR1.0 HS
sysfw_sr2.bin
SR2.0 & SR2.1
sysfw_sr2-hs-enc.bin
SR2.0 HS & SR2.1 HS
2.1.5. Validation Information¶
For details on the validated examples refer to the platform specific test report available here.
2.1.6. Tool Chain Information¶
Component |
Version |
|---|---|
FreeRTOS Kernel |
10.4.3 |
lwIP stack |
2.1.2 |
lwIP-contrib |
2.1.0 |
TI ARM CLANG |
1.3.0.LTS |
PRU code generation tools |
2.3.3 |
GCC ARM code generation tools |
ARCH64 9.2-2019.12 |
CGT XML Processing Scripts |
2.61.00 |
System Analyzer (UIA Target) |
2_30_01_02 |
2.1.7. Change Request¶
None.
2.1.8. Fixed Issues¶
ID |
Head Line |
Module |
Affected Versions |
Affected Platforms |
|---|---|---|---|---|
Enet: Packet drop in mcu1_0 / cpsw2g loopback test |
ENET |
08.02.00 |
AM65xx |
|
Sending Preamble (32 one’s) is missing in MDIO Read/Write operation in Manual Mode |
ENET |
08.02.00 |
AM65xx |
2.1.9. Known Issues¶
ID |
Head Line |
Module |
Reported in Release |
Affected Platforms |
Impact |
Workaround in this release |
|---|---|---|---|---|---|---|
Pulsar (R5F) : High priority interrupt is missed by VIM |
CSL, OSAL |
07.00.00 |
J721E, J7200, AM65xx |
Baremetal implementation is pending |
Use RTOS instead of baremetal |
|
SBL booting u-boot and linux is failing for OSPI Boot |
SBL |
08.00.00 |
AM65xx |
None |
None |
|
[DSS Test]Sync-lost is observed for RGB24/BGR24 test-cases |
DSS |
07.01.00 |
AM65xx |
No images displayed on the screen / flicker |
None |
|
timesync: v2: TimeSync PTP restart is not supported |
ENET |
07.03.00 |
AM65xx |
Impacts only applications that require stack restart |
None |
|
IPC Performance Test hangs after loading the binary |
IPC |
08.01.00 |
J721E, J7200, AM65xx |
The app won’t work for this release |
None |
|
Enet: ICSSG: Promiscuous mode not working |
ENET |
07.03.00 |
AM65xx |
None |
Modify test application to Enable Multicast flooding and Unicast flooding using Enet ioctls and rebuild |
|
LWIP: iperf UDP test failing for buffer length of 512 |
ENET |
08.02.00 |
AM65xx |
None |
None |
2.1.10. Limitations¶
2.1.10.1. PDK¶
PDK examples do not support SMP mode. Some of examples still support build in SMP mode but these binaries are not supported or validated.
TI Clang compiler does not enable O3 optimization level and Thumb2 mode which were enabled by default with TI ARM CGT compiler. This has an impact on driver throughput. E.g. Ethernet performance has reduced by ~20% on AM65xx
2.1.10.2. ENET¶
lwIP stack integration doesn’t support checksum hardware-offload feature.
ICSSG integration with lwIP is done only for ICSSG Dual-MAC. Driver level support is available for Dual-MAC and Switch.
TimeSync PTP integration is done only for ICSSG-Dual MAC.
TimeSync is possible only in one MAC port at a time.
Different VLAN modes are not supported in Dual-MAC mode (within given ICSSG MAC ports). Both MACs should either be in VLAN aware or VLAN unaware mode.
Independent VLAN learning is not supported in Dual-MAC mode.