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PDK API Guide for AM65xx
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Go to the documentation of this file. 41 #ifndef SCICLIENT_FMWMSGPARAMS_H_ 42 #define SCICLIENT_FMWMSGPARAMS_H_ 49 #include <ti/csl/soc.h> 60 #define TISCI_PARAM_UNDEF (0xFFFFFFFFU) 70 #define SCICLIENT_FIRMWARE_ABI_MAJOR (3U) 75 #define SCICLIENT_FIRMWARE_ABI_MINOR (1U) 85 #define SCICLIENT_CONTEXT_R5_NONSEC_0 (0U) 87 #define SCICLIENT_CONTEXT_R5_SEC_0 (1U) 89 #define SCICLIENT_CONTEXT_R5_NONSEC_1 (2U) 91 #define SCICLIENT_CONTEXT_R5_SEC_1 (3U) 93 #define SCICLIENT_CONTEXT_A53_SEC_0 (4U) 95 #define SCICLIENT_CONTEXT_A53_SEC_1 (5U) 97 #define SCICLIENT_CONTEXT_A53_NONSEC_0 (6U) 99 #define SCICLIENT_CONTEXT_A53_NONSEC_1 (7U) 101 #define SCICLIENT_CONTEXT_A53_NONSEC_2 (8U) 103 #define SCICLIENT_CONTEXT_A53_NONSEC_3 (9U) 105 #define SCICLIENT_CONTEXT_A53_NONSEC_4 (10U) 107 #define SCICLIENT_CONTEXT_A53_NONSEC_5 (11U) 109 #define SCICLIENT_CONTEXT_GPU_NONSEC_0 (12U) 111 #define SCICLIENT_CONTEXT_GPU_NONSEC_1 (13U) 113 #define SCICLIENT_CONTEXT_ICSSG_NONSEC_0 (14U) 115 #define SCICLIENT_CONTEXT_ICSSG_NONSEC_1 (15U) 117 #define SCICLIENT_CONTEXT_ICSSG_NONSEC_2 (16U) 119 #define SCICLIENT_CONTEXT_MAX_NUM (17U) 129 #define SCICLIENT_PROCID_A53_CL0_C0 (0x20U) 131 #define SCICLIENT_PROCID_A53_CL0_C1 (0x21U) 133 #define SCICLIENT_PROCID_A53_CL1_C0 (0x22U) 135 #define SCICLIENT_PROCID_A53_CL1_C1 (0x23U) 137 #define SCICLIENT_PROCID_R5_CL0_C0 (0x01U) 139 #define SCICLIENT_PROCID_R5_CL0_C1 (0x02U) 143 #define TISCI_MSG_VALUE_RM_NULL_RING_TYPE (0xFFFFu) 144 #define TISCI_MSG_VALUE_RM_NULL_RING_INDEX (0xFFFFFFFFu) 145 #define TISCI_MSG_VALUE_RM_NULL_RING_ADDR (0xFFFFFFFFu) 146 #define TISCI_MSG_VALUE_RM_NULL_RING_COUNT (0xFFFFFFFFu) 152 #define TISCI_MSG_VALUE_RM_NULL_RING_MODE (0xFFu) 153 #define TISCI_MSG_VALUE_RM_NULL_RING_SIZE (0xFFu) 154 #define TISCI_MSG_VALUE_RM_NULL_ORDER_ID (0xFFu) 155 #define TISCI_MSG_VALUE_RM_UDMAP_NULL_CH_TYPE (0xFFu) 156 #define TISCI_MSG_VALUE_RM_UDMAP_NULL_CH_INDEX (0xFFFFFFFFu) 165 #include <ti/drv/sciclient/soc/sysfw/include/am65x/tisci_devices.h> 166 #include <ti/drv/sciclient/soc/sysfw/include/am65x_sr2/tisci_devices.h> 175 #include <ti/drv/sciclient/soc/sysfw/include/am65x/tisci_clocks.h> 176 #include <ti/drv/sciclient/soc/sysfw/include/am65x_sr2/tisci_clocks.h> 182 #define TISCI_ISC_CC_ID (160U) 190 #define TISCI_RINGACC0_OES_IRQ_SRC_IDX_START (0U) 191 #define TISCI_RINGACC0_MON_IRQ_SRC_IDX_START (1024U) 192 #define TISCI_RINGACC0_EOES_IRQ_SRC_IDX_START (2048U) 193 #define TISCI_UDMAP0_TX_OES_IRQ_SRC_IDX_START (0U) 194 #define TISCI_UDMAP0_TX_EOES_IRQ_SRC_IDX_START (256U) 195 #define TISCI_UDMAP0_RX_OES_IRQ_SRC_IDX_START (512U) 196 #define TISCI_UDMAP0_RX_EOES_IRQ_SRC_IDX_START (768U) 197 #define TISCI_UDMAP0_RX_FLOW_EOES_IRQ_SRC_IDX_START (1024U) 206 #define SCICLIENT_DEV_MCU_R5FSS0_CORE0 (TISCI_DEV_MCU_ARMSS0_CPU0) 207 #define SCICLIENT_DEV_MCU_R5FSS0_CORE1 (TISCI_DEV_MCU_ARMSS0_CPU1) 216 #define SCICLIENT_DEV_MCU_R5FSS0_CORE0_PROCID (SCICLIENT_PROCID_R5_CL0_C0) 217 #define SCICLIENT_DEV_MCU_R5FSS0_CORE1_PROCID (SCICLIENT_PROCID_R5_CL0_C1) 221 #define SCICLIENT_ALLOWED_BOARDCFG_BASE_START (CSL_MCU_MSRAM0_RAM_BASE) 223 #define SCICLIENT_ALLOWED_BOARDCFG_BASE_END (CSL_MCU_MSRAM0_RAM_BASE + CSL_MCU_MSRAM0_RAM_SIZE)