PDK API Guide for AM65xx
ipc_soc.h
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1 /*
2  * Copyright (c) Texas Instruments Incorporated 2018
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
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10  * notice, this list of conditions and the following disclaimer.
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12  * Redistributions in binary form must reproduce the above copyright
13  * notice, this list of conditions and the following disclaimer in the
14  * documentation and/or other materials provided with the
15  * distribution.
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18  * its contributors may be used to endorse or promote products derived
19  * from this software without specific prior written permission.
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21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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32  */
33 
47 #ifndef IPC_SOC_V0_H_
48 #define IPC_SOC_V0_H_
49 
50 #ifdef __cplusplus
51 extern "C" {
52 #endif
53 
58 #define IPC_VRING_BUFFER_SIZE (0x200000)
59 
61 #define IPC_MPU1_0 (0)
62 #define IPC_MCU1_0 (1)
63 #define IPC_MCU1_1 (2)
64 #define IPC_MAX_PROCS (3)
66 #define IPC_MAILBOX_CLUSTER_CNT (12U)
67 #define IPC_MAILBOX_USER_CNT (4U)
68 #define MAIN_NAVSS_MAILBOX_INPUTINTR_MAX (440U)
69 #define MAIN_NAVSS_MAILBOX_OUTPUTINTR_MAX (512U)
70 
71 #define IPC_MCU_NAVSS0_INTR0_CFG_BASE (CSL_NAVSS0_INTR0_INTR_ROUTER_CFG_BASE)
72 
73 /* Refer to Maxwell TRM (section 10.1.1.3) - NAVSS Integration */
74 #define NAVSS512_MPU1_0_OUTPUT_OFFSET (112)
75 #define NAVSS512_MCU1R5F0_OUTPUT_OFFSET (120)
76 #define NAVSS512_MCU1R5F1_OUTPUT_OFFSET (121)
77 
78 #define MAIN2MCU0_INTR_ROUTER_INPUT_BASE (184)
79 #define MAIN2MCU1_INTR_ROUTER_INPUT_BASE (186)
80 
81 #define MAIN2MCU0_INTR_ROUTER_OUTPUT_BASE (0)
82 #define MAIN2MCU1_INTR_ROUTER_OUTPUT_BASE (1)
83 
84 /* ========================================================================== */
85 /* Include Files */
86 /* ========================================================================== */
87 
88 /* None */
89 
90 
91 /* ========================================================================== */
92 /* Macros & Typedefs */
93 /* ========================================================================== */
94 
95 
96 
97 /* @} */
98 
99 /* ========================================================================== */
100 /* Structure Declarations */
101 /* ========================================================================== */
102 /* None */
103 
104 /* ========================================================================== */
105 /* Function Declarations */
106 /* ========================================================================== */
107 
108 #ifdef IPC_SUPPORT_SCICLIENT
109 int32_t Ipc_sciclientIrqRelease(uint16_t remoteId, uint32_t clusterId,
110  uint32_t userId, uint32_t intNumber);
111 int32_t Ipc_sciclientIrqSet(uint16_t remoteId, uint32_t clusterId,
112  uint32_t userId, uint32_t intNumber);
113 #endif
114 int32_t Ipc_getIntNumRange(uint32_t coreIndex, uint16_t *rangeStartP,
115  uint16_t *rangeNumP);
116 
118 
119 /* ========================================================================== */
120 /* Static Function Definitions */
121 /* ========================================================================== */
122 
123 /* None */
124 
125 #ifdef __cplusplus
126 }
127 #endif
128 
129 #endif /* #ifndef IPC_SOC_V0_H_ */
130 
131 /* @} */
Mailbox interrupt router configuration.
Definition: ipc_types.h:113
int32_t Ipc_main2mcu_intRouter(Ipc_MbConfig *cfg)
int32_t Ipc_getIntNumRange(uint32_t coreIndex, uint16_t *rangeStartP, uint16_t *rangeNumP)