PDK API Guide for AM65xx
csl_dru.h
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49 #ifndef CSL_DRU_H_
50 #define CSL_DRU_H_
51 
52 /* ========================================================================== */
53 /* Include Files */
54 /* ========================================================================== */
55 
56 #include <stdint.h>
57 #include <ti/csl/cslr_dru.h>
58 #include <ti/csl/csl_udmap.h>
59 
60 #if defined (__C7100__)
61 #include <c7x.h>
62 #endif
63 
64 #ifdef __cplusplus
65 extern "C" {
66 #endif
67 
68 /* ========================================================================== */
69 /* Macros */
70 /* ========================================================================== */
71 
86 #define CSL_DRU_MAX_CH (512U)
87 
90 #define CSL_DRU_NUM_CH (64U)
91 
96 #define CSL_DRU_MAX_QUEUE (8U)
97 
100 #define CSL_DRU_NUM_QUEUE (5U)
101 
106 #define CSL_DRU_MAX_CORE (4U)
107 
110 #define CSL_DRU_NUM_CORE (3U)
111 
121 #define CSL_DRU_OWNER_DIRECT_TR ((uint64_t) 0x0000U)
122 
123 #define CSL_DRU_OWNER_UDMAC_TR ((uint64_t) 0x0001U)
124 /* @} */
125 
135 #define CSL_DRU_QUEUE_ID_0 ((uint32_t) 0x0000U)
136 #define CSL_DRU_QUEUE_ID_1 ((uint32_t) 0x0001U)
137 #define CSL_DRU_QUEUE_ID_2 ((uint32_t) 0x0002U)
138 #define CSL_DRU_QUEUE_ID_3 ((uint32_t) 0x0003U)
139 #define CSL_DRU_QUEUE_ID_4 ((uint32_t) 0x0004U)
140 #define CSL_DRU_QUEUE_ID_5 ((uint32_t) 0x0005U)
141 #define CSL_DRU_QUEUE_ID_6 ((uint32_t) 0x0006U)
142 #define CSL_DRU_QUEUE_ID_7 ((uint32_t) 0x0007U)
143 /* @} */
144 
154 #define CSL_DRU_CORE_ID_0 ((uint32_t) 0x0000U)
155 #define CSL_DRU_CORE_ID_1 ((uint32_t) 0x0001U)
156 #define CSL_DRU_CORE_ID_2 ((uint32_t) 0x0002U)
157 /* Not present in current SOC design. Only meant for future purpose */
158 #define CSL_DRU_CORE_ID_3 ((uint32_t) 0x0003U)
159 /* @} */
160 /* @} */
161 
162 /* ========================================================================== */
163 /* Structures and Enums */
164 /* ========================================================================== */
165 
176 typedef struct
177 {
178  uint64_t trTypeSupported;
182  uint64_t staticSupported;
184  uint64_t eolSupported;
190  uint64_t amode;
193  uint64_t elType;
196  uint64_t dfmt;
199  uint64_t sectr;
202 
204 typedef struct
205 {
206  uint64_t priority;
211  uint64_t qos;
216  uint64_t orderId;
225  uint64_t rearbWait;
231 
233 typedef struct
234 {
235  uint64_t type;
241  uint64_t owner;
244  uint64_t pauseOnErr;
251  uint64_t evtNum;
255  uint64_t queueId;
260 
262 typedef struct
263 {
264  uint64_t rdTop;
266  uint64_t rdTotal;
268  uint64_t wrTop;
270  uint64_t wrTotal;
273 /* @} */
274 
275 /* ========================================================================== */
276 /* Function Declarations */
277 /* ========================================================================== */
278 
296 int32_t CSL_druGetCapabilities(const CSL_DRU_t *pRegs,
297  CSL_DruCapabilities *druCap);
298 
309 int32_t CSL_druQueueConfig(const CSL_DRU_t *pRegs,
310  uint32_t queueId,
311  const CSL_DruQueueConfig *queueCfg);
312 
322 int32_t CSL_druChConfig(const CSL_DRU_t *pRegs,
323  uint32_t chId,
324  const CSL_DruChConfig *chCfg);
325 
338 int32_t CSL_druChSetEvent(const CSL_DRU_t *pRegs,
339  uint32_t chId,
340  uint64_t evtNum);
341 
350 int32_t CSL_druChEnable(const CSL_DRU_t *pRegs, uint32_t chId);
351 
360 int32_t CSL_druChDisable(const CSL_DRU_t *pRegs, uint32_t chId);
361 
370 int32_t CSL_druChTeardown(const CSL_DRU_t *pRegs, uint32_t chId);
371 
380 uint32_t CSL_druChIsTeardownComplete(const CSL_DRU_t *pRegs, uint32_t chId);
381 
390 int32_t CSL_druChPause(const CSL_DRU_t *pRegs, uint32_t chId);
391 
400 int32_t CSL_druChResume(const CSL_DRU_t *pRegs, uint32_t chId);
401 
414 static inline void CSL_druChSubmitTr(const CSL_DRU_t *pRegs,
415  uint32_t chId,
416  uint32_t coreId,
417  const CSL_UdmapTR *tr);
418 
419 #if defined (__C7100__)
420 
429 static inline void CSL_druChSubmitAtomicTr(CSL_DRU_t *pRegs,
430  uint32_t chId,
431  __ulong8 * vdata);
432 #endif
433 
442 volatile uint64_t *CSL_druChGetTriggerRegAddr(CSL_DRU_t *pRegs, uint32_t chId);
443 
453 static inline void CSL_druChSetLocalTrigger0Raw(volatile uint64_t *pSwTrigReg);
454 
464 static inline void CSL_druChSetGlobalTrigger0Raw(volatile uint64_t *pSwTrigReg);
465 
475 static inline void CSL_druChSetGlobalTrigger1Raw(volatile uint64_t *pSwTrigReg);
476 
485 int32_t CSL_druChSetLocalTrigger0(CSL_DRU_t *pRegs, uint32_t chId);
486 
495 int32_t CSL_druChSetGlobalTrigger0(CSL_DRU_t *pRegs, uint32_t chId);
496 
505 int32_t CSL_druChSetGlobalTrigger1(CSL_DRU_t *pRegs, uint32_t chId);
506 
518 int32_t CSL_druGetQueueStatus(const CSL_DRU_t *pRegs,
519  uint32_t queueId,
520  CSL_DruQueueStatus *status);
521 
522 /* ========================================================================== */
523 /* Static Function Definitions */
524 /* ========================================================================== */
525 
526 static inline void CSL_druChSubmitTr(const CSL_DRU_t *pRegs,
527  uint32_t chId,
528  uint32_t coreId,
529  const CSL_UdmapTR *tr)
530 {
531  const CSL_DRU_CHCORERegs_CHCORE_CORE *pCoreRegs =
532  &pRegs->CHCORE[chId].CORE[coreId];
533  const uint32_t *trWord32 = (const uint32_t *) tr;
534  volatile uint32_t *submitWord32 = (volatile uint32_t *) pCoreRegs;
535  uint32_t numWords32, cnt;
536 
537  /* Write all wrds expect first */
538  numWords32 = (sizeof(CSL_UdmapTR) / sizeof(uint32_t));
539  for(cnt = 1U; cnt < numWords32; cnt++)
540  {
541  CSL_REG32_WR(submitWord32+cnt, trWord32[cnt]);
542  }
543  /* This triggers the actual TR submission */
544  CSL_REG32_WR(submitWord32, trWord32[0]);
545 
546  return;
547 }
548 
549 #if defined (__C7100__)
550 static inline void CSL_druChSubmitAtomicTr(CSL_DRU_t *pRegs,
551  uint32_t chId,
552  __ulong8 * vdata)
553 {
554  volatile uintptr_t pAtomic;
555 
556  pAtomic = (uintptr_t) &pRegs->CHATOMIC[chId];
557  *((__ulong8 *) pAtomic) = *vdata;
558 
559  return;
560 }
561 #endif
562 
563 static inline void CSL_druChSetLocalTrigger0Raw(volatile uint64_t *pSwTrigReg)
564 {
565  uint64_t regVal = ((uint64_t) 1U << CSL_DRU_CHRT_SWTRIG_LOCAL_TRIGGER0_SHIFT);
566  /* Not doing read-modify-write as trigger is not stored in the register */
567  CSL_REG64_WR(pSwTrigReg, regVal);
568 }
569 
570 static inline void CSL_druChSetGlobalTrigger0Raw(volatile uint64_t *pSwTrigReg)
571 {
572  uint64_t regVal = ((uint64_t) 1U << CSL_DRU_CHRT_SWTRIG_GLOBAL_TRIGGER0_SHIFT);
573  /* Not doing read-modify-write as trigger is not stored in the register */
574  CSL_REG64_WR(pSwTrigReg, regVal);
575 }
576 
577 static inline void CSL_druChSetGlobalTrigger1Raw(volatile uint64_t *pSwTrigReg)
578 {
579  uint64_t regVal = ((uint64_t) 1U << CSL_DRU_CHRT_SWTRIG_GLOBAL_TRIGGER1_SHIFT);
580  /* Not doing read-modify-write as trigger is not stored in the register */
581  CSL_REG64_WR(pSwTrigReg, regVal);
582 }
583 
584 /* @} */
585 
586 #ifdef __cplusplus
587 }
588 #endif
589 
590 #endif /* CSL_DRU_H_ */
591 
uint64_t eolSupported
Definition: csl_dru.h:184
This structure contains Queue status information.
Definition: csl_dru.h:262
uint64_t trTypeSupported
Definition: csl_dru.h:178
uint64_t queueId
Definition: csl_dru.h:255
uint64_t staticSupported
Definition: csl_dru.h:182
This structure contains the parameters to setup the DRU channel.
Definition: csl_dru.h:233
int32_t CSL_druChSetEvent(const CSL_DRU_t *pRegs, uint32_t chId, uint64_t evtNum)
This API configures the DRU channel event.
static void CSL_druChSetGlobalTrigger1Raw(volatile uint64_t *pSwTrigReg)
This API triggers the global event 1 for the specified channel.
Definition: csl_dru.h:577
int32_t CSL_druChResume(const CSL_DRU_t *pRegs, uint32_t chId)
This API resumes the specified channel.
uint64_t wrTop
Definition: csl_dru.h:268
int32_t CSL_druChPause(const CSL_DRU_t *pRegs, uint32_t chId)
This API pauses the specified channel.
int32_t CSL_druGetCapabilities(const CSL_DRU_t *pRegs, CSL_DruCapabilities *druCap)
This API returns the DRU capabilities.
uint64_t type
Definition: csl_dru.h:235
uint64_t pauseOnErr
Definition: csl_dru.h:244
int32_t CSL_druChSetLocalTrigger0(CSL_DRU_t *pRegs, uint32_t chId)
This API triggers the local event 0 for the specified channel.
uint64_t orderId
Definition: csl_dru.h:216
uint64_t globalTriggerSupported
Definition: csl_dru.h:188
uint64_t amode
Definition: csl_dru.h:190
uint64_t owner
Definition: csl_dru.h:241
This structure contains the capabilities of DRU.
Definition: csl_dru.h:176
This structure contains the parameters to setup the DRU queue.
Definition: csl_dru.h:204
int32_t CSL_druChConfig(const CSL_DRU_t *pRegs, uint32_t chId, const CSL_DruChConfig *chCfg)
This API configures the DRU channel non-real time configurations.
uint64_t wrTotal
Definition: csl_dru.h:270
int32_t CSL_druChDisable(const CSL_DRU_t *pRegs, uint32_t chId)
This API disables the DRU channel using the real time registers.
int32_t CSL_druChTeardown(const CSL_DRU_t *pRegs, uint32_t chId)
This API teardowns the specified channel.
uint32_t CSL_druChIsTeardownComplete(const CSL_DRU_t *pRegs, uint32_t chId)
This API checks if a teardown is complete for specified channel.
uint64_t sectr
Definition: csl_dru.h:199
int32_t CSL_druChSetGlobalTrigger0(CSL_DRU_t *pRegs, uint32_t chId)
This API triggers the global event 0 for the specified channel.
static void CSL_druChSetLocalTrigger0Raw(volatile uint64_t *pSwTrigReg)
This API triggers the local event 0 for the specified channel.
Definition: csl_dru.h:563
static void CSL_druChSubmitTr(const CSL_DRU_t *pRegs, uint32_t chId, uint32_t coreId, const CSL_UdmapTR *tr)
This API does a direct TR submission to the specified channel and core ID.
Definition: csl_dru.h:526
uint64_t rdTotal
Definition: csl_dru.h:266
uint64_t qos
Definition: csl_dru.h:211
int32_t CSL_druChSetGlobalTrigger1(CSL_DRU_t *pRegs, uint32_t chId)
This API triggers the global event 1 for the specified channel.
uint64_t dfmt
Definition: csl_dru.h:196
uint64_t consecuitveTrans
Definition: csl_dru.h:218
int32_t CSL_druQueueConfig(const CSL_DRU_t *pRegs, uint32_t queueId, const CSL_DruQueueConfig *queueCfg)
This API configures the DRU queue non-real time configurations.
static void CSL_druChSetGlobalTrigger0Raw(volatile uint64_t *pSwTrigReg)
This API triggers the global event 0 for the specified channel.
Definition: csl_dru.h:570
uint64_t rearbWait
Definition: csl_dru.h:225
volatile uint64_t * CSL_druChGetTriggerRegAddr(CSL_DRU_t *pRegs, uint32_t chId)
This API get the triggers register address for the channel.
int32_t CSL_druChEnable(const CSL_DRU_t *pRegs, uint32_t chId)
This API enables the DRU channel using the real time registers.
uint64_t priority
Definition: csl_dru.h:206
uint64_t localTriggerSupported
Definition: csl_dru.h:186
uint64_t rdTop
Definition: csl_dru.h:264
uint64_t evtNum
Definition: csl_dru.h:251
uint32_t chId
Definition: csl_udmap_tr.h:829
uint64_t elType
Definition: csl_dru.h:193
int32_t CSL_druGetQueueStatus(const CSL_DRU_t *pRegs, uint32_t queueId, CSL_DruQueueStatus *status)
This API returns the status of the specified queue.