This is IPC documentation specific to AM65xx SoC
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file | ipc_soc.h |
| IPC Low Level Driver AM65XX SOC specific file.
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◆ IPC_VRING_BUFFER_SIZE
#define IPC_VRING_BUFFER_SIZE (0x200000) |
VRing Buffer Size required for all core combinations.
◆ IPC_MPU1_0
Core definitions.
ARM A53 - VM0
◆ IPC_MCU1_0
◆ IPC_MCU1_1
◆ IPC_MAX_PROCS
#define IPC_MAX_PROCS (3) |
◆ IPC_MAILBOX_CLUSTER_CNT
#define IPC_MAILBOX_CLUSTER_CNT (12U) |
◆ IPC_MAILBOX_USER_CNT
#define IPC_MAILBOX_USER_CNT (4U) |
◆ MAIN_NAVSS_MAILBOX_INPUTINTR_MAX
#define MAIN_NAVSS_MAILBOX_INPUTINTR_MAX (440U) |
◆ MAIN_NAVSS_MAILBOX_OUTPUTINTR_MAX
#define MAIN_NAVSS_MAILBOX_OUTPUTINTR_MAX (512U) |
◆ IPC_MCU_NAVSS0_INTR0_CFG_BASE
#define IPC_MCU_NAVSS0_INTR0_CFG_BASE (CSL_NAVSS0_INTR0_INTR_ROUTER_CFG_BASE) |
◆ NAVSS512_MPU1_0_OUTPUT_OFFSET
#define NAVSS512_MPU1_0_OUTPUT_OFFSET (112) |
◆ NAVSS512_MCU1R5F0_OUTPUT_OFFSET
#define NAVSS512_MCU1R5F0_OUTPUT_OFFSET (120) |
◆ NAVSS512_MCU1R5F1_OUTPUT_OFFSET
#define NAVSS512_MCU1R5F1_OUTPUT_OFFSET (121) |
◆ MAIN2MCU0_INTR_ROUTER_INPUT_BASE
#define MAIN2MCU0_INTR_ROUTER_INPUT_BASE (184) |
◆ MAIN2MCU1_INTR_ROUTER_INPUT_BASE
#define MAIN2MCU1_INTR_ROUTER_INPUT_BASE (186) |
◆ MAIN2MCU0_INTR_ROUTER_OUTPUT_BASE
#define MAIN2MCU0_INTR_ROUTER_OUTPUT_BASE (0) |
◆ MAIN2MCU1_INTR_ROUTER_OUTPUT_BASE
#define MAIN2MCU1_INTR_ROUTER_OUTPUT_BASE (1) |