PDK API Guide for AM65xx
csl_dssVideoPort.h
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33 
47 #ifndef CSL_DSSVIDEOPORT_H_
48 #define CSL_DSSVIDEOPORT_H_
49 
50 /* ========================================================================== */
51 /* Include Files */
52 /* ========================================================================== */
53 
54 /* None */
55 
56 #ifdef __cplusplus
57 extern "C" {
58 #endif
59 
60 /* ========================================================================== */
61 /* Macros & Typedefs */
62 /* ========================================================================== */
63 
69 typedef CSL_dss_vp1Regs CSL_dss_vpRegs;
70 
79 #define CSL_DSS_VP_CSC_POS_AFTER_GAMMA \
80  ((uint32_t) CSL_DSS_VP1_CONFIG_COLORCONVPOS_VAL_AFTERGAMMA)
81 
82 #define CSL_DSS_VP_CSC_POS_BEFORE_GAMMA \
83  ((uint32_t) CSL_DSS_VP1_CONFIG_COLORCONVPOS_VAL_BEFOREGAMMA)
84 /* @} */
85 
94 #define CSL_DSS_VP_TDM_UNUSED_BITS_LEVEL_LOW \
95  ((uint32_t) CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_LOWLEVEL)
96 
97 #define CSL_DSS_VP_TDM_UNUSED_BITS_LEVEL_HIGH \
98  ((uint32_t) CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_HIGHLEVEL)
99 
100 #define CSL_DSS_VP_TDM_UNUSED_BITS_LEVEL_UNCHANGED \
101  ((uint32_t) CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_UNCHANGED)
102 /* @} */
103 
111 #define CSL_DSS_VP_TDM_CYCLE_1PERPIXEL \
112  ((uint32_t) CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_1CYCPERPIX)
113 
114 #define CSL_DSS_VP_TDM_CYCLE_2PERPIXEL \
115  ((uint32_t) CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_2CYCPERPIX)
116 
117 #define CSL_DSS_VP_TDM_CYCLE_3PERPIXEL \
118  ((uint32_t) CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPERPIX)
119 
120 #define CSL_DSS_VP_TDM_CYCLE_3PER2PIXEL \
121  ((uint32_t) CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPER2PIX)
122 /* @} */
123 
131 #define CSL_DSS_VP_TDM_PARALLEL_OUTPUT_8BIT \
132  ((uint32_t) CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_8BPARAINT)
133 
134 #define CSL_DSS_VP_TDM_PARALLEL_OUTPUT_9BIT \
135  ((uint32_t) CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_9BPARAINT)
136 
137 #define CSL_DSS_VP_TDM_PARALLEL_OUTPUT_12BIT \
138  ((uint32_t) CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_12BPARAINT)
139 
140 #define CSL_DSS_VP_TDM_PARALLEL_OUTPUT_16BIT \
141  ((uint32_t) CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_16BPARAINT)
142 /* @} */
143 
151 #define CSL_DSS_VP_HVSYNC_NOT_ALIGNED \
152  ((uint32_t) CSL_DSS_VP1_POL_FREQ_ALIGN_VAL_NOTALIGNED)
153 
154 #define CSL_DSS_VP_HVSYNC_ALIGNED \
155  ((uint32_t) CSL_DSS_VP1_POL_FREQ_ALIGN_VAL_ALIGNED)
156 /* @} */
157 
166 #define CSL_DSS_VP_HVCLK_CONTROL_OFF \
167  ((uint32_t) CSL_DSS_VP1_POL_FREQ_ONOFF_VAL_DOPEDPCK)
168 
169 #define CSL_DSS_VP_HVCLK_CONTROL_ON \
170  ((uint32_t) CSL_DSS_VP1_POL_FREQ_ONOFF_VAL_DBIT16)
171 /* @} */
172 
181 #define CSL_DSS_VP_LPP_DELTA_ZERO \
182  ((uint32_t) CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_SAME)
183 
184 #define CSL_DSS_VP_LPP_DELTA_PLUSONE \
185  ((uint32_t) CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_PLUSONE)
186 
187 #define CSL_DSS_VP_LPP_DELTA_MINUSONE \
188  ((uint32_t) CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_MINUSONE)
189 /* @} */
190 
199 #define CSL_DSS_VP_FID_FIRST_EVEN \
200  ((uint32_t) CSL_DSS_VP1_CONFIG_FIDFIRST_VAL_EVEN)
201 
202 #define CSL_DSS_VP_FID_FIRST_ODD \
203  ((uint32_t) CSL_DSS_VP1_CONFIG_FIDFIRST_VAL_ODD)
204 /* @} */
205 
213 #define CSL_DSS_VP_SAFETY_REGION_0 ((uint32_t) 0x0U)
214 
215 #define CSL_DSS_VP_SAFETY_REGION_1 ((uint32_t) 0x1U)
216 
217 #define CSL_DSS_VP_SAFETY_REGION_2 ((uint32_t) 0x2U)
218 
219 #define CSL_DSS_VP_SAFETY_REGION_3 ((uint32_t) 0x3U)
220 
221 #define CSL_DSS_VP_SAFETY_REGION_MAX ((uint32_t) 0x4U)
222 
223 #define CSL_DSS_VP_SAFETY_REGION_INVALID ((uint32_t) 0xFFU)
224 /* @} */
225 
234 #define CSL_DSS_VP_OLDI_MAP_TYPE_A \
235  ((uint32_t) CSL_DSS_VP1_DSS_OLDI_CFG_MAP_VAL_TYPE_A)
236 
237 #define CSL_DSS_VP_OLDI_MAP_TYPE_B \
238  ((uint32_t) CSL_DSS_VP1_DSS_OLDI_CFG_MAP_VAL_TYPE_B)
239 
240 #define CSL_DSS_VP_OLDI_MAP_TYPE_C \
241  ((uint32_t) CSL_DSS_VP1_DSS_OLDI_CFG_MAP_VAL_TYPE_C)
242 /* @} */
243 
255 #define CSL_DSS_VP_OLDI_BIT_DEPTH_18_BITS \
256  ((uint32_t) CSL_DSS_VP1_DSS_OLDI_CFG_MSB_VAL_18B)
257 
258 #define CSL_DSS_VP_OLDI_BIT_DEPTH_24_BITS \
259  ((uint32_t) CSL_DSS_VP1_DSS_OLDI_CFG_MSB_VAL_24B)
260 /* @} */
261 
262 /* ========================================================================== */
263 /* Structure Declarations */
264 /* ========================================================================== */
265 
269 typedef struct
270 {
271  uint32_t gammaEnable;
275  uint32_t gammaData[CSL_DSS_NUM_LUT_ENTRIES];
278 
282 typedef struct
283 {
284  uint32_t tdmEnable;
291  uint32_t tdmCycleFormat;
294  uint32_t tdmParallelMode;
334 
339 typedef struct
340 {
341  uint32_t actVidPolarity;
347  uint32_t hsPolarity;
350  uint32_t vsPolarity;
354 
358 typedef struct
359 {
360  uint32_t hVAlign;
363  uint32_t hVClkControl;
366  uint32_t hVClkRiseFall;
369  uint32_t acBI;
373  uint32_t acB;
379  uint32_t vSyncGated;
383  uint32_t hSyncGated;
387  uint32_t pixelClockGated;
391  uint32_t pixelDataGated;
395  uint32_t pixelGated;
401 
405 typedef struct
406 {
474  uint32_t dvoFormat;
476  uint32_t cscRange;
478  uint32_t videoIfWidth;
490  uint32_t fidFirst;
495 
499 typedef struct
500 {
501  uint32_t hFrontPorch;
507  uint32_t hBackPorch;
513  uint32_t hSyncLen;
518  uint32_t vFrontPorch;
524  uint32_t vBackPorch;
531  uint32_t vSyncLen;
539 
543 typedef struct
544 {
545  uint32_t oldiMapType;
550  uint32_t dssBitDepth;
554 
555 /* ========================================================================== */
556 /* Function Declarations */
557 /* ========================================================================== */
558 
569 void CSL_dssVpEnable(CSL_dss_vpRegs *vpRegs, uint32_t enable);
570 
580 void CSL_dssVpSetGoBit(CSL_dss_vpRegs *vpRegs);
581 
593  const CSL_DssVpLcdTdmCfg *lcdTdmCfg);
594 
605  uint32_t lineNum);
606 
618  const CSL_DssVpLcdOpTimingCfg *lcdCfg);
619 
638  const CSL_DssVpLcdBlankTimingCfg *blankCfg,
639  uint32_t dvoFormat,
640  uint32_t scanFormat,
641  uint32_t isCustomTiming);
642 
654  CSL_dss_vpRegs *vpRegs,
655  const CSL_DssVpLcdAdvSignalCfg *advSignalCfg);
656 
668  CSL_dss_vpRegs *vpRegs,
669  const CSL_DssVpLcdSignalPolarityCfg *polarityCfg);
670 
682  const CSL_DssVpGammaCfg *gammaCfg);
683 
700  const CSL_DssCscCoeff *cscCoeff,
701  uint32_t cscPos,
702  uint32_t cscEnable);
703 
714  uint32_t signSeedVal);
715 
728  uint32_t referenceSign,
729  uint32_t regionId);
730 
744  const CSL_DssSafetyChkCfg *safetyCfg,
745  uint32_t regionId);
746 
757 uint32_t CSL_dssVpGetSafetySign(const CSL_dss_vpRegs *vpRegs,
758  uint32_t regionId);
759 
768 void CSL_dssVpOldiReset(const CSL_dss_vpRegs *vpRegs);
769 
781  const CSL_DssVpOldiCfg *oldiCfg);
782 
793 void CSL_dssVpOldiEnable(CSL_dss_vpRegs *vpRegs, uint32_t enable);
794 
795 /* ========================================================================== */
796 /* Static Function Declarations */
797 /* ========================================================================== */
798 
806 static inline void CSL_dssVpGammaCfgInit(
807  CSL_DssVpGammaCfg *gammaCfg);
808 
816 static inline void CSL_dssVpLcdTdmCfgInit(
817  CSL_DssVpLcdTdmCfg *tdmCfg);
818 
826 static inline void CSL_dssVpLcdSignalPolarityCfgInit(
827  CSL_DssVpLcdSignalPolarityCfg *polarityCfg);
828 
836 static inline void CSL_dssVpLcdAdvSignalCfgInit(
837  CSL_DssVpLcdAdvSignalCfg *advSignalCfg);
838 
846 static inline void CSL_dssVpLcdOpTimingCfgInit(
847  CSL_DssVpLcdOpTimingCfg *lcdCfg);
848 
856 static inline void CSL_dssVpLcdBlankTimingCfgInit(
857  CSL_DssVpLcdBlankTimingCfg *blankCfg);
858 
866 static inline void CSL_dssVpOldiCfgInit(CSL_DssVpOldiCfg *oldiCfg);
867 
868 /* ========================================================================== */
869 /* Static Function Definitions */
870 /* ========================================================================== */
871 
872 static inline void CSL_dssVpGammaCfgInit(
873  CSL_DssVpGammaCfg *gammaCfg)
874 {
875  uint32_t i;
876  if(NULL != gammaCfg)
877  {
878  gammaCfg->gammaEnable = FALSE;
879  for(i=0U; i<CSL_DSS_NUM_LUT_ENTRIES; i++)
880  {
881  gammaCfg->gammaData[i] = 0U;
882  }
883  }
884 }
885 
886 static inline void CSL_dssVpLcdTdmCfgInit(
887  CSL_DssVpLcdTdmCfg *tdmCfg)
888 {
889  if(NULL != tdmCfg)
890  {
891  tdmCfg->tdmEnable = FALSE;
895  tdmCfg->numBitsPixel1Cycle0 = 0x0U;
896  tdmCfg->numBitsPixel1Cycle1 = 0x0U;
897  tdmCfg->numBitsPixel1Cycle2 = 0x0U;
898  tdmCfg->bitAlignPixel1Cycle0 = 0x0U;
899  tdmCfg->bitAlignPixel1Cycle1 = 0x0U;
900  tdmCfg->bitAlignPixel1Cycle2 = 0x0U;
901  tdmCfg->numBitsPixel2Cycle0 = 0x0U;
902  tdmCfg->numBitsPixel2Cycle1 = 0x0U;
903  tdmCfg->numBitsPixel2Cycle2 = 0x0U;
904  tdmCfg->bitAlignPixel2Cycle0 = 0x0U;
905  tdmCfg->bitAlignPixel2Cycle1 = 0x0U;
906  tdmCfg->bitAlignPixel2Cycle2 = 0x0U;
907  }
908 }
909 
911  CSL_DssVpLcdSignalPolarityCfg *polarityCfg)
912 {
913  if(NULL != polarityCfg)
914  {
915  polarityCfg->actVidPolarity = FVID2_POL_HIGH;
917  polarityCfg->hsPolarity = FVID2_POL_HIGH;
918  polarityCfg->vsPolarity = FVID2_POL_HIGH;
919  }
920 }
921 
922 static inline void CSL_dssVpLcdAdvSignalCfgInit(
923  CSL_DssVpLcdAdvSignalCfg *advSignalCfg)
924 {
925  if(NULL != advSignalCfg)
926  {
927  advSignalCfg->hVAlign = CSL_DSS_VP_HVSYNC_NOT_ALIGNED;
929  advSignalCfg->hVClkRiseFall = FVID2_EDGE_POL_FALLING;
930  advSignalCfg->acBI = 0x0U;
931  advSignalCfg->acB = 0x0U;
932  advSignalCfg->vSyncGated = FALSE;
933  advSignalCfg->hSyncGated = FALSE;
934  advSignalCfg->pixelClockGated = FALSE;
935  advSignalCfg->pixelDataGated = FALSE;
936  advSignalCfg->pixelGated = FALSE;
937  }
938 }
939 
940 static inline void CSL_dssVpLcdOpTimingCfgInit(
941  CSL_DssVpLcdOpTimingCfg *lcdCfg)
942 {
943  if(NULL != lcdCfg)
944  {
945  Fvid2ModeInfo_init(&(lcdCfg->mInfo));
948  lcdCfg->videoIfWidth = FVID2_VIFW_12BIT;
951  }
952 }
953 
955  CSL_DssVpLcdBlankTimingCfg *blankCfg)
956 {
957  if(NULL != blankCfg)
958  {
959  blankCfg->hFrontPorch = 0x0U;
960  blankCfg->hBackPorch = 0x0U;
961  blankCfg->hSyncLen = 0x0U;
962  blankCfg->vFrontPorch = 0x0U;
963  blankCfg->vBackPorch = 0x0U;
964  blankCfg->vSyncLen = 0x0U;
965  }
966 }
967 
968 static inline void CSL_dssVpOldiCfgInit(CSL_DssVpOldiCfg *oldiCfg)
969 {
970  if(NULL != oldiCfg)
971  {
975  }
976 }
977 
978 #ifdef __cplusplus
979 }
980 #endif
981 
982 #endif /* #ifndef CSL_DSSVIDEOPORT_H_ */
983 
984 /* @} */
uint32_t acB
Definition: csl_dssVideoPort.h:373
Advance Signal Configuration for the LCD.
Definition: csl_dssVideoPort.h:358
uint32_t hFrontPorch
Definition: csl_dssVideoPort.h:501
uint32_t tdmCycleFormat
Definition: csl_dssVideoPort.h:291
FVID2 Mode information structure.
Definition: csl_fvid2_dataTypes.h:1266
void CSL_dssVpEnableTvGamma(CSL_dss_vpRegs *vpRegs, const CSL_DssVpGammaCfg *gammaCfg)
Enable/Bypass TV Gamma Table.
static void CSL_dssVpLcdOpTimingCfgInit(CSL_DssVpLcdOpTimingCfg *lcdCfg)
CSL_DssVpLcdOpTimingCfg structure init function.
Definition: csl_dssVideoPort.h:940
uint32_t numBitsPixel2Cycle1
Definition: csl_dssVideoPort.h:318
Blanking Timing parameters for the LCD.
Definition: csl_dssVideoPort.h:499
#define CSL_DSS_VP_HVCLK_CONTROL_OFF
HSYNC and VSYNC are driven on opposite edges of the pixel clock than pixel data.
Definition: csl_dssVideoPort.h:166
void CSL_dssVpSetSafetyChkConfig(CSL_dss_vpRegs *vpRegs, const CSL_DssSafetyChkCfg *safetyCfg, uint32_t regionId)
Configure the Safety Check parameters.
uint32_t pixelClkPolarity
Definition: csl_dssVideoPort.h:344
#define FALSE
Definition: csl_types.h:55
uint32_t hVClkControl
Definition: csl_dssVideoPort.h:363
void CSL_dssVpSetLcdTdmConfig(CSL_dss_vpRegs *vpRegs, const CSL_DssVpLcdTdmCfg *lcdTdmCfg)
Configure the LCD TDM(Time division multiplexing) parameters.
#define FVID2_POL_HIGH
High Polarity.
Definition: csl_fvid2_dataTypes.h:772
Timing configuration for the LCD output.
Definition: csl_dssVideoPort.h:405
uint32_t tdmEnable
Definition: csl_dssVideoPort.h:284
uint32_t hSyncGated
Definition: csl_dssVideoPort.h:383
Polarity of Active Video, Pixel Clock, HSync and VSync signals for the LCD.
Definition: csl_dssVideoPort.h:339
#define FVID2_EDGE_POL_FALLING
Falling Edge.
Definition: csl_fvid2_dataTypes.h:787
static void Fvid2ModeInfo_init(Fvid2_ModeInfo *modeInfo)
Fvid2_ModeInfo structure init function. This defaults to 1080p60.
Definition: csl_fvid2_dataTypes.h:2233
static void CSL_dssVpLcdTdmCfgInit(CSL_DssVpLcdTdmCfg *tdmCfg)
CSL_DssVpLcdTdmCfg structure init function.
Definition: csl_dssVideoPort.h:886
#define CSL_DSS_VP_FID_FIRST_EVEN
First field is even.
Definition: csl_dssVideoPort.h:199
#define CSL_DSS_VP_OLDI_BIT_DEPTH_24_BITS
Input RGB data's bit depth is 24.
Definition: csl_dssVideoPort.h:258
uint32_t fidFirst
Definition: csl_dssVideoPort.h:490
Gamma Correction configuration for DSS Video Port Output.
Definition: csl_dssVideoPort.h:269
void CSL_dssVpSetCSCCoeff(CSL_dss_vpRegs *vpRegs, const CSL_DssCscCoeff *cscCoeff, uint32_t cscPos, uint32_t cscEnable)
Configure the coefficients for Color Space Conversion.
uint32_t gammaEnable
Definition: csl_dssVideoPort.h:271
uint32_t dssBitDepth
Definition: csl_dssVideoPort.h:550
uint32_t hVClkRiseFall
Definition: csl_dssVideoPort.h:366
void CSL_dssVpSetOldiConfig(CSL_dss_vpRegs *vpRegs, const CSL_DssVpOldiCfg *oldiCfg)
Set the OLDI configuration.
uint32_t pixelGated
Definition: csl_dssVideoPort.h:395
uint32_t numBitsPixel1Cycle2
Definition: csl_dssVideoPort.h:303
uint32_t vsPolarity
Definition: csl_dssVideoPort.h:350
#define CSL_DSS_VP_TDM_CYCLE_1PERPIXEL
1 cycle per pixel
Definition: csl_dssVideoPort.h:111
#define CSL_DSS_VP_OLDI_MAP_TYPE_C
Map Type C is Single Link 24 bit VESA.
Definition: csl_dssVideoPort.h:240
uint32_t bitAlignPixel1Cycle0
Definition: csl_dssVideoPort.h:306
uint32_t pixelClockGated
Definition: csl_dssVideoPort.h:387
uint32_t bitAlignPixel1Cycle2
Definition: csl_dssVideoPort.h:312
uint32_t actVidPolarity
Definition: csl_dssVideoPort.h:341
uint32_t tdmParallelMode
Definition: csl_dssVideoPort.h:294
uint32_t dataEnablePolarity
Definition: csl_dssVideoPort.h:547
uint32_t videoIfWidth
Definition: csl_dssVideoPort.h:478
uint32_t vBackPorch
Definition: csl_dssVideoPort.h:524
int32_t CSL_dssVpSetLcdBlankTiming(CSL_dss_vpRegs *vpRegs, const CSL_DssVpLcdBlankTimingCfg *blankCfg, uint32_t dvoFormat, uint32_t scanFormat, uint32_t isCustomTiming)
Configure the LCD Blank Timing parameters.
uint32_t oldiMapType
Definition: csl_dssVideoPort.h:545
uint32_t hVAlign
Definition: csl_dssVideoPort.h:360
#define CSL_DSS_VP_TDM_PARALLEL_OUTPUT_8BIT
8-bit parallel output interface selected
Definition: csl_dssVideoPort.h:131
static void CSL_dssVpOldiCfgInit(CSL_DssVpOldiCfg *oldiCfg)
CSL_DssVpOldiCfg structure init function.
Definition: csl_dssVideoPort.h:968
uint32_t tdmUnusedBitsLevel
Definition: csl_dssVideoPort.h:288
#define NULL
Define NULL if not defined.
Definition: csl_types.h:107
#define CSL_DSS_VP_LPP_DELTA_ZERO
Odd field has same size as even.
Definition: csl_dssVideoPort.h:181
void CSL_dssVpSetSafetyReferenceSign(CSL_dss_vpRegs *vpRegs, uint32_t referenceSign, uint32_t regionId)
Set the reference safety signature for data correctness check.
uint32_t bitAlignPixel1Cycle1
Definition: csl_dssVideoPort.h:309
uint32_t numBitsPixel2Cycle2
Definition: csl_dssVideoPort.h:321
uint32_t numBitsPixel2Cycle0
Definition: csl_dssVideoPort.h:315
OLDI Configuration.
Definition: csl_dssVideoPort.h:543
static void CSL_dssVpLcdAdvSignalCfgInit(CSL_DssVpLcdAdvSignalCfg *advSignalCfg)
CSL_DssVpLcdAdvSignalCfg structure init function.
Definition: csl_dssVideoPort.h:922
Structure containing coefficients for Color Space Conversion.
Definition: csl_dssTop.h:230
uint32_t pixelDataGated
Definition: csl_dssVideoPort.h:391
void CSL_dssVpSetLcdSignalPolarityConfig(CSL_dss_vpRegs *vpRegs, const CSL_DssVpLcdSignalPolarityCfg *polarityCfg)
Configure the Polarity of LCD signals(HSYNC, VSYNC, PCLK, Data)
void CSL_dssVpSetSafetySignSeedVal(CSL_dss_vpRegs *vpRegs, uint32_t signSeedVal)
Set the seed value for the signature calculation.
#define CSL_DSS_NUM_LUT_ENTRIES
Number of entries for CLUT/Gamma Correction.
Definition: csl_dssTop.h:218
#define CSL_DSS_VP_HVSYNC_NOT_ALIGNED
HSYNC and VSYNC are not aligned.
Definition: csl_dssVideoPort.h:151
uint32_t acBI
Definition: csl_dssVideoPort.h:369
uint32_t cscRange
Definition: csl_dssVideoPort.h:476
uint32_t bitAlignPixel2Cycle2
Definition: csl_dssVideoPort.h:330
CSL_dss_vp1Regs CSL_dss_vpRegs
DSS Video Port Registers.
Definition: csl_dssVideoPort.h:69
#define FVID2_VIFW_12BIT
12-bit interface.
Definition: csl_fvid2_dataTypes.h:909
Fvid2_ModeInfo mInfo
Definition: csl_dssVideoPort.h:407
void CSL_dssVpEnable(CSL_dss_vpRegs *vpRegs, uint32_t enable)
Enable the DSS Video Port.
uint32_t hSyncLen
Definition: csl_dssVideoPort.h:513
uint32_t vSyncLen
Definition: csl_dssVideoPort.h:531
uint32_t vFrontPorch
Definition: csl_dssVideoPort.h:518
#define CSL_DSS_CSC_RANGE_FULL
Full range selected.
Definition: csl_dssTop.h:181
uint32_t numBitsPixel1Cycle0
Definition: csl_dssVideoPort.h:297
uint32_t dvoFormat
Definition: csl_dssVideoPort.h:474
uint32_t numBitsPixel1Cycle1
Definition: csl_dssVideoPort.h:300
uint32_t vSyncGated
Definition: csl_dssVideoPort.h:379
LCD Configuration for Time Division Multiplexing.
Definition: csl_dssVideoPort.h:282
void CSL_dssVpSetLcdAdvSignalConfig(CSL_dss_vpRegs *vpRegs, const CSL_DssVpLcdAdvSignalCfg *advSignalCfg)
Configure the advance LCD Signal parameters.
#define FVID2_EDGE_POL_RISING
Rising Edge.
Definition: csl_fvid2_dataTypes.h:785
int32_t CSL_dssVpSetLcdOpTimingConfig(CSL_dss_vpRegs *vpRegs, const CSL_DssVpLcdOpTimingCfg *lcdCfg)
Configure the LCD Timing parameters.
uint32_t bitAlignPixel2Cycle0
Definition: csl_dssVideoPort.h:324
Configuration for doing safety checks.
Definition: csl_dssTop.h:270
uint32_t deltaLinesPerPanel
Definition: csl_dssVideoPort.h:487
#define FVID2_DV_GENERIC_DISCSYNC
Video format is for any discrete sync.
Definition: csl_fvid2_dataTypes.h:221
void CSL_dssVpSetLcdLineNum(CSL_dss_vpRegs *vpRegs, uint32_t lineNum)
Set the Line Number at which the interrupt should be generated.
void CSL_dssVpOldiReset(const CSL_dss_vpRegs *vpRegs)
Reset the OLDI Module.
uint32_t hsPolarity
Definition: csl_dssVideoPort.h:347
uint32_t hBackPorch
Definition: csl_dssVideoPort.h:507
static void CSL_dssVpLcdBlankTimingCfgInit(CSL_DssVpLcdBlankTimingCfg *blankCfg)
CSL_DssVpLcdBlankTimingCfg structure init function.
Definition: csl_dssVideoPort.h:954
static void CSL_dssVpGammaCfgInit(CSL_DssVpGammaCfg *gammaCfg)
CSL_DssVpGammaCfg structure init function.
Definition: csl_dssVideoPort.h:872
static void CSL_dssVpLcdSignalPolarityCfgInit(CSL_DssVpLcdSignalPolarityCfg *polarityCfg)
CSL_DssVpLcdSignalPolarityCfg structure init function.
Definition: csl_dssVideoPort.h:910
uint32_t CSL_dssVpGetSafetySign(const CSL_dss_vpRegs *vpRegs, uint32_t regionId)
Get the Safety Signature of the sub region.
void CSL_dssVpOldiEnable(CSL_dss_vpRegs *vpRegs, uint32_t enable)
Enable/disable the OLDI Module.
#define CSL_DSS_VP_TDM_UNUSED_BITS_LEVEL_LOW
Low level.
Definition: csl_dssVideoPort.h:94
void CSL_dssVpSetGoBit(CSL_dss_vpRegs *vpRegs)
GO Command for the VP output. It is used to synchronize the pipelines associated with the VP output.
uint32_t gammaData[CSL_DSS_NUM_LUT_ENTRIES]
Definition: csl_dssVideoPort.h:275
uint32_t bitAlignPixel2Cycle1
Definition: csl_dssVideoPort.h:327