Platform Development Kit (PDK) - AM65XX User Guide
07_03_00
Table of Contents
1. Overview
2. Release Notes
3. Getting Started
4. Modules
5. Bootloader (SBL)
6. Board/EVM Abstraction
7. How to Guides
8. Frequently Asked Questions
8.1. FAQ - Common
8.2. FAQ - CAN
8.3. FAQ - FVID2
8.4. FAQ - Why Vectors should be copied to ATCM (CCS)
8.5. FAQ - Supported Cores by example applications
8.6. FAQ - How to set the clock for a given module and clock
9. Developer Notes
Platform Development Kit (PDK) - AM65XX User Guide
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8. Frequently Asked Questions
8. Frequently Asked Questions
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8.1. FAQ - Common
8.1.1. Generic
8.1.1.1. What does PDK stand for?
8.1.1.2. What do I get with PDK, and how do I get started?
8.1.2. Build
8.1.2.1. What are the common issues faced during the build?
8.2. FAQ - CAN
8.2.1. What is CAN?
8.2.2. How is bit-rate calculated?
8.2.3. What is CAN bus termination?
8.2.4. What is Transceiver Delay Compensation Value(TDCV) and how is it calculated?
8.2.5. Things to consider/check before sending a message over CAN bus
8.2.6. CAN communication failed, where to start debug?
8.3. FAQ - FVID2
8.3.1. Data Formats Support on Video IPs/ISP on Jacinto-7 Devices
8.3.1.1. Data Format Support on CSIRX, CSITX, VISS, and DSS Modules:
8.3.1.2. Data Format Compatibility on CSIRX, CSITX, VISS, and DSS Modules:
8.4. FAQ - Why Vectors should be copied to ATCM (CCS)
8.4.1. Symptom
8.4.2. Root Cause
8.4.3. How does it work with SBL
8.4.4. Fix
8.5. FAQ - Supported Cores by example applications
8.5.1. Introduction
8.5.2. SR2.1
8.5.3. SR2.1 HS
8.6. FAQ - How to set the clock for a given module and clock
8.6.1. Introduction
8.6.2. Default clock state of the system
8.6.3. Setting the clock for a device