| Feature | Module |
| SFO calibration library and examples | EPWM |
| Optimized IRQ handler and low latency interrupt example | DPL |
| Standby (WFI) mode support DPL noRTOS | DPL |
| EDMA example to transfer between different memories | EDMA |
| SysConfig option to enable pBIST for SBL | SBL |
| Interrupt profiling support and example | DPL |
| Support for loading HS-FS firmware view CCS load script | Common |
| MbedTLS MQTT example | Networking |
| Support added for Single Packet reception from DMA | Networking |
| Smart placement support | Common |
| IEC60730 Support added. R5F CPU static register read diagnoctic and example added. | SDL |
| SDL is safety certified from TuV for ISO26262/IEC61508 for MCU PLUS SDK version 8.6.0. | SDL |
| Module | Supported CPUs | SysConfig Support | OS support | Key features tested | Key features not tested / NOT supported |
| Cache | R5F | YES | FreeRTOS, NORTOS | Cache write back, invalidate, enable/disable | - |
| Clock | R5F | YES | FreeRTOS, NORTOS | Tick timer at user specified resolution, timeouts and delays | - |
| CpuId | R5F | NA | FreeRTOS, NORTOS | Verify Core ID and Cluster ID that application is currently running on | - |
| CycleCounter | R5F | NA | FreeRTOS, NORTOS | Measure CPU cycles using CPU specific internal counters | - |
| Debug | R5F | YES | FreeRTOS, NORTOS | Logging and assert to any combo of: UART, CCS, shared memory | - |
| Heap | R5F | NA | FreeRTOS, NORTOS | Create arbitrary heaps in user defined memory segments | - |
| Hwi | R5F | YES | FreeRTOS, NORTOS | Interrupt register, enable/disable/restore, Interrupt prioritization | - |
| MPU | R5F | YES | FreeRTOS, NORTOS | Setup MPU and control access to address space | - |
| Semaphore | R5F | NA | FreeRTOS, NORTOS | Binary, Counting Semaphore, recursive mutexs with timeout | - |
| Task | R5F | NA | FreeRTOS | Create, delete tasks | - |
| Timer | R5F | YES | FreeRTOS, NORTOS | Configure arbitrary timers | - |
| Peripheral | Supported CPUs | SysConfig Support | DMA Supported | Key features tested | Key features not tested / NOT supported |
| ADC | R5F | YES | Yes. Example: adc_soc_continuous_dma | Single software triggered conversion, Multiple ADC trigger using PWM, Result read using DMA, EPWM trip through PPB limit, PPB limits, PPB offsets, burst mode oversampling, differential mode, Offset, EPWM triggered conversion | - |
| Bootloader | R5F | YES | Yes. DMA enabled for SBL QSPI | Boot modes: QSPI, UART. All R5F's | - |
| CMPSS | R5F | YES | NA | Asynchronous PWM trip | - |
| CPSW | R5F | YES | No | MAC loopback, PHY loopback, LWIP: Getting IP, Ping, Iperf, Layer 2 MAC, Layer 2 PTP Timestamping and Ethernet CPSW Switch support | - |
| DAC | R5F | YES | Yes. Example: dac_sine_dma | Constant voltage, Square wave generation, Sine wave generation with and without DMA, Ramp wave generation, Random Voltage generation | - |
| ECAP | R5F | YES | No | ECAP APWM mode, PWM capture | - |
| EDMA | R5F | YES | NA | DMA transfer using interrupt and polling mode, QDMA Transfer, Channel Chaining, PaRAM Linking | - |
| EPWM | R5F | YES | Yes. Example: epwm_dma | PWM outputs A and B in up-down count mode, Trip zone, Update PWM using EDMA, Valley switching, High resolution time period adjustment, type5 feature | - |
| EQEP | R5F | YES | NA | Speed and Position measurement. Frequency Measurement | - |
| FSI | R5F | YES | Yes. Example: fsi_loopback_dma | RX, TX, polling, interrupt mode, Dma, single lane loopback. | - FSI Spi Mode |
| GPIO | R5F | YES | NA | Output, Input and Interrupt functionality | - |
| I2C | R5F | YES | No | Controller mode, basic read/write | - |
| IPC Notify | R5F | YES | NA | Mailbox functionality, IPC between RTOS/NORTOS CPUs | M4F core |
| IPC Rpmsg | R5F | YES | NA | RPMessage protocol based IPC | M4F core |
| MCAN | R5F | YES | No | RX, TX, interrupt and polling mode, Corrupt Message Transmission Prevention, Error Passive state, Bus Off State, Bus Monitoring Mode | - |
| MCSPI | R5F | YES | Yes. Example: mcspi_loopback_dma | Controller/Peripheral mode, basic read/write, polling, interrupt and DMA mode | - |
| MDIO | R5F | YES | NA | Register read/write, link status and link interrupt enable API | - |
| MPU Firewall | R5F | YES | NA | Only compiled (Works only on HS-SE device) | - |
| MMCSD | R5F | YES | NA | MMCSD 4bit, Raw read/write | - file IO, eMMC |
PINMUX | R5F | YES | NA | Tested with multiple peripheral pinmuxes PMU | R5F | NO | NA | Tested various PMU events | Counter overflow detection is not enabled | - PRUICSS | R5F | YES | NA | Tested with Ethercat FW HAL | - QSPI | R5F | YES | Yes. Example: qspi_flash_dma_transfer | Read direct, Write indirect, Read/Write commands, DMA for read | - RTI | R5F | YES | No | Counter read, timebase selction, comparator setup for Interrupt, DMA requests | Capture feature, fast enabling/disabling of events not tested SDFM | R5F | YES | No | Filter data read from CPU, Filter data read with PWM sync | - SOC | R5F | YES | NA | Lock/unlock MMRs, clock enable, set Hz, Xbar configuration, SW Warm Reset, Address Translation | - SPINLOCK | R5F | NA | NA | Lock, unlock HW spinlocks | - UART | R5F | YES | Yes. Example: uart_echo_dma | Basic read/write at baud rate 115200, polling, interrupt mode | HW flow control not tested, DMA mode not supported WATCHDOG | R5F | YES | NA | Reset mode, Interrupt mode | -
| Module | Supported CPUs | SysConfig Support | OS Support | Key features tested | Key features not tested |
| LwIP | R5F | YES | FreeRTOS | TCP/UDP IP networking stack with and without checksum offload enabled, TCP/UDP IP networking stack with server and client functionality, basic Socket APIs, netconn APIs and raw APIs, DHCP, ping, TCP iperf, scatter-gather, DSCP priority mapping | Other LwIP features |
| Ethernet driver (ENET) | R5F | YES | FreeRTOS | Ethernet as port using CPSW, MAC loopback and PHY loopback, Layer 2 MAC, Packet Timestamping, CPSW Switch, CPSW EST, interrupt pacing, Policer and Classifier, MDIO Manual Mode, CBS (IEEE 802.1Qav), Strapped PHY (Early Ethernet) | RMII mode |
| ICSS-EMAC | R5F | YES | FreeRTOS | Only compiled | Not tested |
| Mbed-TLS | R5F | NO | FreeRTOS | Tested software cryptography after porting, used mbedTLS with LwIP to implement HTTPS server | Hardware offloaded cryptography |
| Module | Supported CPUs | SysConfig Support | OS support | Key features tested | Key features not tested / NOT supported |
| MCRC | R5F | NA | NORTOS | Full CPU, Auto CPU Mode and Semi CPU Auto Mode | - |
| DCC | R5F | NA | NORTOS | Single Shot and Continuous modes | - |
| PBIST | R5F | NA | NORTOS | Memories supported by MSS PBIST controller. | - |
| ESM | R5F | NA | NORTOS | Tested in combination with RTI, DCC | - |
| RTI | R5F | NA | NORTOS | WINDOWSIZE_100_PERCENT, WINDOWSIZE_50_PERCENT ,Latency/Propagation timing error(early)(50% window),Latency/Propagation timing error(late)(50% window) | - |
| ECC | R5F | NA | NORTOS | ECC of MSS_L2, R5F TCM, MCAN, VIM, ICSSM, TPTC | R5F Cache |
| ECC Bus Safety | R5F | NA | NORTOS | AHB, AXI, TPTC | - |
| CCM | R5F | NA | NORTOS | CCM Self Test Mode,Error Forcing Mode and Self Test Error Forcing Mode. | - |
| R5F STC(LBIST), Static Register Read | R5F | NA | NORTOS | STC of R5F, R5F CPU Static Register Read | - |
| ID | Head Line | Module | Applicable Releases | Applicable Devices | Resolution/Comments |
| MCUSDK-8526 | SBL examples should be calling Bootloader_loadSelfCpu for R5_0-0 core | SBL | 8.4.0 onwards | - |
| MCUSDK-9662 | QSPI LLD EDMA Transfer fails for size (Unaligned) > MAX EDMA CNT | QSPI | 8.4.0 onwards | Initiate trasfer with aligned data |
| MCUSDK-9811 | IPC Notify unregister client always returns success | IPC | 8.05.00 onwards | Added status variable check |
| MCUSDK-9835 | SBL should support HS-SE device build via CCS | SBL | 8.05.00 onwards | Added devconfig for CCS build |
| MCUSDK-10102 | Trip Zone example not working | EPWM | 8.6.0 | Gpio changes needed on E1 to E2 migration |
| MCUSDK-10119 | MCAN External read write example fails for multirun | MCAN | 8.5.0 onwards | Interrupt reset is required during init in example |
| MCUSDK-10144 | RTI driver Up Counter calculation in driver is incorrect | Timer | 8.06.00 onwards | Updated calculation to subtract reload value by one |
| MCUSDK-10167 | All the system project are made based on AM2631 | CCS | 8.6.0 | Updated to CCS12.4 and latest CSP |
| MCUSDK-10295 | ECAP : driver : Flags read doesn't include the Signal Monitoring errors | ECAP | 8.5.0 onwards | - |
| MCUSDK-10550 | Global Strobe Load Signal from EPWMs is not taking effect on ECAP Signal Monitoring | ECAP | 8.5.0 onwards | - |
| MCUSDK-10712 | GPIO_Input_Interrupt Example not working | GPIO | 8.6.0 | Added Interrupt config call in template |
| MCUSDK-10713 | Interrupt registration fixed in the IPC Driver code | IPC | 8.5.0 onwards | Added Sysconfig based interrupt registration |
| MCUSDK-10841 | SBL needs to copy the vector table for self core right before the self-core reset release | SBL | 8.06.00 onwards | Move the image load for self core just before the release reset instead of doing it early |
| MCUSDK-11290 | EPWM: High Resolution DeadBand APIs does not write to registers properly | EPWM | 8.6.0 | - |
| MCUSDK-11354 | EPWM_clearTripZoneFlag() function in the SDK does not clear the CAPEVT signal | EPWM | 8.6.0 | Updated EPWM_clearTripZoneFlag API to accept CAPEVT as input |
| MCUSDK-11401 | Mailbox memory needs to be cleared after HSMRt load | SBL | 8.6.0 | - |
| MCUSDK-11207 | Incorrect IOCTL params for CPSW ENET_TIMESYNC_IOCTL_SET_TIMESTAMP | Networking | 8.5.0 | - |
| MCUSDK-10775 | Example build failing on enabling External Phy Management | Networking | 8.6.0 | - |
| PROC_SDL-5981 | SDL does not handle CCM callback of R5FSS1. | SDL | 8.5.0 onwards | - |
| ID | Head Line | Module | Reported in release | Workaround |
| MCUSDK-4234 | FSI RX Generic Trigger Test is not working | FSI | 8.3.0 | - |
| SITARAAPPS-2040 | Dual Core configuration issue with CSP 1.1.3 (Sitara MCU Device Support) on AM263x | CSP Gel Scripts | 8.2.1 | Edit gel file as mentioned in Prerequisites while running multi core applications. |
| MCUSDK-7030 | Interrupt nesting is not functional as expected when you have 2 or more interrupts with different priorities | MCAN | 8.4.0 | Keep the interrupt priority same in system |
| MCUSDK-7319 | CONTROLSS-SDFM: Two Back-to-Back Writes to SDCPARMx Register Bit Fields CEVT1SEL, CEVT2SEL, and HZEN Within Three SD-Modulator Clock Cycles can Corrupt SDFM State Machine, Resulting in Spurious Comparator Events | SDFM | 8.4.0 | Avoid back-to-back writes within three SD-modulator clock cycles or have the SDCPARMx register bit fields configured in one register write. |
| MCUSDK-8073 | UART1 not working as expected while configuring two uarts i.e UART0 and UART1 for two different cores | UART | 8.4.0 onwards | UART1 configuration from other core should be done after UART0 is configured and initialized |
| MCUSDK-9082 | MbedTLS - RSA exploit by kernel-privileged cache side-channel attackers | Mbed-TLS | 8.6.0 | - |
| MCUSDK-10626 | FSI DMA loopback example TX and RX mismatching on 2nd run | FSI | 8.6.0 | Reset board between 2 runs |
| MCUSDK-11462 | EPWM: Illegal Combo Logic example fails | EPWM | 9.0.0 | - |
| PROC_SDL-5616 | ECC Bus Safety SEC and DED Error Injection fails for CPSW. | SDL | 8.6.0 onwards | None. |
| PROC_SDL-5617 | ECC Bus Safety SEC and DED Error Injection fails for MSS_L2. | SDL | 8.6.0 onwards | None. |
| PROC_SDL-4749 | ECC Bus Safety DED Error Injection fails for AXI. | SDL | 8.5.0 onwards | None. |
| MCUSDK-11506 | ENET: CPDMA Goes To Lockup State. | CPSW | 8.5.0 onwards | Disable THOST checksum Offload. |
| MCUSDK-11507 | ENET: CPSW MAC port is stuck forever and dropping all the Rx/Tx packets with reception of corrupts preamble. | CPSW | 8.2.0 onwards | Disable hostRxTimestampEn flag in CPSW CPST configuration. This does not impact the CPTS Rx or Tx Timestamp Events for PTP packets and is orthogonal feature. |
| MCUSDK-10978 | CCS build doesn't support for HS appimages generation | CCS | 09.00.00 | Use make/gmake based build for HS-SE |
| PROC_SDL-5979 | R5F Cache ECC diagnostics are not supported. | SDL | 8.5.0 onwards | None. |
| MCUSDK-9309 | IPC: Issue when Combination of Notify and RPMsg is enabled in SysCfg. | IPC | 8.01.00 onwards | Use Only Notify or Only Notify+RPMsg on all cores. |
| ID | Head Line | Module | SDK Status |
| i2311 | USART: Spurious DMA Interrupts | UART | Implemented |
| i2354 | SDFM: Two Back-to-Back Writes to SDCPARMx Register Bit Fields CEVT1SEL, CEVT2SEL, and HZEN Within Three SD-Modulator Clock Cycles can Corrupt SDFM State Machine, Resulting in Spurious Comparator Events | SDFM | Open |
| i2355 | ADC: DMA Read of Stale Result | ADC | Implemented |
| i2345 | CPSW: Ethernet Packet corruption occurs if CPDMA fetches a packet which spans across memory banks | CPSW | Implemented |
| i2350 | McSPI data transfer using EDMA in 'ABSYNC' mode stops after 32 bits transfer | McSPI | Open |
| i2356 | ADC: Interrupts may Stop if INTxCONT (Continue-to-Interrupt Mode) is not Set | ADC | Implemented |
| i2324 | No synchronizer present between GCM and GCD status signals | Common | Open |
| i2375 | SDFM module event flags (SDIFLG.FLTx_FLG_CEVTx) do not get set again if the comparator event is still active and digital filter path (using SDCOMPxCTL.CEVTxDIGFILTSEL) is being selected | SDFM | Open |
| i2313 | GPMC: Sub-32-bit read issue with NAND and FPGA/FIFO | GPMC | Open |
1.8.20