AM263x MCU+ SDK  09.02.00
SHA

Access Protection Scheme

AES and SHA IP in DTHE support two contexts, namely Public and Secure.

SHA

  • The Hash/HMAC engine performs the SHA-1, SHA-2, and MD5 hash computation. When loaded with a data block, and optionally an intermediate digest, it independently performs the hash computation (64 or 80 rounds, depending on the algorithm) on that data block.
  • The engine can also start from the specified initial digest values instead of a loaded intermediate. Furthermore, it can perform the IPAD and OPAD XORs for MAC operations. The hash core does not perform any hash padding; this is performed in the host interface block, where the data input registers are located. A loaded data block must always be a full 64 bytes (512 bits) long.

sha module block diagram

API Sequence for SHA Algorithms

This sequence performs SHA-512 and SHA-256.

API Sequence for HMAC-SHA Algorithms

This sequence performs HMAC SHA-512 and SHA-256.

API