AM263Px Motor Control SDK  2025.00.00
Tamagawa

Introduction

The Tamagawa receiver firmware running on PRU-ICSS provides a well-defined interface to execute the Tamagawa encoder communication protocol. The Tamagawa diagnostic application interacts with the Tamagawa receiver firmware interface.

Note
This implementation using Peripheral input/output mode of PRU-ICSS. Refer Peripheral IF mode for more details.

Features Supported

  • Supports full-absolute SmartAbs and SmartInc encoders compatible with Smartceiver AU5561N1
  • Supports all Data Readout, Reset and EEPROM commands
  • Baud rate: 2.5 MHz and 5 MHz
  • Support for 8x oversampling for RX
    Note
    In three channel interface of PRU-ICSS, receive (Rx) is oversampled at 8x of send (Tx). Therefore, the encoder interface frequency "f" should be such that Tx source clock value is divisible by "f" and Rx source clock value is divisible by "(8*f)".
  • Support for periodic trigger using PRU-ICSS IEP timer module with two modes:
    • CMP Mode: IEP compare event based triggering (CMP0-CMP15)
    • CAP Mode: IEP capture event based triggering (CAP0-CAP7) for external signal synchronization
  • Same clock frequency for all channels in multi channel mode within the same PRU-ICSS slice
    • Different PRU slices can simultaneously handle encoders operating at different frequencies
  • Possible interface speeds with different source clock combinations
    Clock Source

    Interface Speed

    PRU Core Clock (200 MHz)

    2.5 MHz, 5 MHz

Features Not Supported

In general, peripherals or features not mentioned as part of "Features Supported" section are not supported, including the following:

  • Other baud rates.
  • Independent clock frequency for each channel in multi channel mode within the same PRU-ICSS slice
    • Clock frequency is a PRU-ICSS slice level configuration
    • Each channel within the same PRU-ICSS slice in multi-channel mode will have same clock frequencies

SysConfig Features

Note
It is strongly recommend to use SysConfig where it is available instead of using direct SW API calls. This will help simplify the SW application and also catch common mistakes early in the development cycle.
Attention
For each PRU-ICSS slice being used for Tamagawa, one module instance should be created in SysConfig.

SysConfig can be used to configure the following:

  • Selecting the ICSSM PRU slice (Tested on ICSSM-PRU0)
  • Configuring PINMUX
  • IEP event selection for periodic trigger mode
  • Selecting the ICSSG instance (Tested on ICSSG0)
  • Selecting the ICSSG PRU slice (Tested on ICSSG0-PRU1)
  • Configuring PINMUX
  • Enabling SA Mux mode
  • IEP instance and IEP event selection for periodic trigger mode
  • Channel selection
  • Baud rate selection
  • Selecting RX and TX source clock
  • Booster Pack Support: Enable when using BP-AM2BLDCSERVO
Note
Tamagawa firmware is tested with ICSS Core Clock running at 200 MHz frequency only.

Periodic Trigger Modes

The Tamagawa driver supports two types of periodic trigger modes for continuous position sampling:

CMP Mode (Compare Event Mode)

In CMP mode, the IEP timer compare event triggers position sampling. Compare events occur when the IEP timer counter matches the configured compare value. This mode enables fixed-rate periodic sampling.

Configuration:

  • Compare event range: CMP0-CMP15 (0-15)
  • Configured via tamagawa_config_periodic_trigger_cmp_mode() API
  • IEP compare event number set via tamagawa_config_iep_cmp_event() API
  • Event selection can be done in SysConfig
  • IEP configuration and CMP event configuration should be done in application. Driver uses above APIs to inform firmware to enable CMP periodic mode and uses the configured CMP event to start sampling periodically.

CAP Mode (Capture Event Mode)

In CAP mode, external signals trigger position sampling through IEP capture events. The capture event is triggered on the rising edge of the external input pulse, enabling event-driven position capture. Internal signals can also be mapped to IEP capture events via XBAR.

Configuration:

  • Capture event range: CAP0-CAP7 (0-7)
  • Configured via tamagawa_config_periodic_trigger_cap_mode() API
  • IEP capture event number set via tamagawa_config_iep_cap_event() API
  • Event selection can be done in SysConfig
  • IEP configuration and CAP event configuration should be done in application. Driver uses above APIs to inform firmware to enable CAP periodic mode and uses the configured CAP event to start sampling periodically.
Note
  • External signal must be routed to IEP capture input (if needed) in application
  • CAP6 and CAP7 support falling edge detection as well. In Tamagawa, rising edge is used always.
Attention
Both IEP event configuration APIs (tamagawa_config_iep_cmp_event() and tamagawa_config_iep_cap_event()) are automatically called during tamagawa_init() with values configured in SysConfig.

PRU-ICSS Resource Usage

  • Utilizes the Peripheral IF mode (3-channel peripheral interface mode) for Tamagawa communication. Maximum of 3 channels are available per PRU slice. (Refer Peripheral IF mode for more details)
  • Each channel has 4 pins (Clock, Data out, Data in, Output enable)
  • Following table contains details of memory usage, IEP usage and interrupt controller usage:
Attention
In addition to the following resources used by PRU firmware, SDK examples also configure IEP0 CMP0 for IEP counter reset in periodic trigger CMP mode.
Configuration per slice PRU Core(s) Memory Usage IEP Usage Interrupt Controller (INTC) Usage Description
Single channel PRUx DMEM: 240 Bytes (0x00 to 0xEF)
IMEM: ~ 1.6 kB
CMP Mode: IEP0 CMPy for trigger (IEP0 and CMPy selected in SysConfig)
CAP Mode: IEP0 CAPy for trigger (IEP0 and CAPy selected in SysConfig)
INTC event/input number 18 or 21 (prx_pru_mst_intr[2/5]_intr_req) is used to trigger interrupt to Arm® Cortex®-R5F based on slice IEP, CMP/CAP events and INTC signal are used only in periodic trigger modes
Note
For pin usage, see Pin Multiplexing section.

Tamagawa Design

Tamagawa Protocol Design explains the design in detail.

Example

API

APIs for Tamagawa Encoder

Note
Arm is a registered trademark of Arm Limited (or its subsidiaries or affiliates) in the US and/or elsewhere.