| Feature | Module |
| EnDat3 protocol support with 12.5 Mbps data rate, Manchester encoding, frame-based communication (HPF/LPH/LPF), foreground and background communication channels, host trigger and periodic trigger modes | Position Sense EnDat3 |
| Multi-channel with load share mode, handle-based API architecture, Periodic trigger modes (CMP and CAP), SysConfig-based initialization | Position Sense Tamagawa |
| Handle-based API architecture, periodic trigger modes (CMP and CAP), SysConfig-based initialization | Position Sense EnDat |
| Handle-based API architecture, periodic trigger modes (CMP and CAP), SysConfig-based initialization, per-channel encoder timeout configuration | Position Sense BiSS-C |
| Improved sampling for RX data, Handle-based API architecture, different IEP CAP signal per slice, SysConfig-based initialization | Position Sense HDSL |
| Handle-based API architecture, periodic trigger modes (CMP and CAP), SysConfig-based initialization | Position Sense Nikon A-format |
| Handle-based API architecture, SysConfig-based initialization, improved error handling with return codes, support for 9 channels on a single PRU core | Current Sense SDFM |
| Module | Supported CPUs | SysConfig Support | OS Support | Key features tested | Key features not tested |
| BiSS-C | R5F | YES | FreeRTOS, NORTOS | Single channel, Multi channel using single PRU core and three PRU cores (load share mode), point-to-point connection, single byte register communication using control communication, automatic processing delay detection and compensation, interface speed of 1, 2, 5, 8, and 10 MHz, long cable (upto 100 meters), host trigger mode, periodic trigger modes (CMP and CAP), daisy chaining, safety mode (safety CRC and sign-of-life counter), BP-AM2BLDCSERVO Boosterpack with LP-AM243 | Control communication: BiSS-C Commands (Control Select bit (CTS) = 0), start bit delay and sequential multi-byte access with Register Communication (Control Select bit (CTS) = 1) |
| EnDat | R5F | YES | FreeRTOS, NORTOS | Single channel, Multi channel using single PRU core and three PRU cores (load share mode), recovery time for 2.2 command set, interface speed of 4, 8 and 16 MHz, long cable (upto 100 meters), periodic trigger modes (CMP and CAP), continuous mode, BP-AM2BLDCSERVO Boosterpack with LP-AM243 | Encoder receive communication command |
| EnDat3 | R5F | YES | FreeRTOS, NORTOS | Single channel, Manchester encoding, data transfer rate of 12.5 Mbps, frame-based protocol (HPF/LPH/LPF), foreground communication commands (DATA0-DATA7, DATA, DATANOP, RESET, CLEAR, ECHO, RATE, HELLO), background communication commands (NOP, READ, WRITE, RECONFIGURE, AUTH, PROTECT, SETPASS, LOCATE), host trigger mode, periodic trigger modes (CMP and CAP), automatic CRC verification, BP-AM2BLDCSERVO Boosterpack with LP-AM243 | 25 Mbps data rate, Multi-channel concurrent operation, Daisy chain topology, Long cable (upto 100 meters) |
| HDSL | R5F | YES | FreeRTOS, NORTOS | Single channel, Multi channel using three PRU cores (load share mode), Free Run mode, Sync mode, Short Message Read and Write, Long Message Read and Write, Pipeline Channel Data, Cable length upto 10 meters, Long cable upto 100 meters with single channel Free Run mode and PRU core running at 300 MHz, BP-AM2BLDCSERVO Boosterpack with LP-AM243 | Long cable upto 100 meters (except single channel Free Run mode and PRU core running at 300 MHz) |
| Nikon A-format | R5F | YES | FreeRTOS, NORTOS | Nikon A-format version 2.1 and version 3.0, Single channel, Multi channel using single PRU core and three PRU cores (load share mode), point-to-point connection, bus connection up to 7 encoders, individual and multiple transmission mode with encoder addresses ranging between ENC1-ENC8, baud rates from 2.5 MHz, 4 MHz, 6.67 MHz, 8 MHz, and 16 MHz, up to 40-bit absolute position (single turn + multi turn) data with additional information, long cable (upto 100 meters), host trigger mode, periodic trigger modes (CMP and CAP), BP-AM2BLDCSERVO Boosterpack with LP-AM243 | Bus connection with 8 encoders |
| Tamagawa | R5F | YES | FreeRTOS, NORTOS | Single channel, Multi channel using single PRU core, Multi channel using three PRU cores (load share mode), absolute position, encoder ID, reset, EEPROM read, EEPROM write, 2.5 Mbps Encoder, periodic trigger modes (CMP and CAP), BP-AM2BLDCSERVO Boosterpack with LP-AM243 | 5 Mbps encoder |
| Module | Supported CPUs | SysConfig Support | OS Support | Key features tested | Key features not tested |
| Control | R5F | YES | FreeRTOS, NORTOS | Field Weakening Control, Maximum Torque Per Ampere, Strator voltage frequency generator support | - |
| Digital Control Library (DCL) | R5F | YES | FreeRTOS, NORTOS | Linear PI, Linear PID, Linear PI with double integrator (PI2), Direct Form 1 (first order), Direct Form 1 (second order), Direct Form 1 (third order), Direct Form 2 (second order), Direct Form 2 (third order), Non-linear PID controller | - |
| Observer | R5F | YES | FreeRTOS, NORTOS | Sensored eQEP-based encoder, Hall sensor, Sensorless Enhanced Sliding Mode Observer, both speed measurement for sensored (speedcalc) and sensorless (speedfr) | - |
| SFRA | R5F | YES | FreeRTOS, NORTOS | Software Frequency Response Analyzer support | - |
| Transforms | R5F | YES | FreeRTOS, NORTOS | Clarke transformation, Park transformation, Inverse Park transformation, Space Vector Generation (SVGEN), Common-mode subtraction approach, DPWM Generation (Part of SVGEN), Maximum Modulation, Minimum Modulation, SVGEN current reconstruction for single-shunt (SVGENCURRENT), Phase voltage reconstruction in overmodulation (VOLTS_RECON) | - |
| Utilities | R5F | YES | FreeRTOS, NORTOS | Angle Compensation Generator, Step Response, Datalog, Trapezoid generator | - |
| ID | Head Line | Module | Applicable Releases | Resolution/Comments |
| PINDSW-5690 | HDSL: EDGE register is not updated | Position Sense HDSL | 9.0 onwards | NOTE: This register is not implemented in TI HDSL solution. It is documented as a known difference in TI HDSL Exceptions List. |
| PINDSW-9605 | Unable to open example.syscfg directly from SysConfig tool | All examples | 9.0 onwards | - |
| EXT_EP-13296, PINDSW-9707 | SDFM: Changing OSR values at runtime does not have any effect on sample output | Current Sense SDFM | 9.0 onwards | - |
| EXT_EP-13297, PINDSW-10139 | EnDat: Supplement 2_2 commands do not work with periodic mode when channels 0 and 1 both are enabled | Position Sense EnDat | 9.0 onwards | - |
| EXT_EP-13298, PINDSW-10244 | EnDat: Variations seen in propagation delay measurement with different PRU Clock frequencies | Position Sense EnDat | 9.0 onwards | - |
| EXT_EP-13299, PINDSW-10284 | SDFM: Trigger mode requires channel 2 to be connected for icss_sdfm_three_channel_single_pru_mode example | Current Sense SDFM | 11.0 | - |
| PINDSW-10322 | TIDEP-01032: USER_M1_IS_OFFSET_CMPSS macro type mismatch causes data abort at -O1 optimization | TIDEP-01032 Reference Design | 9.1 onwards | The USER_M1_IS_OFFSET_CMPSS macro for the BP_AM2BLDCSERVO board was casting SDFM_HALF_SCALE (131072.0f) to uint16_t, which exceeds the uint16_t range (max 65535). This float-to-integer undefined behavior caused the compiler to eliminate the calcMotorOverCurrentThreshold function body at -O1 optimization. Fixed by setting the macro to 0 for SDFM-based boards where ADC CMPSS is not applicable. |
| PINDSW-10364 | TIDEP-01032: Incorrect constant table configuration for PRU-ICSSG1 | TIDEP-01032 Reference Design | 11.0 | - |
| EXT_EP-13300, PINDSW-10365 | Shared memory region located in TCM marked as Cached in SDK examples | TIDEP-01032 Reference Design, Position Sense EnDat, Current Sense SDFM | 9.0 onwards | In SDK examples, PRU firmwares for SDFM and EnDat store the data into R5F TCM memory. |
| EXT_EP-13301, PINDSW-10389 | Tamagawa: Periodic command does not work with a lower cycle period | Position Sense Tamagawa | 9.0 onwards | Due to maximum value of RX frame size being configured always for all commands, the periodic mode does not work for lower periods for certain commands. |
| PINDSW-10435 | PRUICSS PWM: PRUICSS_PWM_enableIEP1Slave always uses 1 instead of using enable parameter | PRUICSS PWM | 9.1 onwards | - |
| PINDSW-10647 | PRUICSS PWM: PRUICSS_PWM_iepConfig uses incorrect variable for IEP shadow mode check | PRUICSS PWM | 9.1 onwards | - |
| EXT_EP-13294, PINDSW-10670 | HDSL: Communication drops seen in SYNC mode | Position Sense HDSL | 9.0 onwards | - |
This section lists changes which could affect user applications developed using older SDK versions. Read this carefully to see if you need to do any changes in your existing application when migrating to this SDK version relative to previous SDK version. Also refer to older SDK version release notes to see changes in earlier SDKs.
SDK drivers for following modules underwent significant architectural changes including a move to handle-based APIs, enhanced periodic trigger modes, improved SysConfig integration, etc. For module specific migration details, refer to links from Migration Details for Motor Control SDK 11.00.00 to Motor Control SDK 2025.00.00.
| Module | Affected API | Change | Additional Remarks |
| PRUICSS PWM | App_epwmSync0Irq | Remove calling PRUICSS_PWM_changePwmSetToIntialState API call | PWM is not changed to init state when it is being generated |
| TIDEP-01032 Reference Design | HAL_setupSDFM, HAL_readMtrSdfmData, HAL_setupEncoder, HAL_getMtrEncoderPosition in hal.c | The SDFM and EnDat driver code in hal.c has been updated to use the new handle-based API architecture. The SDFM initialization now uses SDFM_init with params-based configuration, and data reads use SDFM_getFilterData with handle. The EnDat initialization now uses endat_init with params-based configuration, and position reads use endat_command_build/endat_command_process with handle. These changes are required due to SDK driver migration to handle-based APIs. | For more information on SDFM and EnDat driver migration, refer the migration guide of EnDat and SDFM. |
| TIDEP-01032 Reference Design | PRUICSS INTC mapping in SysCfg, MOTOR1_PRU_TRIGGER_HOST_SDFM_EVT_NUMBER and MOTOR2_PRU_TRIGGER_HOST_SDFM_EVT_NUMBER in hal.h | The PRU INTC event-to-channel mapping for SDFM interrupts has been updated. MOTOR1 now uses PRU event 21 (channel 5) and MOTOR2 uses PRU event 24 (channel 6). The SysCfg INTC mapping configuration has been updated accordingly. Additionally, SDFM_selectIepCmpEvent() API call has been added to configure the IEP compare event for SDFM sampling trigger. | Update the SysCfg INTC mapping and hal.h PRU event number defines to match the new assignment. |
1.8.20