This example measures phase compensation for SDFM channel 0 in PRU GPIO mode during initialization. Normal current Over-sampling Ratio (OSR), Over current OSR and Normal current trigger time can be configured by the user
Only one core - PRU is used for this example.
The example does the below:
Folder/Files | Description |
---|---|
${SDK_INSTALL_PATH}/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation | Application specific sources for ICSS SDFM with phase compensation |
${SDK_INSTALL_PATH}/examples/current_sense | Common source for ICSS SDFM applications |
${SDK_INSTALL_PATH}/source/current_sense/sdfm | |
firmware/ | Folder containing ICSS SDFM firmware sources |
driver/ | ICSS SDFM driver source |
include/ | Folder containing ICSS SDFM structures and APIs declarations |
Parameter | Value |
---|---|
CPU + OS | r5fss0-0 freertos |
ICSSG | ICSSG0 |
PRU | PRU0 |
Toolchain | ti-arm-clang |
Board | am243x-evm, am243x-lp |
Examples folder | examples/current_sense |
Other than the basic EVM setup mentioned in EVM Setup , below additional hardware is required to run this demo
Test Details | Steps | Pass/Fail Criteria |
---|---|---|
1. To check Phase Compensation | 1. Run the example on supported board | |
2. probe ch0 SD0_D pin and SD8_CLK pin | ||
3. Build and run example | ||
4. Take time stamp of any rising edge of SD0_D pin and upcoming active SD8_CLK edge | ||
5. Compare this time with measured delay(stored in DMEM at offset 0x18) | Both value should be same or have a maximum variation of 1 PRU cycle |