AM243x Motor Control SDK  09.00.00
HDSL Diagnostic


The HDSL diagnostic application described here interacts with the firmware interface.

HDSL diagnostic application does below,

  • Configures pinmux, GPIO, ICSS clock to 300MHz,
  • Initializes ICSS0-PRU1, ICSS0-IEP0 and IEP1(for SYNC mode support.Timesync router is used to latch the loopback.),
  • Loads lookup table for encoding/decoding of Hiperface data
  • Loads the initialization section of PRU firmware & executes it.

Firmware is split to three sections, initialization, datalink and transport. At startup, the application displays details about encoder and status. It then presents the user with menu options, based on the option selected, application communicates with HDSL interface and the result is presented to the user.

This example also allows the capability to save the HDSL register data into memory for the defined duration.

  • For am243x-evm example, the data is stored in DDR.
  • For am243x-lp example, the data is stored in MSRAM.
The HDSL register trace option is only available with debug mode builds for single channel examples.

Important files and directory structure

Folder/Files Description
hdsl_diagnostic.c hdsl_diagnostic.h Source and Header files
driver/ Folder containing HDSL PRU driver sources.
include/ Folder containing HDSL PRU header sources.

Folder containing HDSL PRU firmware sources.

Parameter Value
CPU + OS r5fss0-0 freertos
Toolchain ti-arm-clang
Board am243x-evm (2 channel and 1 channel examples), am243x-lp (1 channel example)
Example folder examples/position_sense/hdsl_diagnostic

Steps to Run the Example

Hardware Prerequisites

Other than the basic EVM setup mentioned in EVM Setup , below additional HW is required to run this demo

  • HDSL encoder
  • Below are two options to connect encoder to AM64x/AM243x EVM.
    • Option 1
      • TIDA-00179 Universal Digital Interface to Absolute Position Encoders
      • TIDEP-01015 3 Axis board
      • Interface card connecting EVM and TIDEP-01015 3 Axis board
      • Connect the Hiperface DSL encoder to HDSL+/-(Pin number 6 and 7) signals available on header J7 or Sub-D15 connector of the "Universal Digital Interface to Absolute Position Encoders" board.
    • Option 2
      • HDSL AM64xE1 Transceiver. If application is using this card, define the macro HDSL_AM64xE1_TRANSCEIVER in the CCS project/make file.
      • Connect the Hiperface DSL encoder to J10.
      • HDSL AM64xE1 Transceiver supports two channels that can be used to support HDSL safety, multi axis servo drives.
      • Schematics are shared in the MCU+SDK package. For more design details of the transceiver card, please contact TI via E2E/FAE.
      • HDSL Transceiver Card Schematics document.

Hardware Prerequisities for Booster Pack

Hardware Setup(Using TIDA-00179, TIDEP-01015 and Interface board)

Hardware Setup

Hardware Setup(Using HDSL AM64xE1 Transceiver)

Hardware Setup

Hardware Setup(Using Booster Pack & AM243x-LP)

Hardware Setup of Booster Pack + LP for HDSL

Booster Pack Jumper Configuration

Designator ON/OFF Description
J17 Pin 1-2 Connected SDFM Clock Feedback Select
J18/J19 J18 OFF & J19 ON Axis 1: Encoder/Resolver Voltage Select
J20/J21 J20 ON & J21 OFF Axis 2: Encoder/Resolver Voltage Select
J22 OFF Axis 1: Manchester Encoding Select
J23 OFF Axis 2: Manchester Encoding Select
J24 ON Axis 1: RS485/DSL MUX
J25 OFF Axis 2: RS485/DSL MUX

Build, load and run

  • When using CCS projects to build, import the CCS project and build it using the CCS project menu (see Using SDK with CCS Projects ).
  • When using makefiles to build, note the required combination and build using make command (see Using SDK with Makefiles )
  • Launch a CCS debug session and run the executable, see CCS Launch, Load and Run
  • Refer to UART terminal for user interface menu options.

Mode, Channel(s) and Board Selection from sysconfig:

  • Select Mode from sysconfig menu (Freerun/sync mode).
  • Select Channel 0/channel 1 from sysconfig menu for channel selection.
  • Select Boosterpack option from sysconfig for running application on AM243x-LP.

Sample Output

Shown below is a sample output when the application is run

  • Freerun mode
    HDSL Freerun mode Menu
    HDSL Freerun mode Menu
  • Sync Mode This is a test feature. In real application, PWM syncout will be connected to Latch input instead of IEP1 sync. Enter 6000 as period in UART menu after loading application. Refer Synchronization with External Pulse for more details about sync mode.
HDSL Sync mode Menu
HDSL Sync mode Menu
HDSL Sync mode Menu