AM64x INDUSTRIAL COMMUNICATIONS SDK  2026.00.00
Release Notes 2026.00.00

Table of Contents

Attention
Also refer to individual module pages for more details on each feature, unsupported features, important usage guidelines.
For release notes of MCU+ SDK, please refer to AM64X MCU+ SDK Release Notes 12.00.00.
Note
The examples will show usage of SW modules and APIs on a specific CPU instance and OS combination.
Unless noted otherwise, the SW modules would work on all supported EVMs

New in this Release

Feature
PROFIdrive Example (premium only)
EtherCAT Tunneling example (premium only)
IO-Link FWHAL
HSR Layer 2 1G Example
HSR 1G: PTP over HSR support (Only PRU firmware support)
PRP 1G: PTP over PRP support (Only PRU firmware support)
PROFINET VLAN Filtering Support
PROFINET RGMII Support

Device and Validation Information

SOC Supported CPUs Boards Host PC
AM64x R5F AM64x PG2 EVM (referred to as am64x-evm in code) Windows 11 64b or Ubuntu 22.04 64b or MacOS

Tools, Compiler and Other Open Source SW Module Information

Tools / SW module Supported CPUs Version
Code Composer Studio R5F, M4F, A53 20.4.0
SysConfig R5F, M4F, A53 1.26.0, build 4407
TI ARM CLANG R5F, M4F 4.0.4.LTS
MCU-PLUS-SDK-AM64X R5F, M4F, A53 12.00.00.27
GCC AARCH64 A53 9.2-2019.12
GCC ARM R5F 7-2017-q4-major (AM64x only)
FreeRTOS Kernel R5F, M4F, A53 11.1.0
FreeRTOS SMP Kernel A53 202110.00-SMP
Tiny USB R5F 0.14.0
LwIP R5F STABLE-2_2_1_RELEASE
Mbed-TLS R5F mbedtls-2.13.1

Fixed Issues

ID Head Line Module Applicable Releases Resolution/Comments
ICSTACK-633 Performance issue on TCP throughput from Network to A53 via Tunnel PROFINET Tunneling 2025.00.00 Performance improvement from 26Mbps to 72 Mbps for TCP communication over ICVE, achieved by adjusting profinet RX task priority
PINDSW-8517 SYNC1 Generated 1 cycle after first SYNC0 pulse when SYNC1 shift is configured from MainDevice EtherCAT SubDevice 09.02.00 More details in EtherCAT SubDevice Errata
PINDSW-9560 TX_START_DELAY reset to default value when link broken and re-connected to the network during OP EtherCAT SubDevice 2025.00.00 More details in EtherCAT SubDevice Errata
PINDSW-9756 CRC/Alignment Error observed when one SubDevice set to INIT after link re-connection EtherCAT SubDevice 2025.00.00 More details in EtherCAT SubDevice Errata
PINDSW-9787 CRC Error for 8SM application individual SubDevice state transition to INIT EtherCAT SubDevice 2025.00.00 More details in EtherCAT SubDevice Errata
PINDSW-9821 Malformed packet formation for 1 byte mailbox data communication due to cycle budget EtherCAT SubDevice 2025.00.00 More details in EtherCAT SubDevice Errata
PINDSW-9883 PDO misalignment due to start offset in FMMU merge logic for LRD/LWR EtherCAT SubDevice 2025.00.00 More details in EtherCAT SubDevice Errata
PINDSW-9909 Add support for ESI EEPROM over SPI Flash EtherCAT SubDevice 2025.00.00 Refer to ESI EEPROM over SPI Flash
PINDSW-10013 Use bsp_global_mutex_lock_save and bsp_global_mutex_restore in place of HwiP_disable and HwiP_restore EtherCAT SubDevice 2025.00.00
PINDSW-10185 Fix build errors due to Beckhoff stack source patch script error EtherCAT SubDevice 2025.00.00
PINDSW-10390 Add support for configuring TX_CLK_DELAY in the forward path EtherCAT SubDevice 2025.00.00 Refer to TIESC_PROCESS_PATH_TX_CLK_DELAY in tiescbsp.h
PINDSW-8498 PPM frames transmit with incorrect cycle counter PROFINET Device 11.00.00
PINDSW-9608 HSR 1G: Host receives duplicate PTP frames due to duplicate discard check HSR 2025.00.00 RX L2 filter used to classify incoming PTP frames; duplicate discard check is skipped for PTP packets
PINDSW-10236 PRP 1G: PTP packets incorrectly subject to duplicate discard and TX duplication PRP 2025.00.00 Duplicate discard and TX duplicate logic skipped for PTP packets over PRP
PINDSW-10261 PRP 1G: Host receives duplicate PTP frames due to duplicate discard check PRP 2025.00.00 RX L2 filter used to classify incoming PTP frames; duplicate discard check is skipped for PTP packets
PINDSW-10285 HSR sequence counter not SYNC between RTU HSR 2025.00.00 HSR sequence counter synchronized between RTUs to prevent out-of-sequence packets
PINDSW-10289 ICSSG: AM64x: transmit queue timed out when 10M link is unplugged repeatedly HSR 2025.00.00
PINDSW-10291 PRP sequence counter not SYNC between RTU PRP 2025.00.00 PRP sequence counter synchronized between RTUs to prevent out-of-sequence packets

Known Issues

ID Head Line Module Applicable Releases Workaround
PINDSW-5666 EtherNet/IP : PTP Device is unable to keep offset under 1000 ns EtherNet/IP Adapter 08.04.00 Value of OFFSET_THRESHOLD_FOR_RESET is set to 10000 ns by default in SDK
PINDSW-9151 EtherNet/IP Tunneling : R5 Application prints are not observed in the UART Terminal EtherNet/IP Tunneling 11.00.00
PINDSW-8333 Provide option for setting Sync ISR (FIQ) flag to reduce latency on SYNC0 interrupt EtherCAT SubDevice 10.02.00 Modify PRUICSS_registerIrqHandler in mcu_plus_sdk\source\drivers\pruicss\g_v0\pruicss_g_v0.c with an additional argument for setting/unsetting FIQ:
--- a/source/drivers/pruicss/g_v0/pruicss.h
+++ b/source/drivers/pruicss/g_v0/pruicss.h
@@ -451,6 +451,7 @@ int32_t PRUICSS_registerIrqHandler(PRUICSS_Handle handle,
int32_t intrNum,
int32_t eventNum,
uint8_t waitEnable,
+ uint8_t isFIQFlagSet,
PRUICSS_IrqHandler irqHandler);
/**
diff --git a/source/drivers/pruicss/g_v0/pruicss_g_v0.c b/source/drivers/pruicss/g_v0/pruicss_g_v0.c
index 2531e915..e37bf610 100644
--- a/source/drivers/pruicss/g_v0/pruicss_g_v0.c
+++ b/source/drivers/pruicss/g_v0/pruicss_g_v0.c
@@ -279,6 +279,7 @@ int32_t PRUICSS_registerIrqHandler(PRUICSS_Handle handle,
int32_t intrNum,
int32_t eventNum,
uint8_t waitEnable,
+ uint8_t isFIQFlagSet,
PRUICSS_IrqHandler irqHandler)
{
PRUICSS_Object *object;
@@ -311,6 +312,7 @@ int32_t PRUICSS_registerIrqHandler(PRUICSS_Handle handle,
/*TODO: Take priority as an argument to this function*/
hwiParams.priority = 0x1;
hwiParams.intNum = intrNum;
+ hwiParams.isFIQ = isFIQFlagSet;
hwiParams.callback = (HwiP_FxnCallback)PRUICSS_hwiIntHandler;
retVal = HwiP_construct(&(object->pruEvntOutFnMapArray[pruEvtoutNum].hwiObj), &hwiParams);
Recompile the driver from the MCU+ SDK Root folder with the following commands:
gmake -s -f makefile.am64x drivers_r5f.ti-arm-clang.freertos PROFILE=debug
gmake -s -f makefile.am64x drivers_r5f.ti-arm-clang.freertos PROFILE=release
Make sure PRUICSS_registerIrqHandler call within source\industrial_comms\ethercat_subdevice\icss_fwhal\tiescbsp.c takes care for the additional argument and isFIQFlagSet is set to 1 for SYNC0_EVENT.
PINDSW-10802 PROFINET: Startup issues with RGMII application in ART regression PROFINET Device 2026.00.00 Re-run specific test case
PINDSW-10803 PROFINET: Sporadic SPIRTA failures observed in RGMII application PROFINET Device 2026.00.00 Re-run specific test case.

Upgrade and Compatibility Information

This section lists changes which could affect user applications developed using older SDK versions. Read this carefully to see if you need to do any changes in your existing application when migrating to this SDK version relative to previous SDK version. Also refer to older SDK version release notes to see changes in earlier SDKs.

Examples

Module Affected API Change Additional Remarks
EtherNet/IP Adapter Demo N/A Refactor folder structures and naming convention for the Examples. Refer to Overview of EtherNet/IP Adapter Demo

Drivers

Module Affected API Change Additional Remarks