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AM64x MCU+ SDK
09.02.00
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Go to the documentation of this file.
65 #include <drivers/hw_include/csl_types.h>
66 #include <drivers/hw_include/cslr_gpmc.h>
83 #define GPMC_CHIP_SELECT_CS0 (0U)
84 #define GPMC_CHIP_SELECT_CS1 (1U)
85 #define GPMC_CHIP_SELECT_CS2 (2U)
86 #define GPMC_CHIP_SELECT_CS3 (3U)
97 #define GPMC_FIFOEVENT_STATUS (0U)
98 #define GPMC_TERMINALCOUNT_STATUS (1U)
99 #define GPMC_WAIT0EDGEDETECTION_STATUS (2U)
100 #define GPMC_WAIT1EDGEDETECTION_STATUS (3U)
111 #define GPMC_FIFOEVENT_INT (0U)
112 #define GPMC_TERMINALCOUNT_INT (1U)
113 #define GPMC_WAIT0EDGEDETECTION_INT (2U)
114 #define GPMC_WAIT1EDGEDETECTION_INT (3U)
125 #define GPMC_PREFETCH_ACCESSMODE_READ (0U)
126 #define GPMC_PREFETCH_ACCESSMODE_WRITE (1U)
137 #define GPMC_ECC_ALGORITHM_HAMMINGCODE (0U)
138 #define GPMC_ECC_ALGORITHM_BCH (1U)
148 #define GPMC_ECC_BCH_ERRCORRCAP_UPTO_4BITS (0U)
149 #define GPMC_ECC_BCH_ERRCORRCAP_UPTO_8BITS (1U)
150 #define GPMC_ECC_BCH_ERRCORRCAP_UPTO_16BITS (2U)
161 #define GPMC_ECCPOINTER_RESULT_1 (1U)
162 #define GPMC_ECCPOINTER_RESULT_2 (2U)
163 #define GPMC_ECCPOINTER_RESULT_3 (3U)
164 #define GPMC_ECCPOINTER_RESULT_4 (4U)
165 #define GPMC_ECCPOINTER_RESULT_5 (5U)
166 #define GPMC_ECCPOINTER_RESULT_6 (6U)
167 #define GPMC_ECCPOINTER_RESULT_7 (7U)
168 #define GPMC_ECCPOINTER_RESULT_8 (8U)
169 #define GPMC_ECCPOINTER_RESULT_9 (9U)
178 #define GPMC_ECC_SIZE_0 (0U)
179 #define GPMC_ECC_SIZE_1 (1U)
188 #define GPMC_ECC_RESULT_1 (1U)
189 #define GPMC_ECC_RESULT_2 (2U)
190 #define GPMC_ECC_RESULT_3 (3U)
191 #define GPMC_ECC_RESULT_4 (4U)
192 #define GPMC_ECC_RESULT_5 (5U)
193 #define GPMC_ECC_RESULT_6 (6U)
194 #define GPMC_ECC_RESULT_7 (7U)
195 #define GPMC_ECC_RESULT_8 (8U)
196 #define GPMC_ECC_RESULT_9 (9U)
205 #define GPMC_BCH_RESULT0 (0U)
206 #define GPMC_BCH_RESULT1 (1U)
207 #define GPMC_BCH_RESULT2 (2U)
208 #define GPMC_BCH_RESULT3 (3U)
209 #define GPMC_BCH_RESULT4 (4U)
210 #define GPMC_BCH_RESULT5 (5U)
211 #define GPMC_BCH_RESULT6 (6U)
220 #define GPMC_CS_MASK_ADDR_SIZE_256MB (0x00U)
221 #define GPMC_CS_MASK_ADDR_SIZE_128MB (0x08U)
222 #define GPMC_CS_MASK_ADDR_SIZE_64MB (0x0cU)
223 #define GPMC_CS_MASK_ADDR_SIZE_32MB (0x0eU)
224 #define GPMC_CS_MASK_ADDR_SIZE_16MB (0x0fU)
250 #define GPMC_CS_TIMING_CONFIG(CSWrOffTime, CSRdOffTime, CSExtDelayFlag, \
252 ((uint32_t) (((CSWrOffTime) << CSL_GPMC_CONFIG2_CSWROFFTIME_SHIFT) \
253 & CSL_GPMC_CONFIG2_CSWROFFTIME_MASK) | \
254 (((CSRdOffTime) << CSL_GPMC_CONFIG2_CSRDOFFTIME_SHIFT) \
255 & CSL_GPMC_CONFIG2_CSRDOFFTIME_MASK) | \
256 (((CSExtDelayFlag) << CSL_GPMC_CONFIG2_CSEXTRADELAY_SHIFT) \
257 & CSL_GPMC_CONFIG2_CSEXTRADELAY_MASK) | \
258 (((CSOnTime) << CSL_GPMC_CONFIG2_CSONTIME_SHIFT) \
259 & CSL_GPMC_CONFIG2_CSONTIME_MASK))
297 #define GPMC_ADV_TIMING_CONFIG(ADVAADMuxWrOffTime, ADVAADMuxRdOffTime, \
298 ADVWrOffTime, ADVRdOffTime, ADVExtDelayFlag, \
301 ((uint32_t) (((ADVAADMuxWrOffTime) << \
302 CSL_GPMC_CONFIG3_ADVAADMUXWROFFTIME_SHIFT) & \
303 CSL_GPMC_CONFIG3_ADVAADMUXWROFFTIME_MASK) | \
304 (((ADVAADMuxRdOffTime) << CSL_GPMC_CONFIG3_ADVAADMUXRDOFFTIME_SHIFT) & \
305 CSL_GPMC_CONFIG3_ADVAADMUXRDOFFTIME_MASK) | \
306 (((ADVWrOffTime) << CSL_GPMC_CONFIG3_ADVWROFFTIME_SHIFT) & \
307 CSL_GPMC_CONFIG3_ADVWROFFTIME_MASK) | \
308 (((ADVRdOffTime) << CSL_GPMC_CONFIG3_ADVRDOFFTIME_SHIFT) & \
309 CSL_GPMC_CONFIG3_ADVRDOFFTIME_MASK) | \
310 (((ADVExtDelayFlag) << CSL_GPMC_CONFIG3_ADVEXTRADELAY_SHIFT) & \
311 CSL_GPMC_CONFIG3_ADVEXTRADELAY_MASK) | \
312 (((ADVAADMuxOnTime) << CSL_GPMC_CONFIG3_ADVAADMUXONTIME_SHIFT) & \
313 CSL_GPMC_CONFIG3_ADVAADMUXONTIME_MASK) | \
314 (((ADVOnTime) << CSL_GPMC_CONFIG3_ADVONTIME_SHIFT) & \
315 CSL_GPMC_CONFIG3_ADVONTIME_MASK))
361 #define GPMC_WE_OE_TIMING_CONFIG(WEOffTime, WEExtDelayFlag, WEOnTime, \
362 OEAADMuxOffTime, OEOffTime, OEExtDelayFlag, \
363 OEAADMuxOnTime, OEOnTime) \
364 ((uint32_t) (((WEOffTime) << \
365 CSL_GPMC_CONFIG4_WEOFFTIME_SHIFT) & \
366 CSL_GPMC_CONFIG4_WEOFFTIME_MASK) | \
367 (((WEExtDelayFlag) << \
368 CSL_GPMC_CONFIG4_WEEXTRADELAY_SHIFT) & CSL_GPMC_CONFIG4_WEEXTRADELAY_MASK) | \
370 CSL_GPMC_CONFIG4_WEONTIME_SHIFT) & CSL_GPMC_CONFIG4_WEONTIME_MASK) | \
371 (((OEAADMuxOffTime) << \
372 CSL_GPMC_CONFIG4_OEAADMUXOFFTIME_SHIFT) & \
373 CSL_GPMC_CONFIG4_OEAADMUXOFFTIME_MASK) | \
375 CSL_GPMC_CONFIG4_OEOFFTIME_SHIFT) & CSL_GPMC_CONFIG4_OEOFFTIME_MASK) | \
376 (((OEExtDelayFlag) << \
377 CSL_GPMC_CONFIG4_OEEXTRADELAY_SHIFT) & CSL_GPMC_CONFIG4_OEEXTRADELAY_MASK) | \
378 (((OEAADMuxOnTime) << \
379 CSL_GPMC_CONFIG4_OEAADMUXONTIME_SHIFT) & \
380 CSL_GPMC_CONFIG4_OEAADMUXONTIME_MASK) | \
382 CSL_GPMC_CONFIG4_OEONTIME_SHIFT) & CSL_GPMC_CONFIG4_OEONTIME_MASK))
402 #define GPMC_RDACCESS_CYCLETIME_TIMING_CONFIG(rdCycleTime, wrCycleTime, \
404 pageBurstAccessTime) \
405 ((uint32_t) (((rdCycleTime) << \
406 CSL_GPMC_CONFIG5_RDCYCLETIME_SHIFT) & \
407 CSL_GPMC_CONFIG5_RDCYCLETIME_MASK) | \
409 CSL_GPMC_CONFIG5_WRCYCLETIME_SHIFT) & CSL_GPMC_CONFIG5_WRCYCLETIME_MASK) | \
410 (((rdAccessTime) << \
411 CSL_GPMC_CONFIG5_RDACCESSTIME_SHIFT) & CSL_GPMC_CONFIG5_RDACCESSTIME_MASK) | \
412 (((pageBurstAccessTime) << \
413 CSL_GPMC_CONFIG5_PAGEBURSTACCESSTIME_SHIFT) & \
414 CSL_GPMC_CONFIG5_PAGEBURSTACCESSTIME_MASK))
447 #define GPMC_CYCLE2CYCLE_BUSTURNAROUND_TIMING_CONFIG(cycle2CycleDelay, \
448 cycle2CycleDelaySameCSCfg, \
449 cycle2CycleDelayDiffCSCfg, \
451 ((uint32_t) (((cycle2CycleDelay) << \
452 CSL_GPMC_CONFIG6_CYCLE2CYCLEDELAY_SHIFT) & \
453 CSL_GPMC_CONFIG6_CYCLE2CYCLEDELAY_MASK) | \
454 (((cycle2CycleDelaySameCSCfg) << \
455 CSL_GPMC_CONFIG6_CYCLE2CYCLESAMECSEN_SHIFT) & \
456 CSL_GPMC_CONFIG6_CYCLE2CYCLESAMECSEN_MASK) | \
457 (((cycle2CycleDelayDiffCSCfg) << \
458 CSL_GPMC_CONFIG6_CYCLE2CYCLEDIFFCSEN_SHIFT) & \
459 CSL_GPMC_CONFIG6_CYCLE2CYCLEDIFFCSEN_MASK) | \
461 CSL_GPMC_CONFIG6_BUSTURNAROUND_SHIFT) & CSL_GPMC_CONFIG6_BUSTURNAROUND_MASK))
474 #define GPMC_NAND_CS_ON_TIME 0U
476 #define GPMC_NAND_WE_ON_TIME 0U
478 #define GPMC_NAND_ADV_ON_TIME 0U
480 #define GPMC_NAND_CS_WR_OFF_TIME 6U
482 #define GPMC_NAND_WR_CYCLE_TIME 6U
484 #define GPMC_NAND_ADV_WR_OFF_TIME 4U
486 #define GPMC_NAND_CS_RD_OFF_TIME 6U
488 #define GPMC_NAND_RD_CYCLE_TIME 6U
490 #define GPMC_NAND_ADV_AADMUX_ON_TIME 0U
492 #define GPMC_NAND_ADV_AADMUX_RD_OFF_TIME 0U
494 #define GPMC_NAND_ADV_AADMUX_WR_OFF_TIME 0U
496 #define GPMC_NAND_PAGEBURST_ACCESS_TIME 0U
498 #define GPMC_NAND_OE_ON_TIME 1U
500 #define GPMC_NAND_OE_OFF_TIME 4U
502 #define GPMC_NAND_OE_AADMUX_ON_TIME 0U
504 #define GPMC_NAND_OE_AADMUX_OFF_TIME 0U
506 #define GPMC_NAND_ADV_RD_OFF_TIME 4U
508 #define GPMC_NAND_WE_OFF_TIME 3U
510 #define GPMC_NAND_RD_ACCESS_TIME 4U
512 #define GPMC_NAND_C2C_DELAY 0U
514 #define GPMC_NAND_ADMUX_DATA_VALID 0U
516 #define GPMC_NAND_WR_ACCESS_TIME 6U
518 #define GPMC_NAND_BRST_TAROUND_TIME 0U
530 #define GPMC_PSRAM_CS_ON_TIME 3U
532 #define GPMC_PSRAM_WE_ON_TIME 10U
534 #define GPMC_PSRAM_ADV_ON_TIME 1U
536 #define GPMC_PSRAM_CS_WR_OFF_TIME 21U
538 #define GPMC_PSRAM_WR_CYCLE_TIME 23U
540 #define GPMC_PSRAM_ADV_WR_OFF_TIME 3U
542 #define GPMC_PSRAM_CS_RD_OFF_TIME 21U
544 #define GPMC_PSRAM_RD_CYCLE_TIME 23U
546 #define GPMC_PSRAM_ADV_AADMUX_ON_TIME 1U
548 #define GPMC_PSRAM_ADV_AADMUX_RD_OFF_TIME 2U
550 #define GPMC_PSRAM_ADV_AADMUX_WR_OFF_TIME 2U
552 #define GPMC_PSRAM_PAGEBURST_ACCESS_TIME 3U
554 #define GPMC_PSRAM_OE_ON_TIME 10U
556 #define GPMC_PSRAM_OE_OFF_TIME 1U
558 #define GPMC_PSRAM_OE_AADMUX_ON_TIME 1U
560 #define GPMC_PSRAM_OE_AADMUX_OFF_TIME 15U
562 #define GPMC_PSRAM_ADV_RD_OFF_TIME 3U
564 #define GPMC_PSRAM_WE_OFF_TIME 16U
566 #define GPMC_PSRAM_RD_ACCESS_TIME 16U
568 #define GPMC_PSRAM_C2C_DELAY 0U
570 #define GPMC_PSRAM_ADMUX_DATA_VALID 0U
572 #define GPMC_PSRAM_WR_ACCESS_TIME 8U
574 #define GPMC_PSRAM_BRST_TAROUND_TIME 1U
580 #define GPMC_DMA_COPY_LOWER_LIMIT (512U)
582 #define GPMC_CS_BASE_ADDR_SHIFT (24U)
584 #define GPMC_ECC_WRAP_MODE1 (1)
586 #define GPMC_CMD_INVALID (0xFFFFFFFFU)
588 #define GPMC_MEM_TYPE_NAND (0)
589 #define GPMC_MEM_TYPE_PSRAM (1)
602 typedef enum GPMC_v1_nandEccAlgo_s
617 typedef enum GPMC_OperatingMode_s {
633 typedef enum GPMC_TransferMode_s {
651 typedef enum GPMC_TransactionType_e {
666 typedef enum GPMC_TransactionStatus_s {
705 typedef struct GPMC_Transaction_s {
741 typedef struct GPMC_Params_s
787 typedef struct GPMC_Object_s {
817 typedef struct GPMC_timingParams_s
879 typedef struct GPMC_HwAttrs_s
931 typedef struct GPMC_Config_s {
1285 params->
devType = CSL_GPMC_CONFIG1_DEVICETYPE_NANDLIKE;
1286 params->
devType = CSL_GPMC_CONFIG1_DEVICESIZE_EIGHTBITS;
GPMC_CallbackFxn transferCallbackFxn
Definition: gpmc.h:791
GPMC driver object.
Definition: gpmc.h:787
int32_t GPMC_writeNandCommand(GPMC_Handle handle, GPMC_nandCmdParams *cmdParams)
Function to write NAND command parameters.
uint32_t waitPinPol
Definition: gpmc.h:906
int32_t GPMC_configureTimingParameters(GPMC_Handle handle)
Function to configure GPMC timing parameters.
uint32_t waitPinNum
Definition: gpmc.h:904
int32_t GPMC_eccBchConfigureElm(GPMC_Handle handle, uint8_t numSectors)
Function to configure ELM module for error correction.
int32_t GPMC_configurePrefetchPostWriteEngine(GPMC_Handle handle)
Function to configure GPMC PREFETCH read and POST write engine.
uint32_t cycleDelaySameChipSel
Definition: gpmc.h:863
@ GPMC_TRANSACTION_TYPE_WRITE_CMDREG
Definition: gpmc.h:658
uint32_t isOpen
Definition: gpmc.h:800
uint32_t intrPriority
Definition: gpmc.h:892
uint32_t dataBaseAddr
Definition: gpmc.h:884
@ GPMC_TRANSFER_CSN_DEASSERT
Definition: gpmc.h:671
GPMC_CallbackFxn transferCallBckFunc
Definition: gpmc.h:760
uint32_t writeType
Definition: gpmc.h:914
void GPMC_init(void)
This function initializes the GPMC module.
uint32_t csOnTime
Definition: gpmc.h:819
uint32_t intrNum
Definition: gpmc.h:890
uint32_t rdCycleTime
Definition: gpmc.h:855
@ GPMC_TRANSACTION_TYPE_READ_CMDREG
Definition: gpmc.h:656
uint32_t rdAccessTime
Definition: gpmc.h:851
void * GPMC_Handle
A handle that is returned from a GPMC_open() call.
Definition: gpmc.h:592
int32_t GPMC_nandWriteData(GPMC_Handle handle, GPMC_Transaction *trans)
Function to write data to NANDflash using CPU prefetch/post write engine.
int32_t GPMC_nandReadData(GPMC_Handle handle, GPMC_Transaction *trans)
Function to read data from NAND flash using DMA or CPU prefetch/post write engine.
uint16_t index
Definition: tisci_rm_proxy.h:3
uint32_t oeOffTime
Definition: gpmc.h:843
@ GPMC_TRANSFER_FAILED
Definition: gpmc.h:670
uint32_t busTurnAroundTime
Definition: gpmc.h:869
uint32_t advAadMuxOnTime
Definition: gpmc.h:831
GPMC Driver configuration structure.
Definition: gpmc.h:931
const GPMC_HwAttrs * attrs
Definition: gpmc.h:933
uint32_t gpmcBaseAddr
Definition: gpmc.h:882
GPMC_Object * object
Definition: gpmc.h:935
uint32_t regionSize
Definition: gpmc.h:778
uint32_t csExDelay
Definition: gpmc.h:916
GPMC_TransferMode transferMode
Definition: gpmc.h:758
Data structure to set transaction type parameters.
Definition: gpmc.h:705
void GPMC_transactionInit(GPMC_Transaction *trans)
Function to initialise GPMC_Transaction structure to default values.
GPMC instance attributes.
Definition: gpmc.h:880
uint32_t inputClkFreq
Definition: gpmc.h:888
void * Buf
Definition: gpmc.h:711
uint32_t cycle2CycleDelay
Definition: gpmc.h:861
int32_t GPMC_setDeviceType(GPMC_Handle handle)
Function to set device type (NANDLIKE OR NORLIKE) for GPMC instance connected to external device.
@ GPMC_NAND_ECC_ALGO_HAMMING_1BIT
Definition: gpmc.h:605
uint32_t transferTimeout
Definition: gpmc.h:715
int32_t GPMC_eccCalculateBchSyndromePolynomial(GPMC_Handle handle, uint8_t *pEccdata, uint32_t sector)
Function to compute BCH syndrome polynomial for NAND write operation.
uint32_t timeLatency
Definition: gpmc.h:898
void GPMC_eccResultRegisterClear(GPMC_Handle handle)
Function to clear GPMC ECC result register.
GPMC_OperatingMode
GPMC driver operating modes.
Definition: gpmc.h:617
@ GPMC_OPERATING_MODE_POLLING
Definition: gpmc.h:623
uint32_t chipSelAddrSize
Definition: gpmc.h:902
uint32_t devType
Definition: gpmc.h:748
GPMC_TransactionType transType
Definition: gpmc.h:707
int32_t GPMC_enableFlashWriteProtect(GPMC_Handle handle)
Function to disable WRITE protect line.
uint32_t numRowAddrCycles
Definition: gpmc.h:688
@ GPMC_NAND_ECC_ALGO_BCH_8BIT
Definition: gpmc.h:607
SemaphoreP_Object mutex
Definition: gpmc.h:804
uint32_t cmdCycle2
Definition: gpmc.h:684
@ GPMC_NAND_ECC_ALGO_BCH_16BIT
Definition: gpmc.h:608
uint32_t wrCycleTime
Definition: gpmc.h:857
@ GPMC_TRANSACTION_TYPE_READ
Definition: gpmc.h:652
HwiP_Object hwi
Definition: gpmc.h:802
@ GPMC_OPERATING_MODE_BLOCKING
Definition: gpmc.h:619
static void GPMC_Params_init(GPMC_Params *params)
Function to initialize the GPMC_Params struct to its defaults.
Definition: gpmc.h:1278
int32_t GPMC_setDeviceSize(GPMC_Handle handle)
Function to set device width for GPMC instance connected to external device.
uint32_t oeOnTime
Definition: gpmc.h:841
uint32_t oeAadMuxOffTime
Definition: gpmc.h:847
GPMC_TransferMode
GPMC data transfer modes.
Definition: gpmc.h:633
int32_t GPMC_eccGetBchSyndromePolynomial(GPMC_Handle handle, uint32_t sector, uint32_t *bchData)
Function to get BCH syndrome polynomial per sector NAND read operation.
void GPMC_close(GPMC_Handle handle)
Function to close a GPMC peripheral specified by the GPMC handle.
GPMC_timingParams timingParams
Definition: gpmc.h:908
uint32_t weOffTime
Definition: gpmc.h:839
uint32_t waitTimeout
Definition: gpmc.h:694
uint32_t intrEnable
Definition: gpmc.h:754
GPMC_Params params
Definition: gpmc.h:793
uint32_t advOnTime
Definition: gpmc.h:825
uint32_t colAddress
Definition: gpmc.h:690
uint32_t weOnTtime
Definition: gpmc.h:837
int32_t GPMC_disableFlashWriteProtect(GPMC_Handle handle)
Function to disable WRITE protect line.
@ GPMC_TRANSFER_MODE_BLOCKING
Definition: gpmc.h:635
@ GPMC_NAND_ECC_ALGO_BCH_4BIT
Definition: gpmc.h:606
GPMC_Handle GPMC_open(uint32_t index, const GPMC_Params *prms)
This function opens a given GPMC peripheral.
int32_t GPMC_eccValueSizeSet(GPMC_Handle handle, uint32_t eccSize, uint32_t eccSizeVal)
Function to set ECC used and unused bytes size in nibbles.
uint32_t oeAadMuxOnTime
Definition: gpmc.h:845
uint32_t elmBaseAddr
Definition: gpmc.h:886
@ GPMC_NAND_ECC_ALGO_NONE
Definition: gpmc.h:604
uint32_t csWrOffTime
Definition: gpmc.h:823
GPMC_nandEccAlgo eccAlgo
Definition: gpmc.h:910
uint32_t advAadMuxRdOffTime
Definition: gpmc.h:833
@ GPMC_TRANSFER_CANCELED
Definition: gpmc.h:669
uint32_t regionStartAddr
Definition: gpmc.h:776
uint32_t cycleDelayDiffChipSel
Definition: gpmc.h:866
uint32_t advWrOffTime
Definition: gpmc.h:829
GPMC timing parameters.
Definition: gpmc.h:818
@ GPMC_TRANSFER_TIMEOUT
Definition: gpmc.h:672
uint32_t numColAddrCycles
Definition: gpmc.h:692
@ GPMC_TRANSFER_STARTED
Definition: gpmc.h:668
SemaphoreP_Object transferComplete
Definition: gpmc.h:806
uint32_t gGpmcConfigNum
Externally defined driver configuration array size.
int32_t GPMC_eccBchFillSyndromeValue(GPMC_Handle handle, uint32_t sector, uint32_t *bchData)
Function to fill BCH syndrome value per sector to ELM module.
uint32_t advAadMuxWrOffTime
Definition: gpmc.h:835
@ GPMC_OPERATING_MODE_CALLBACK
Definition: gpmc.h:621
int32_t GPMC_eccBchSectorGetError(GPMC_Handle handle, uint32_t sector, uint32_t *errCount, uint32_t *errLoc)
Function to get number of errors per sector by ELM module.
const GPMC_AddrRegion * dmaRestrictedRegions
Definition: gpmc.h:920
GPMC_Handle handle
Definition: gpmc.h:789
uint32_t cmdCycle1
Definition: gpmc.h:682
uint32_t csRdOffTime
Definition: gpmc.h:821
uint32_t rowAddress
Definition: gpmc.h:686
int32_t GPMC_eccEngineEnable(GPMC_Handle handle)
Function to enable GPMC ECC engine.
void * arg
Definition: gpmc.h:713
int32_t GPMC_configureTimingParametersPsram(GPMC_Handle handle)
Function to configure GPMC timing parameters for PSRAM/NOR Devices.
GPMC driver instance parameters.
Definition: gpmc.h:742
@ GPMC_TRANSFER_MODE_CALLBACK
Definition: gpmc.h:640
uint32_t accessType
Definition: gpmc.h:918
int32_t GPMC_eccBchCheckErrorProcessingStatus(GPMC_Handle handle, uint32_t sector)
Function to get error processing status for a sector by ELM module.
uint32_t count
Definition: gpmc.h:709
uint32_t readType
Definition: gpmc.h:912
GPMC_Handle GPMC_getHandle(uint32_t driverInstanceIndex)
This function returns the handle of an open GPMC Instance from the instance index.
void * gpmcDmaHandle
Definition: gpmc.h:810
uint32_t GPMC_getInputClk(GPMC_Handle handle)
This function returns the input clk frequency GPMC was programmed at.
Opaque Hwi object used with the Hwi APIs.
Definition: HwiP.h:93
uint32_t chipSelBaseAddr
Definition: gpmc.h:900
uint32_t wrAcessTime
Definition: gpmc.h:853
@ GPMC_TRANSFER_COMPLETED
Definition: gpmc.h:667
Opaque semaphore object used with the semaphore APIs.
Definition: SemaphoreP.h:59
GPMC_OperatingMode operMode
Definition: gpmc.h:795
Data structure to set NAND command parameters.
Definition: gpmc.h:681
int32_t gpmcDmaChIndex
Definition: gpmc.h:746
uint32_t clkDivider
Definition: gpmc.h:894
uint32_t chipSel
Definition: gpmc.h:752
uint32_t pageBurstAccess
Definition: gpmc.h:849
uint32_t dmaEnable
Definition: gpmc.h:756
GPMC_TransactionStatus status
Definition: gpmc.h:717
uint32_t checkReadypin
Definition: gpmc.h:696
GPMC_TransactionType
Type of the GPMC transaction for read and write.
Definition: gpmc.h:651
GPMC_nandEccAlgo
GPMC ECC engine algoritms.
Definition: gpmc.h:603
uint32_t advRdOffTime
Definition: gpmc.h:827
GPMC Address Region.
Definition: gpmc.h:775
GPMC_Transaction * transaction
Definition: gpmc.h:808
void GPMC_writeNandCommandParamsInit(GPMC_nandCmdParams *cmdParams)
Function to initialise GPMC_nandCmdParams structure to default values.
void(* GPMC_CallbackFxn)(GPMC_Handle handle, GPMC_Transaction *transaction)
The definition of a callback function used by the GPMC driver when used in GPMC_OPERATING_MODE_CALLBA...
Definition: gpmc.h:728
@ GPMC_TRANSACTION_TYPE_WRITE
Definition: gpmc.h:654
uint32_t wrDataOnMuxBusTime
Definition: gpmc.h:859
uint32_t addrDataMux
Definition: gpmc.h:896
GPMC_Config gGpmcConfig[]
Externally defined driver configuration array.
void GPMC_deinit(void)
This function de-initializes the GPMC module.
uint32_t memDevice
Definition: gpmc.h:762
int32_t GPMC_eccBchStartErrorProcessing(GPMC_Handle handle, uint8_t sector)
Function to start error processing for a sector by ELM module.
int32_t GPMC_eccEngineBCHConfig(GPMC_Handle handle, uint32_t eccSteps)
Function to configure GPMC ECC engine for BCH algorithm.
GPMC_TransactionStatus
Transaction status codes that are set by the GPMC driver.
Definition: gpmc.h:666
uint32_t devSize
Definition: gpmc.h:750