This reference design is useful for implementing a digitally peak current mode controlled (PCMC) phase shifted full bridge (PSFB) DC-DC converter which converts a 400V DC input to a regulated 12V DC output and vice-versa. Although the design is capable of performing bi-directional power conversion, the scope of this application note is limited to illustrate only high voltage to low voltage conversion i.e step down operation. Novel PCMC waveform generation based on type-5 PWM and internal slope compensation, and simple PCMC implementation are the highlights of this design.
Below images show the block diagram of the converter and the actual hardware respectively:-
This version of reference design supports:
Testing has been done upto 250W. Hardware has not been tested upto rated capacity yet.
A benchmark on R5F core has been conducted to observe the following results when running the following functions:
Function | Clock Cycles with Level-s Compiler Optimization | Clock Cycles without Compiler Optimization | CPU Loading with Level-s Compiler Optimization | CPU Loading without Compiler Optimization |
---|---|---|---|---|
ISR2- PCMC control | 532 | 1582 | 13.3% | 39.55% |
The following example has been provided to demonstrate this reference design:
Useful links for the application to run are provided below: