64 #include <drivers/hw_include/hw_types.h>
65 #include <drivers/hw_include/cslr_soc.h>
67 #include <drivers/hw_include/cslr_dac.h>
75 #define DAC_LOCK_CONTROL (0x1U)
76 #define DAC_LOCK_SHADOW (0x2U)
77 #define DAC_LOCK_OUTPUT (0x4U)
107 #define DAC_REG_BYTE_MASK (0xFFU)
108 #define DAC_LOCK_KEY (0xA000U)
126 static inline uint16_t
132 return(HW_RD_REG16(base + CSL_DAC_DACREV) & CSL_DAC_DACREV_REV_MASK);
157 HW_WR_REG16(base + CSL_DAC_DACCTL,
158 ((HW_RD_REG16(base + CSL_DAC_DACCTL) &
159 ~CSL_DAC_DACCTL_DACREFSEL_MASK) | (uint16_t)source));
184 HW_WR_REG16(base + CSL_DAC_DACCTL,
185 ((HW_RD_REG16(base + CSL_DAC_DACCTL) &
186 ~CSL_DAC_DACCTL_LOADMODE_MASK) | (uint16_t)mode));
216 HW_WR_REG16(base + CSL_DAC_DACCTL,
217 ((HW_RD_REG16(base + CSL_DAC_DACCTL) &
218 ~CSL_DAC_DACCTL_SYNCSEL_MASK) |
219 ((uint16_t)(signal - 1U) << CSL_DAC_DACCTL_SYNCSEL_SHIFT)));
233 static inline uint16_t
239 return(HW_RD_REG16(base + CSL_DAC_DACVALA) & CSL_DAC_DACVALA_DACVALA_MASK);
265 HW_WR_REG16(base + CSL_DAC_DACVALS,
266 ((HW_RD_REG16(base + CSL_DAC_DACVALS) &
267 ~CSL_DAC_DACVALS_DACVALS_MASK) |
268 (uint16_t)(value & CSL_DAC_DACVALS_DACVALS_MASK)));
282 static inline uint16_t
288 return(HW_RD_REG16(base + CSL_DAC_DACVALS) & CSL_DAC_DACVALS_DACVALS_MASK);
311 HW_WR_REG16(base + CSL_DAC_DACOUTEN,
312 HW_RD_REG16(base + CSL_DAC_DACOUTEN) | CSL_DAC_DACOUTEN_DACOUTEN_MASK);
332 HW_WR_REG16(base + CSL_DAC_DACOUTEN,
333 HW_RD_REG16(base + CSL_DAC_DACOUTEN) &
334 ~CSL_DAC_DACOUTEN_DACOUTEN_MASK);
365 HW_WR_REG16(base + CSL_DAC_DACTRIM,
366 ((HW_RD_REG16(base + CSL_DAC_DACTRIM) &
367 ~CSL_DAC_DACTRIM_OFFSET_TRIM_MASK) | (int16_t)offset));
381 static inline int16_t
389 value = (HW_RD_REG16(base + CSL_DAC_DACTRIM) &
390 CSL_DAC_DACTRIM_OFFSET_TRIM_MASK);
394 return((int16_t)value);
428 HW_WR_REG16(base + CSL_DAC_DACLOCK,
429 HW_RD_REG16(base + CSL_DAC_DACLOCK) |
430 (CSL_DAC_DACLOCK_KEY_MASK | reg));
465 return(((HW_RD_REG16(base + CSL_DAC_DACLOCK) & reg) != 0U));