7 #ifndef __MSP430WARE_EUSCI_A_UART_H__
8 #define __MSP430WARE_EUSCI_A_UART_H__
10 #include "inc/hw_memmap.h"
12 #ifdef __MSP430_HAS_EUSCI_Ax__
25 #include "inc/hw_memmap.h"
31 #define DEFAULT_SYNC 0x00
32 #define EUSCI_A_UART_AUTOMATICBAUDRATE_SYNC 0x55
92 #define EUSCI_A_UART_NO_PARITY 0x00
93 #define EUSCI_A_UART_ODD_PARITY 0x01
94 #define EUSCI_A_UART_EVEN_PARITY 0x02
102 #define EUSCI_A_UART_MSB_FIRST UCMSB
103 #define EUSCI_A_UART_LSB_FIRST 0x00
111 #define EUSCI_A_UART_MODE UCMODE_0
112 #define EUSCI_A_UART_IDLE_LINE_MULTI_PROCESSOR_MODE UCMODE_1
113 #define EUSCI_A_UART_ADDRESS_BIT_MULTI_PROCESSOR_MODE UCMODE_2
114 #define EUSCI_A_UART_AUTOMATIC_BAUDRATE_DETECTION_MODE UCMODE_3
122 #define EUSCI_A_UART_CLOCKSOURCE_SMCLK UCSSEL__SMCLK
123 #define EUSCI_A_UART_CLOCKSOURCE_ACLK UCSSEL__ACLK
131 #define EUSCI_A_UART_ONE_STOP_BIT 0x00
132 #define EUSCI_A_UART_TWO_STOP_BITS UCSPB
140 #define EUSCI_A_UART_OVERSAMPLING_BAUDRATE_GENERATION 0x01
141 #define EUSCI_A_UART_LOW_FREQUENCY_BAUDRATE_GENERATION 0x00
150 #define EUSCI_A_UART_RECEIVE_INTERRUPT UCRXIE
151 #define EUSCI_A_UART_TRANSMIT_INTERRUPT UCTXIE
152 #define EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT UCRXEIE
153 #define EUSCI_A_UART_BREAKCHAR_INTERRUPT UCBRKIE
154 #define EUSCI_A_UART_STARTBIT_INTERRUPT UCSTTIE
155 #define EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT UCTXCPTIE
165 #define EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG UCRXIFG
166 #define EUSCI_A_UART_TRANSMIT_INTERRUPT_FLAG UCTXIFG
167 #define EUSCI_A_UART_STARTBIT_INTERRUPT_FLAG UCSTTIFG
168 #define EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT_FLAG UCTXCPTIFG
177 #define EUSCI_A_UART_LISTEN_ENABLE UCLISTEN
178 #define EUSCI_A_UART_FRAMING_ERROR UCFE
179 #define EUSCI_A_UART_OVERRUN_ERROR UCOE
180 #define EUSCI_A_UART_PARITY_ERROR UCPE
181 #define EUSCI_A_UART_BREAK_DETECT UCBRK
182 #define EUSCI_A_UART_RECEIVE_ERROR UCRXERR
183 #define EUSCI_A_UART_ADDRESS_RECEIVED UCADDR
184 #define EUSCI_A_UART_IDLELINE UCIDLE
185 #define EUSCI_A_UART_BUSY UCBUSY
193 #define EUSCI_A_UART_DEGLITCH_TIME_2ns 0x00
194 #define EUSCI_A_UART_DEGLITCH_TIME_50ns UCGLIT0
195 #define EUSCI_A_UART_DEGLITCH_TIME_100ns UCGLIT1
196 #define EUSCI_A_UART_DEGLITCH_TIME_200ns (UCGLIT0 + UCGLIT1)
248 uint8_t transmitData);
492 uint8_t transmitAddress);
558 uint16_t deglitchTime);
570 #endif // __MSP430WARE_EUSCI_A_UART_H__
uint8_t overSampling
Definition: eusci_a_uart.h:82
uint8_t EUSCI_A_UART_receiveData(uint16_t baseAddress)
Receives a byte that has been sent to the UART Module.
Definition: eusci_a_uart.c:92
uint32_t EUSCI_A_UART_getReceiveBufferAddress(uint16_t baseAddress)
Returns the address of the RX Buffer of the UART for the DMA module.
Definition: eusci_a_uart.c:209
uint8_t firstModReg
Definition: eusci_a_uart.h:50
void EUSCI_A_UART_transmitAddress(uint16_t baseAddress, uint8_t transmitAddress)
Transmits the next byte to be transmitted marked as address depending on selected multiprocessor mode...
Definition: eusci_a_uart.c:178
void EUSCI_A_UART_transmitBreak(uint16_t baseAddress)
Transmit break.
Definition: eusci_a_uart.c:188
uint8_t parity
Definition: eusci_a_uart.h:60
uint8_t secondModReg
Definition: eusci_a_uart.h:54
uint16_t clockPrescalar
Is the value to be written into UCBRx bits.
Definition: eusci_a_uart.h:46
bool EUSCI_A_UART_init(uint16_t baseAddress, EUSCI_A_UART_initParam *param)
Advanced initialization routine for the UART block. The values to be written into the clockPrescalar...
Definition: eusci_a_uart.c:21
uint16_t numberofStopBits
Definition: eusci_a_uart.h:70
void EUSCI_A_UART_setDormant(uint16_t baseAddress)
Sets the UART module in dormant mode.
Definition: eusci_a_uart.c:168
void EUSCI_A_UART_transmitData(uint16_t baseAddress, uint8_t transmitData)
Transmits a byte from the UART Module.
Definition: eusci_a_uart.c:79
void EUSCI_A_UART_disableInterrupt(uint16_t baseAddress, uint8_t mask)
Disables individual UART interrupt sources.
Definition: eusci_a_uart.c:121
uint16_t msborLsbFirst
Definition: eusci_a_uart.h:65
uint8_t EUSCI_A_UART_getInterruptStatus(uint16_t baseAddress, uint8_t mask)
Gets the current UART interrupt status.
Definition: eusci_a_uart.c:138
void EUSCI_A_UART_clearInterrupt(uint16_t baseAddress, uint8_t mask)
Clears UART interrupt sources.
Definition: eusci_a_uart.c:144
uint32_t EUSCI_A_UART_getTransmitBufferAddress(uint16_t baseAddress)
Returns the address of the TX Buffer of the UART for the DMA module.
Definition: eusci_a_uart.c:214
void EUSCI_A_UART_resetDormant(uint16_t baseAddress)
Re-enables UART module from dormant mode.
Definition: eusci_a_uart.c:173
void EUSCI_A_UART_selectDeglitchTime(uint16_t baseAddress, uint16_t deglitchTime)
Sets the deglitch time.
Definition: eusci_a_uart.c:219
void EUSCI_A_UART_disable(uint16_t baseAddress)
Disables the UART block.
Definition: eusci_a_uart.c:156
void EUSCI_A_UART_enableInterrupt(uint16_t baseAddress, uint8_t mask)
Enables individual UART interrupt sources.
Definition: eusci_a_uart.c:103
uint16_t uartMode
Definition: eusci_a_uart.h:77
Used in the EUSCI_A_UART_init() function as the param parameter.
Definition: eusci_a_uart.h:39
uint8_t selectClockSource
Definition: eusci_a_uart.h:44
uint8_t EUSCI_A_UART_queryStatusFlags(uint16_t baseAddress, uint8_t mask)
Gets the current UART status flags.
Definition: eusci_a_uart.c:162
void EUSCI_A_UART_enable(uint16_t baseAddress)
Enables the UART block.
Definition: eusci_a_uart.c:150