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MSPGCC 2_01_01_00 Product Download Page
Build date: 08042014
Click on the links in the table below to download.
z:\gcc.html
TI has partnered with Red Hat to bring you a new and fully supported open
source compiler. This free GCC compiler has no code size limit. In
addition, this compiler can be used standalone or selected within Code Composer 6.0 (see CCS App Center).
Date
2014-09-03
Includes
MSP Debug Stack v3.4.2.7
Key Changes in This Release
- New Device Support
- MSP430FR2033 Family
- MSP430FG6626 Family
- MSBDebugStack Changes
- Early MSP430FR6989 family silicon (older than revision C) is no longer supported
- Early MSP430FR5969 family silicon (older than revision F) is no longer supported
- Improved EnergyTrace stability on longer runs
- Improved stability during UIF firmware update from v2 to v3
- SMCLK no longer listed for clock control on MSP430i2040
- Changed voltage of 3000mV to 3300mV during UIF start-up
- Changed MSP-FET UART lines power up state - UART lines are configured to High-Z during MSP-FET start-up
- Changed MSP-FET UART to only support fixed baud rates - 9600, 14400, 19200, 28800, 38400, 56000, 57600 and 115200
- New MSBDebugStack Features
- MSP-FET BSL support - I2C and UART BSL
- Can be activated via invalid baud rate commands:
- 9620 Tristate of all UART/ BSL pins – no current flow into target device
- 9621 Configure UART communication without handshake (default start behavior)
- 9622 Configure UART communication with handshake
- 9623 Voltage configuration command. Set target VCC hard to 3.3V
- 9601 BSL-Entry sequence + Power up 3.3V (UART BSL)
- 100000(1) BSL-Entry sequence + Power up 3.3V (I2C BSL)
- 400000(1) BSL-Entry sequence + Power up 3.3V (I2C BSL)
- 8001 Enable MSP-FET debugger mode - disable of MSP-FET BSL mode
- During MSP-FET BSL mode the debugger mode is disabled
- Over-current protection of JTAG/I2C/UART and VCC supply lines is switched of in MSP-FET BSL mode
- In MSP-FET UART BSL mode only fixed baud rates are supported - 9600, 14400, 19200, 28800, 38400, 56000, 57600 and 115200
- MSBDebugStack Bug Fixes
- Fixed clock control module definitions For MSP430FR5969/MSP430FR6989
- Fixed potential race condition in communication with Fet (could get out of sync)
- Fixed potential race condition between events (eg. LPMx.5) and API calls
- Fixed memory leak when receiving asynchronous events (breakpoints, trace, ...)
- Fixed case of hex digits when writing Intel Hex (now upper case)
- Fixed debug access affect LPM current consumption on FR5969
- Fixed Race conditions during LPM5/breakpoint events
- Header and Support File changes
- Implemented missing RTC_C definitions (Bugzilla 8502)
- Corrected UBSSEL__MODCLK definition for FR41xx devices (Bugzilla 8516)
- Fixed macro definitions for MSP430 GCC (Assembler) (Bugzilla 8540)
- Removed linker warnings when using the IPE dialog (Bugzilla 8438)
- Added missing LCD_B and LCD_C definitions (Bugzilla 8383)
- Added word access definitions for LCD_E memory registers (Bugzilla 8371)
- Missing defintion for LCDBMEM on FR4133 (Bugzilla 8363)
- Missing defintion for LCDBLKPRE_x on FR4133 (Bugzilla 8359)
- MSP430 gcc compiler cannot compile C++ code which includes iomacros.h (Bugzilla 8328)
- USCI29 workaround missing in some command linker files (Bugzilla 8299)
Known Issues
- When running the GNU debugger on Microsoft Windows, pressing Ctrl-C may terminate the debugger
- The GDB Agent is not able to connect to MSP430L092 target devices
Older Releases
1_00_00_00 Initial release (version 271, beta)
1_00_01_00 Minor update - source code only (version 317, beta)
1_01_00_00 Version 371, beta
2_00_00_00 Version 14r1-10, first official production release
Get started today in Windows or Linux environments!
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