Analog to Digital Converter with a maximum of 14-bit resolution.
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#define | ADC_CLOCKSOURCE_ADCOSC (ADC14_CTL0_SSEL__0) |
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#define | ADC_CLOCKSOURCE_SYSOSC (ADC14_CTL0_SSEL__1) |
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#define | ADC_CLOCKSOURCE_ACLK (ADC14_CTL0_SSEL__2) |
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#define | ADC_CLOCKSOURCE_MCLK (ADC14_CTL0_SSEL__3) |
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#define | ADC_CLOCKSOURCE_SMCLK (ADC14_CTL0_SSEL__4) |
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#define | ADC_CLOCKSOURCE_HSMCLK (ADC14_CTL0_SSEL__5) |
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#define | ADC_PREDIVIDER_1 (ADC14_CTL0_PDIV__0) |
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#define | ADC_PREDIVIDER_4 (ADC14_CTL0_PDIV__1) |
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#define | ADC_PREDIVIDER_32 (ADC14_CTL0_PDIV__2) |
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#define | ADC_PREDIVIDER_64 (ADC14_CTL0_PDIV__3) |
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#define | ADC_DIVIDER_1 (ADC14_CTL0_DIV__0) |
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#define | ADC_DIVIDER_2 (ADC14_CTL0_DIV__1) |
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#define | ADC_DIVIDER_3 (ADC14_CTL0_DIV__2) |
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#define | ADC_DIVIDER_4 (ADC14_CTL0_DIV__3) |
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#define | ADC_DIVIDER_5 (ADC14_CTL0_DIV__4) |
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#define | ADC_DIVIDER_6 (ADC14_CTL0_DIV__5) |
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#define | ADC_DIVIDER_7 (ADC14_CTL0_DIV__6) |
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#define | ADC_DIVIDER_8 (ADC14_CTL0_DIV__7) |
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#define | ADC_MAPINTCH3 (ADC14_CTL1_CH3MAP) |
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#define | ADC_MAPINTCH2 (ADC14_CTL1_CH2MAP) |
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#define | ADC_MAPINTCH1 (ADC14_CTL1_CH1MAP) |
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#define | ADC_MAPINTCH0 (ADC14_CTL1_CH0MAP) |
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#define | ADC_TEMPSENSEMAP (ADC14_CTL1_TCMAP) |
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#define | ADC_BATTMAP (ADC14_CTL1_BATMAP) |
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#define | ADC_NOROUTE 0 |
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#define | ADC_8BIT ADC14_CTL1_RES__0 |
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#define | ADC_10BIT ADC14_CTL1_RES__1 |
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#define | ADC_12BIT ADC14_CTL1_RES__2 |
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#define | ADC_14BIT ADC14_CTL1_RES__3 |
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#define | ADC_TRIGGER_ADCSC ADC14_CTL0_SHS__0 |
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#define | ADC_TRIGGER_SOURCE1 ADC14_CTL0_SHS__1 |
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#define | ADC_TRIGGER_SOURCE2 ADC14_CTL0_SHS__2 |
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#define | ADC_TRIGGER_SOURCE3 ADC14_CTL0_SHS__3 |
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#define | ADC_TRIGGER_SOURCE4 ADC14_CTL0_SHS__4 |
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#define | ADC_TRIGGER_SOURCE5 ADC14_CTL0_SHS__5 |
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#define | ADC_TRIGGER_SOURCE6 ADC14_CTL0_SHS__6 |
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#define | ADC_TRIGGER_SOURCE7 ADC14_CTL0_SHS__7 |
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#define | ADC_PULSE_WIDTH_4 ADC14_CTL0_SHT1__0 |
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#define | ADC_PULSE_WIDTH_8 ADC14_CTL0_SHT1__1 |
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#define | ADC_PULSE_WIDTH_16 ADC14_CTL0_SHT1__2 |
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#define | ADC_PULSE_WIDTH_32 ADC14_CTL0_SHT1__3 |
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#define | ADC_PULSE_WIDTH_64 ADC14_CTL0_SHT1__4 |
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#define | ADC_PULSE_WIDTH_96 ADC14_CTL0_SHT1__5 |
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#define | ADC_PULSE_WIDTH_128 ADC14_CTL0_SHT1__6 |
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#define | ADC_PULSE_WIDTH_192 ADC14_CTL0_SHT1__7 |
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#define | ADC_NONDIFFERENTIAL_INPUTS false |
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#define | ADC_DIFFERENTIAL_INPUTS true |
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#define | ADC_MEM0 0x00000001 |
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#define | ADC_MEM1 0x00000002 |
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#define | ADC_MEM2 0x00000004 |
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#define | ADC_MEM3 0x00000008 |
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#define | ADC_MEM4 0x00000010 |
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#define | ADC_MEM5 0x00000020 |
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#define | ADC_MEM6 0x00000040 |
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#define | ADC_MEM7 0x00000080 |
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#define | ADC_MEM8 0x00000100 |
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#define | ADC_MEM9 0x00000200 |
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#define | ADC_MEM10 0x00000400 |
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#define | ADC_MEM11 0x00000800 |
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#define | ADC_MEM12 0x00001000 |
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#define | ADC_MEM13 0x00002000 |
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#define | ADC_MEM14 0x00004000 |
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#define | ADC_MEM15 0x00008000 |
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#define | ADC_MEM16 0x00010000 |
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#define | ADC_MEM17 0x00020000 |
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#define | ADC_MEM18 0x00040000 |
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#define | ADC_MEM19 0x00080000 |
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#define | ADC_MEM20 0x00100000 |
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#define | ADC_MEM21 0x00200000 |
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#define | ADC_MEM22 0x00400000 |
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#define | ADC_MEM23 0x00800000 |
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#define | ADC_MEM24 0x01000000 |
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#define | ADC_MEM25 0x02000000 |
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#define | ADC_MEM26 0x04000000 |
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#define | ADC_MEM27 0x08000000 |
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#define | ADC_MEM28 0x10000000 |
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#define | ADC_MEM29 0x20000000 |
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#define | ADC_MEM30 0x40000000 |
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#define | ADC_MEM31 0x80000000 |
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#define | ADC_VREFPOS_AVCC_VREFNEG_VSS (ADC14_MCTL_VRSEL__0) |
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#define | ADC_VREFPOS_INTBUF_VREFNEG_VSS (ADC14_MCTL_VRSEL__1) |
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#define | ADC_VREFPOS_EXTPOS_VREFNEG_EXTNEG (ADC14_MCTL_VRSEL__14) |
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#define | ADC_VREFPOS_EXTBUF_VREFNEG_EXTNEG (ADC14_MCTL_VRSEL__15) |
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#define | ADC_INPUT_A0 (ADC14_MCTL_INCH__0) |
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#define | ADC_INPUT_A1 (ADC14_MCTL_INCH__1) |
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#define | ADC_INPUT_A2 (ADC14_MCTL_INCH__2) |
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#define | ADC_INPUT_A3 (ADC14_MCTL_INCH__3) |
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#define | ADC_INPUT_A4 (ADC14_MCTL_INCH__4) |
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#define | ADC_INPUT_A5 (ADC14_MCTL_INCH__5) |
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#define | ADC_INPUT_A6 (ADC14_MCTL_INCH__6) |
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#define | ADC_INPUT_A7 (ADC14_MCTL_INCH__7) |
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#define | ADC_INPUT_A8 (ADC14_MCTL_INCH__8) |
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#define | ADC_INPUT_A9 (ADC14_MCTL_INCH__9) |
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#define | ADC_INPUT_A10 (ADC14_MCTL_INCH__10) |
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#define | ADC_INPUT_A11 (ADC14_MCTL_INCH__11) |
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#define | ADC_INPUT_A12 (ADC14_MCTL_INCH__12) |
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#define | ADC_INPUT_A13 (ADC14_MCTL_INCH__13) |
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#define | ADC_INPUT_A14 (ADC14_MCTL_INCH__14) |
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#define | ADC_INPUT_A15 (ADC14_MCTL_INCH__15) |
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#define | ADC_INPUT_A16 (ADC14_MCTL_INCH__16) |
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#define | ADC_INPUT_A17 (ADC14_MCTL_INCH__17) |
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#define | ADC_INPUT_A18 (ADC14_MCTL_INCH__18) |
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#define | ADC_INPUT_A19 (ADC14_MCTL_INCH__19) |
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#define | ADC_INPUT_A20 (ADC14_MCTL_INCH__20) |
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#define | ADC_INPUT_A21 (ADC14_MCTL_INCH__21) |
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#define | ADC_INPUT_A22 (ADC14_MCTL_INCH__22) |
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#define | ADC_INPUT_A23 (ADC14_MCTL_INCH__23) |
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#define | ADC_INPUT_A24 (ADC14_MCTL_INCH__24) |
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#define | ADC_INPUT_A25 (ADC14_MCTL_INCH__25) |
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#define | ADC_INPUT_A26 (ADC14_MCTL_INCH__26) |
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#define | ADC_INPUT_A27 (ADC14_MCTL_INCH__27) |
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#define | ADC_INPUT_A28 (ADC14_MCTL_INCH__28) |
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#define | ADC_INPUT_A29 (ADC14_MCTL_INCH__29) |
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#define | ADC_INPUT_A30 (ADC14_MCTL_INCH__30) |
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#define | ADC_INPUT_A31 (ADC14_MCTL_INCH__31) |
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#define | ADC_COMP_WINDOW0 0x00 |
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#define | ADC_COMP_WINDOW1 0x01 |
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#define | ADC_SIGNED_BINARY 0x00 |
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#define | ADC_UNSIGNED_BINARY 0x01 |
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#define | ADC_MANUAL_ITERATION 0x00 |
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#define | ADC_AUTOMATIC_ITERATION ADC14_CTL0_MSC |
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#define | ADC_UNRESTRICTED_POWER_MODE ADC14_CTL1_PWRMD__0 |
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#define | ADC_ULTRA_LOW_POWER_MODE ADC14_CTL1_PWRMD__2 |
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#define | ADC_INT0 ADC14_IER0_IE0 |
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#define | ADC_INT1 ADC14_IER0_IE1 |
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#define | ADC_INT2 ADC14_IER0_IE2 |
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#define | ADC_INT3 ADC14_IER0_IE3 |
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#define | ADC_INT4 ADC14_IER0_IE4 |
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#define | ADC_INT5 ADC14_IER0_IE5 |
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#define | ADC_INT6 ADC14_IER0_IE6 |
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#define | ADC_INT7 ADC14_IER0_IE7 |
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#define | ADC_INT8 ADC14_IER0_IE8 |
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#define | ADC_INT9 ADC14_IER0_IE9 |
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#define | ADC_INT10 ADC14_IER0_IE10 |
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#define | ADC_INT11 ADC14_IER0_IE11 |
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#define | ADC_INT12 ADC14_IER0_IE12 |
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#define | ADC_INT13 ADC14_IER0_IE13 |
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#define | ADC_INT14 ADC14_IER0_IE14 |
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#define | ADC_INT15 ADC14_IER0_IE15 |
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#define | ADC_INT16 ADC14_IER0_IE16 |
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#define | ADC_INT17 ADC14_IER0_IE17 |
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#define | ADC_INT18 ADC14_IER0_IE18 |
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#define | ADC_INT19 ADC14_IER0_IE19 |
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#define | ADC_INT20 ADC14_IER0_IE20 |
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#define | ADC_INT21 ADC14_IER0_IE21 |
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#define | ADC_INT22 ADC14_IER0_IE22 |
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#define | ADC_INT23 ADC14_IER0_IE23 |
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#define | ADC_INT24 ADC14_IER0_IE24 |
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#define | ADC_INT25 ADC14_IER0_IE25 |
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#define | ADC_INT26 ADC14_IER0_IE26 |
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#define | ADC_INT27 ADC14_IER0_IE27 |
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#define | ADC_INT28 ADC14_IER0_IE28 |
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#define | ADC_INT29 ADC14_IER0_IE29 |
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#define | ADC_INT30 ADC14_IER0_IE30 |
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#define | ADC_INT31 ADC14_IER0_IE31 |
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#define | ADC_IN_INT 0x0000000200000000 |
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#define | ADC_LO_INT 0x0000000400000000 |
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#define | ADC_HI_INT 0x0000000800000000 |
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#define | ADC_OV_INT 0x0000001000000000 |
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#define | ADC_TOV_INT 0x0000002000000000 |
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#define | ADC_RDY_INT 0x0000004000000000 |
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#define | ADC_INVALID_MEM 32 |
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#define | ADC14_enableModuleMultipleInstance(a) ADC14_enableModule() |
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#define | ADC14_disableModuleMultipleInstance(a) ADC14_disableModule() |
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#define | ADC14_initModuleMultipleInstance(a, b, c, d, e) ADC14_initModule(b,c,d,e) |
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#define | ADC14_setResolutionMutlipleInstance(a, b) ADC14_setResolution(b) |
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#define | ADC14_getResolutionMutlipleInstance(a) ADC14_getResolution() |
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#define | ADC14_setSampleHoldTriggerMultipleInstance(a, b, c) ADC14_setSampleHoldTrigger(b,c) |
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#define | ADC14_setSampleHoldTimeMultipleInstance(a, b, c) ADC14_setSampleHoldTime(b,c) |
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#define | ADC14_configureMultiSequenceModeMultipleInstance(a, b, c, d) ADC14_configureMultiSequenceMode(b,c,d) |
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#define | ADC14_configureSingleSampleModeMultipleInstance(a, b, c) ADC14_configureSingleSampleMode(b,c) |
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#define | ADC14_enableConversionMultipleInstance(a, b) ADC14_enableConversion(b) |
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#define | ADC14_disableConversionMultipleInstance(a) ADC14_disableConversion() |
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#define | ADC14_toggleConversionTriggerMultipleInstance(a) ADC14_toggleConversionTrigger() |
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#define | ADC14_isBusyMultipleInstance(a) ADC14_isBusy() |
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#define | ADC14_configureConversionMemoryMultipleInstance(a, b, c, d, e) ADC14_enableModule(b,c,d,e) |
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#define | ADC14_enableComparatorWindowMultipleInstance(a, b, c) ADC14_enableComparatorWindow(b,c) |
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#define | ADC14_disableComparatorWindowMultipleInstance(a, b) ADC14_disableComparatorWindow(b) |
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#define | ADC14_setComparatorWindowValueMultipleInstance(a, b, c, d) ADC14_setComparatorWindowValue(b,c,d) |
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#define | ADC14_setResultFormatMultipleInstance(a, b) ADC14_setResultFormat(b) |
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#define | ADC14_getResultMultipleInstance(a, b) ADC14_getResult(b) |
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#define | ADC14_getMultiSequenceResultMultipleInstance(a, b) ADC14_getMultiSequenceResult(b) |
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#define | ADC14_getResultArrayMultipleInstance(a, b, c, d) ADC14_getResultArray(b,c,d) |
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#define | ADC14_enableReferenceBurstMultipleInstance(a) ADC14_enableReferenceBurst() |
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#define | ADC14_disableReferenceBurstMultipleInstance(a) ADC14_disableReferenceBurst() |
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#define | ADC14_setPowerModeMultipleInstance(a, b) ADC14_setPowerMode(b) |
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#define | ADC14_enableSampleTimerMultipleInstance(a, b) ADC14_enableSampleTimer(b) |
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#define | ADC14_disableSampleTimerMultipleInstance(a) ADC14_disableSampleTimer() |
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#define | ADC14_enableInterruptMultipleInstance(a, b) ADC14_enableInterrupt(b) |
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#define | ADC14_disableInterruptMultipleInstance(a, b) ADC14_disableInterrupt(b) |
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#define | ADC14_getInterruptStatusMultipleInstance(a) ADC14_getInterruptStatus() |
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#define | ADC14_getEnabledInterruptStatusMultipleInstance(a) ADC14_getEnabledInterruptStatus() |
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#define | ADC14_clearInterruptFlagMultipleInstance(a, b) ADC14_clearInterruptFlag(b) |
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#define | ADC14_registerInterruptMultipleInstance(a, b) ADC14_registerInterrupt(b) |
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#define | ADC14_unregisterInterruptMultipleInstance(a) ADC14_unregisterInterrupt() |
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void | ADC14_enableModule (void) |
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bool | ADC14_disableModule (void) |
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bool | ADC14_initModule (uint32_t clockSource, uint32_t clockPredivider, uint32_t clockDivider, uint32_t internalChannelMask) |
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void | ADC14_setResolution (uint32_t resolution) |
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uint_fast32_t | ADC14_getResolution (void) |
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bool | ADC14_setSampleHoldTrigger (uint32_t source, bool invertSignal) |
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bool | ADC14_setSampleHoldTime (uint32_t firstPulseWidth, uint32_t secondPulseWidth) |
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bool | ADC14_configureMultiSequenceMode (uint32_t memoryStart, uint32_t memoryEnd, bool repeatMode) |
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bool | ADC14_configureSingleSampleMode (uint32_t memoryDestination, bool repeatMode) |
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bool | ADC14_enableConversion (void) |
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void | ADC14_disableConversion (void) |
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bool | ADC14_toggleConversionTrigger (void) |
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bool | ADC14_isBusy (void) |
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bool | ADC14_configureConversionMemory (uint32_t memorySelect, uint32_t refSelect, uint32_t channelSelect, bool differntialMode) |
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bool | ADC14_enableComparatorWindow (uint32_t memorySelect, uint32_t windowSelect) |
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bool | ADC14_disableComparatorWindow (uint32_t memorySelect) |
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bool | ADC14_setComparatorWindowValue (uint32_t window, int16_t low, int16_t high) |
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bool | ADC14_setResultFormat (uint32_t resultFormat) |
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uint_fast16_t | ADC14_getResult (uint32_t memorySelect) |
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void | ADC14_getMultiSequenceResult (uint16_t *res) |
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void | ADC14_getResultArray (uint32_t memoryStart, uint32_t memoryEnd, uint16_t *res) |
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bool | ADC14_enableReferenceBurst (void) |
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bool | ADC14_disableReferenceBurst (void) |
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bool | ADC14_setPowerMode (uint32_t powerMode) |
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bool | ADC14_enableSampleTimer (uint32_t multiSampleConvert) |
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bool | ADC14_disableSampleTimer (void) |
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void | ADC14_enableInterrupt (uint_fast64_t mask) |
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void | ADC14_disableInterrupt (uint_fast64_t mask) |
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uint_fast64_t | ADC14_getInterruptStatus (void) |
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uint_fast64_t | ADC14_getEnabledInterruptStatus (void) |
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void | ADC14_clearInterruptFlag (uint_fast64_t mask) |
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void | ADC14_registerInterrupt (void(*intHandler)(void)) |
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void | ADC14_unregisterInterrupt (void) |
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Analog to Digital Converter with a maximum of 14-bit resolution.
Module Operation
The ADC14 module for Driver Library is designed to allow the user to make simple analog to digital conversions as well make complex and simultaneous conversions across multiple channels.
Conversion Modes
With Single Conversion Mode, the user will sample only a single ADC channel which will be stored in a single ADC memory location. This is the most basic ADC sample/convert mode and allows for very simple measurements on a single channel. To configure single sample mode, only a single destination for the sample/conversion result. The following is a code snippet for configuring/initializing the ADC module in single conversion mode as well as kicking off the start of conversion/sampling.
When using single sample mode, only one memory location will be written for a conversion/sample cycles. To access the result of this conversion, the ADC14_getResult API is used with the corresponding memory location specified. This is usually done within the interrupt service routine of the ADC module.
void adc_isr(void)
{
{
normalizedADCRes = (curADCResult * 3.3) / 16384;
}
}
The ADC14 APIs also support the setup/configuration of multiple conversion mode. With multiple conversion mode, multiple ADC channels are sampled and stored in multiple ADC memory addresses in a single sweep. This is particularly useful when the user wants to take a sample of multiple channels over a period of time (also known as scan mode). The ADC14_getMultiSequenceResult function is used to populate the given array pointer with the result over a wide memory arrange (setup with ADC14_configureMultiSequenceMode ).
Repeat Modes
When configuring the ADC module to use multiple or single sample/conversion mode, a boolean argument is provided to signal whether the DriverLib ADC module should work in "repeat" mode. With repeat mode, once a complete conversion/sample is completed and read by the API, a new conversion happens until the user manually stops conversion using the ADC14_toggleConversionTrigger command. Repeat mode is useful when the user wants to continuously sample an ADC channel over an extended period of time.
When repeat mode is specified to be false, whenever a conversion/sample is finished and read from the result register, the module will stop conversion until called by the ADC14_toggleConversionTrigger function.
Conversion of Results
When reading a result of an ADC14 conversion, it is important to note that the result will be relevant to the current resolution of the ADC14 device. For example, say the ADC14 module is setup with a 14-bit resolution and a positive reference of 2.5v (and a negative of 0v). In this case, if the conversion result of 16383 would signify a value of 2.5v (if in unsigned) mode. A snippet of code that converts the conversion result in the ADC register to a real life value can be seen in the following:
static float convertToFloat(uint16_t result)
{
int32_t temp;
if(0x8000 & result)
{
temp = (result >> 2) | 0xFFFFC000;
return ((temp * 3.3f) / 8191);
}
else
return ((result >> 2)*3.3f) / 8191;
}
It is important to note that when using floating point arithmetic, it is important to enable the devices FPU (if available) to save CPU cycles and energy consumption.
Programming Example
The DriverLib package contains a variety of different code examples that demonstrate the usage of the ADC14 module. These code examples are accessible under the examples/ folder of the MSPWare release as well as through TI Resource Explorer if using Code Composer Studio. These code examples provide a comprehensive list of use cases as well as practical applications involving each module.
Below is a very brief code example showing how to configure the ADC14 module in single sample mode. For a set of more detailed code examples, please refer to the code examples in the examples/ directory of the MSPWare release:
#define ADC_NONDIFFERENTIAL_INPUTS false |
#define ADC_DIFFERENTIAL_INPUTS true |
#define ADC_MEM0 0x00000001 |
#define ADC_MEM1 0x00000002 |
#define ADC_MEM2 0x00000004 |
#define ADC_MEM3 0x00000008 |
#define ADC_MEM4 0x00000010 |
#define ADC_MEM5 0x00000020 |
#define ADC_MEM6 0x00000040 |
#define ADC_MEM7 0x00000080 |
#define ADC_MEM8 0x00000100 |
#define ADC_MEM9 0x00000200 |
#define ADC_MEM10 0x00000400 |
#define ADC_MEM11 0x00000800 |
#define ADC_MEM12 0x00001000 |
#define ADC_MEM13 0x00002000 |
#define ADC_MEM14 0x00004000 |
#define ADC_MEM15 0x00008000 |
#define ADC_MEM16 0x00010000 |
#define ADC_MEM17 0x00020000 |
#define ADC_MEM18 0x00040000 |
#define ADC_MEM19 0x00080000 |
#define ADC_MEM20 0x00100000 |
#define ADC_MEM21 0x00200000 |
#define ADC_MEM22 0x00400000 |
#define ADC_MEM23 0x00800000 |
#define ADC_MEM24 0x01000000 |
#define ADC_MEM25 0x02000000 |
#define ADC_MEM26 0x04000000 |
#define ADC_MEM27 0x08000000 |
#define ADC_MEM28 0x10000000 |
#define ADC_MEM29 0x20000000 |
#define ADC_MEM30 0x40000000 |
#define ADC_MEM31 0x80000000 |
#define ADC_COMP_WINDOW0 0x00 |
#define ADC_COMP_WINDOW1 0x01 |
#define ADC_SIGNED_BINARY 0x00 |
#define ADC_UNSIGNED_BINARY 0x01 |
#define ADC_MANUAL_ITERATION 0x00 |
#define ADC_IN_INT 0x0000000200000000 |
#define ADC_LO_INT 0x0000000400000000 |
#define ADC_HI_INT 0x0000000800000000 |
#define ADC_OV_INT 0x0000001000000000 |
#define ADC_TOV_INT 0x0000002000000000 |
#define ADC_RDY_INT 0x0000004000000000 |
#define ADC_INVALID_MEM 32 |
#define ADC14_initModuleMultipleInstance |
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| ADC14_initModule(b,c,d,e) |
#define ADC14_configureConversionMemoryMultipleInstance |
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| ADC14_enableModule(b,c,d,e) |
void ADC14_enableModule |
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Enables the ADC block.
This will enable operation of the ADC block.
- Returns
- none.
bool ADC14_disableModule |
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void |
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Disables the ADC block.
This will disable operation of the ADC block.
- Returns
- false if user is trying to disable during active conversion
bool ADC14_initModule |
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uint32_t |
clockSource, |
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uint32_t |
clockPredivider, |
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uint32_t |
clockDivider, |
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uint32_t |
internalChannelMask |
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Initializes the ADC module and sets up the clock system divider/pre-divider. This initialization function will also configure the internal/external signal mapping.
- Note
- A call to this function while active ADC conversion is happening is an invalid case and will result in a false value being returned.
- Parameters
-
clockSource | The clock source to use for the ADC module.
- ADC_CLOCKSOURCE_ADCOSC [DEFAULT]
- ADC_CLOCKSOURCE_SYSOSC
- ADC_CLOCKSOURCE_ACLK
- ADC_CLOCKSOURCE_MCLK
- ADC_CLOCKSOURCE_SMCLK
- ADC_CLOCKSOURCE_HSMCLK
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clockPredivider | Divides the given clock source before feeding it into the main clock divider. Valid values are:
- ADC_PREDIVIDER_1 [DEFAULT]
- ADC_PREDIVIDER_4
- ADC_PREDIVIDER_32
- ADC_PREDIVIDER_64
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clockDivider | Divides the pre-divided clock source Valid values are
- ADC_DIVIDER_1 [Default value]
- ADC_DIVIDER_2
- ADC_DIVIDER_3
- ADC_DIVIDER_4
- ADC_DIVIDER_5
- ADC_DIVIDER_6
- ADC_DIVIDER_7
- ADC_DIVIDER_8
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internalChannelMask | Configures the internal/external pin mappings for the ADC modules. This setting determines if the given ADC channel or component is mapped to an external pin (default), or routed to an internal component. This parameter is a bit mask where a logical high value will switch the component to the internal routing. For a list of internal routings, please refer to the device specific data sheet. Valid values are a logical OR of the following values:
- ADC_MAPINTCH3
- ADC_MAPINTCH2
- ADC_MAPINTCH1
- ADC_MAPINTCH0
- ADC_TEMPSENSEMAP
- ADC_BATTMAP
ADC_NOROUTE If internalChannelMask is not desired, pass ADC_NOROUTE in lieu of this parameter.
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- Returns
- false if the initialization fails due to an in progress conversion
References ADC14_CTL0_DIV__M, ADC14_CTL0_PDIV__M, ADC14_CTL0_SSEL__M, ADC_BATTMAP, ADC_CLOCKSOURCE_ACLK, ADC_CLOCKSOURCE_ADCOSC, ADC_CLOCKSOURCE_HSMCLK, ADC_CLOCKSOURCE_MCLK, ADC_CLOCKSOURCE_SMCLK, ADC_CLOCKSOURCE_SYSOSC, ADC_DIVIDER_1, ADC_DIVIDER_2, ADC_DIVIDER_3, ADC_DIVIDER_4, ADC_DIVIDER_5, ADC_DIVIDER_6, ADC_DIVIDER_7, ADC_DIVIDER_8, ADC_MAPINTCH0, ADC_MAPINTCH1, ADC_MAPINTCH2, ADC_MAPINTCH3, ADC_PREDIVIDER_1, ADC_PREDIVIDER_32, ADC_PREDIVIDER_4, ADC_PREDIVIDER_64, ADC_TEMPSENSEMAP, and ASSERT.
void ADC14_setResolution |
( |
uint32_t |
resolution | ) |
|
Sets the resolution of the ADC module. The default resolution is 12-bit, however for power consumption concerns this can be limited to a lower resolution
- Parameters
-
resolution | Resolution of the ADC module
- ADC_8BIT (10 clock cycle conversion time)
- ADC_10BIT (12 clock cycle conversion time)
- ADC_12BIT (14 clock cycle conversion time)
- ADC_14BIT (16 clock cycle conversion time)[DEFAULT]
|
- Returns
- none
References ADC14_CTL1_RES__M, ADC_10BIT, ADC_12BIT, ADC_14BIT, ADC_8BIT, and ASSERT.
uint_fast32_t ADC14_getResolution |
( |
void |
| ) |
|
Gets the resolution of the ADC module.
- Returns
- Resolution of the ADC module
- ADC_8BIT (10 clock cycle conversion time)
- ADC_10BIT (12 clock cycle conversion time)
- ADC_12BIT (14 clock cycle conversion time)
- ADC_14BIT (16 clock cycle conversion time)
References ADC14_CTL1_RES__M.
bool ADC14_setSampleHoldTrigger |
( |
uint32_t |
source, |
|
|
bool |
invertSignal |
|
) |
| |
Sets the source for the trigger of the ADC module. By default, this value is configured to a software source (the ADCSC bit), however depending on the specific device the trigger can be set to different sources (for example, a timer output). These sources vary from part to part and the user should refer to the device specific datasheet.
- Parameters
-
source | Trigger source for sampling. Possible values include:
- ADC_TRIGGER_ADCSC [DEFAULT]
- ADC_TRIGGER_SOURCE1
- ADC_TRIGGER_SOURCE2
- ADC_TRIGGER_SOURCE3
- ADC_TRIGGER_SOURCE4
- ADC_TRIGGER_SOURCE5
- ADC_TRIGGER_SOURCE6
- ADC_TRIGGER_SOURCE7
|
invertSignal | When set to true, will invert the trigger signal to a falling edge. When false, will use a rising edge. |
- Returns
- false if setting fails due to an in progress conversion
References ADC14_CTL0_ISSH, ADC14_CTL0_SHS__M, ADC_TRIGGER_ADCSC, ADC_TRIGGER_SOURCE1, ADC_TRIGGER_SOURCE2, ADC_TRIGGER_SOURCE3, ADC_TRIGGER_SOURCE4, ADC_TRIGGER_SOURCE5, ADC_TRIGGER_SOURCE6, ADC_TRIGGER_SOURCE7, and ASSERT.
bool ADC14_setSampleHoldTime |
( |
uint32_t |
firstPulseWidth, |
|
|
uint32_t |
secondPulseWidth |
|
) |
| |
Sets the sample/hold time for the specified memory register range. The duration of time required for a sample differs depending on the user's hardware configuration.
There are two values in the ADCC module. The first value controls ADC memory locations ADC_MEMORY_0 through ADC_MEMORY_7 and ADC_MEMORY_24 through ADC_MEMORY_31, while the second value controls memory locations ADC_MEMORY_8 through ADC_MEMORY_23.
- Parameters
-
firstPulseWidth | Pulse width of the first pulse in ADCCLK cycles Possible values must be one of the following:
- ADC_PULSE_WIDTH_4 [DEFAULT]
- ADC_PULSE_WIDTH_8
- ADC_PULSE_WIDTH_16
- ADC_PULSE_WIDTH_32
- ADC_PULSE_WIDTH_64
- ADC_PULSE_WIDTH_96
- ADC_PULSE_WIDTH_128
- ADC_PULSE_WIDTH_192
|
secondPulseWidth | Pulse width of the second pulse in ADCCLK cycles. Possible values must be one of the following:
- ADC_PULSE_WIDTH_4 [DEFAULT]
- ADC_PULSE_WIDTH_8
- ADC_PULSE_WIDTH_16
- ADC_PULSE_WIDTH_32
- ADC_PULSE_WIDTH_64
- ADC_PULSE_WIDTH_96
- ADC_PULSE_WIDTH_128
- ADC_PULSE_WIDTH_192
|
- Returns
- false if setting fails due to an in progress conversion
References ADC14_CTL0_SHT0__M, ADC14_CTL0_SHT1__M, ADC_PULSE_WIDTH_128, ADC_PULSE_WIDTH_16, ADC_PULSE_WIDTH_192, ADC_PULSE_WIDTH_32, ADC_PULSE_WIDTH_4, ADC_PULSE_WIDTH_64, ADC_PULSE_WIDTH_8, ADC_PULSE_WIDTH_96, and ASSERT.
bool ADC14_configureMultiSequenceMode |
( |
uint32_t |
memoryStart, |
|
|
uint32_t |
memoryEnd, |
|
|
bool |
repeatMode |
|
) |
| |
Configures the ADC module to use a multiple memory sample scheme. This means that multiple samples will consecutively take place and be stored in multiple memory locations. The first sample/conversion will be placed in memoryStart, while the last sample will be stored in memoryEnd. Each memory location should be configured individually using the ADC14_configureConversionMemory function.
The ADC module can be started in "repeat" mode which will cause the ADC module to resume sampling once the initial sample/conversion set is executed. For multi-sample mode, this means that the sampling of the entire memory provided.
- Parameters
-
memoryStart | Memory location to store first sample/conversion value. Possible values include:
- ADC_MEM0 through ADC_MEM31
|
memoryEnd | Memory location to store last sample. Possible values include:
- ADC_MEM0 through ADC_MEM31
|
repeatMode | Specifies whether or not to repeat the conversion/sample cycle after the first round of sample/conversions. Valid values are true or false. |
- Returns
- false if setting fails due to an in progress conversion
References ADC14_CTL0_CONSEQ__1, ADC14_CTL0_CONSEQ__3, ADC14_CTL0_CONSEQ__M, ADC14_CTL1_CSTARTADD__M, ADC_INVALID_MEM, and ASSERT.
bool ADC14_configureSingleSampleMode |
( |
uint32_t |
memoryDestination, |
|
|
bool |
repeatMode |
|
) |
| |
Configures the ADC module to use a a single ADC memory location for sampling/conversion. This is used when only one channel might be needed for conversion, or where using a multiple sampling scheme is not important.
The ADC module can be started in "repeat" mode which will cause the ADC module to resume sampling once the initial sample/conversion set is executed. In single sample mode, this will cause the ADC module to continuously sample into the memory destination provided.
- Parameters
-
memoryDestination | Memory location to store sample/conversion value. Possible values include:
- ADC_MEM0 through ADC_MEM31
|
repeatMode | Specifies whether or not to repeat the conversion/sample cycle after the first round of sample/conversions |
- Returns
- false if setting fails due to an in progress conversion
References ADC14_CTL0_CONSEQ__0, ADC14_CTL0_CONSEQ__2, ADC14_CTL0_CONSEQ__M, ADC14_CTL1_CSTARTADD__M, and ASSERT.
bool ADC14_enableConversion |
( |
void |
| ) |
|
Enables conversion of ADC data. Note that this only enables conversion. To trigger the conversion, you will have to call the ADC14_toggleConversionTrigger or use the source trigger configured in ADC14_setSampleHoldTrigger.
- Returns
- false if setting fails due to an in progress conversion
References ADC14_CTL0_ENC.
void ADC14_disableConversion |
( |
void |
| ) |
|
Halts conversion conversion of the ADC module. Note that the software bit for triggering conversions will also be cleared with this function.
If multi-sequence conversion mode was enabled, the position of the last completed conversion can be retrieved using ADCLastConversionMemoryGet
- Returns
- none
References ADC14_CTL0_ENC, and ADC14_CTL0_SC.
bool ADC14_toggleConversionTrigger |
( |
void |
| ) |
|
Toggles the trigger for conversion of the ADC module by toggling the trigger software bit. Note that this will cause the ADC to start conversion regardless if the software bit was set as the trigger using ADC14_setSampleHoldTrigger.
- Returns
- false if setting fails due to an in progress conversion
bool ADC14_isBusy |
( |
void |
| ) |
|
Returns a boolean value that tells if a conversion/sample is in progress
Originally a public function, but moved to static. External customers should use the ADC14_isBusy function.
- Returns
- true if conversion is active, false otherwise
bool ADC14_configureConversionMemory |
( |
uint32_t |
memorySelect, |
|
|
uint32_t |
refSelect, |
|
|
uint32_t |
channelSelect, |
|
|
bool |
differntialMode |
|
) |
| |
Configures an individual memory location for the ADC module.
- Parameters
-
memorySelect | is the individual ADC memory location to configure. If multiple memory locations want to be configured with the same configuration, this value can be logically ORed together with other values.
- ADC_MEM0 through ADC_MEM31
|
refSelect | is the voltage reference to use for the selected memory spot. Possible values include:
- ADC_VREFPOS_AVCC_VREFNEG_VSS [DEFAULT]
- ADC_VREFPOS_INTBUF_VREFNEG_VSS
- ADC_VREFPOS_EXTPOS_VREFNEG_EXTNEG
- ADC_VREFPOS_EXTBUF_VREFNEG_EXTNEG
|
channelSelect | selects the channel to be used for ADC sampling. Note if differential mode is enabled, the value sampled will be equal to the difference between the corresponding even/odd memory locations. Possible values are:
- ADC_INPUT_A0 through ADC_INPUT_A31
|
differntialMode | selects if the channel selected by the channelSelect will be configured in differential mode. If this parameter is given for false, the configured channel will be paired with its neighbor in differential mode. for example, if channel A0 or A1 is selected, the channel configured will be the difference between A0 and A1. If A2 or A3 are selected, the channel configured will be the difference between A2 and A3 (and so on). Users can enter true or false, or one ofl the following values:
- ADC_NONDIFFERENTIAL_INPUTS
- ADC_DIFFERENTIAL_INPUTS
|
- Returns
- false if setting fails due to an in progress conversion
References ADC14_MCTL_DIF, ADC14_MCTL_INCH__M, and ADC14_MCTL_VRSEL__M.
bool ADC14_enableComparatorWindow |
( |
uint32_t |
memorySelect, |
|
|
uint32_t |
windowSelect |
|
) |
| |
Enables the specified mask of memory channels to use the specified comparator window. THe ADCC module has two different comparator windows that can be set with this function.
- Parameters
-
memorySelect | is the mask of memory locations to enable the comparator window for. This can be a bitwise OR of the following values:
- ADC_MEM0 through ADC_MEM31
|
windowSelect | Memory location to store sample/conversion value. Possible values include: ADCOMP_WINDOW0 [DEFAULT] ADCOMP_WINDOW1 |
- Returns
- false if setting fails due to an in progress conversion
References ADC14_MCTL_WINC, ADC14_MCTL_WINCTH, ADC_COMP_WINDOW0, and ADC_COMP_WINDOW1.
bool ADC14_disableComparatorWindow |
( |
uint32_t |
memorySelect | ) |
|
Disables the comparator window on the specified memory channels
- Parameters
-
memorySelect | is the mask of memory locations to disable the comparator window for. This can be a bitwise OR of the following values:
- ADC_MEM0 through ADC_MEM31
|
- Returns
- false if setting fails due to an in progress conversion
References ADC14_MCTL_WINC.
bool ADC14_setComparatorWindowValue |
( |
uint32_t |
window, |
|
|
int16_t |
low, |
|
|
int16_t |
high |
|
) |
| |
Sets the lower and upper limits of the specified window comparator. Note that this function will truncate values based of the resolution/data format configured. If the ADC is operating in 10-bit mode, and a 12-bit value is passed into this function the most significant 2 bits will be truncated.
The parameters provided to this function for the upper and lower threshold depend on the current resolution for the ADC. For example, if configured in 12-bit mode, a 12-bit resolution is the maximum that can be provided for the window. If in 2's complement mode, Bit 15 is used as the MSB.
- Parameters
-
window | Memory location to store sample/conversion value. Possible values include: ADC_COMP_WINDOW0 [DEFAULT] ADC_COMP_WINDOW1 |
low | is the lower limit of the window comparator |
high | is the upper limit of the window comparator |
- Returns
- false if setting fails due to an in progress conversion
References ADC_COMP_WINDOW0, ADC_COMP_WINDOW1, and ASSERT.
bool ADC14_setResultFormat |
( |
uint32_t |
resultFormat | ) |
|
Switches between a binary unsigned data format and a signed 2's complement data format.
- Parameters
-
resultFormat | Format for result to conversion results. Possible values include: ADC_UNSIGNED_BINARY [DEFAULT] ADC_SIGNED_BINARY |
- Returns
- false if setting fails due to an in progress conversion
References ADC_SIGNED_BINARY, ADC_UNSIGNED_BINARY, and ASSERT.
uint_fast16_t ADC14_getResult |
( |
uint32_t |
memorySelect | ) |
|
Returns the conversion result for the specified memory channel in the format assigned by the ADC14_setResultFormat (unsigned binary by default) function.
- Parameters
-
memorySelect | is the memory location to get the conversion result. Valid values are:
- ADC_MEM0 through ADC_MEM31
|
- Returns
- conversion result of specified memory channel
void ADC14_getMultiSequenceResult |
( |
uint16_t * |
res | ) |
|
Returns the conversion results of the currently configured multi-sequence conversion. If a multi-sequence conversion has not happened, this value is unreliable. Note that it is up to the user to verify the integrity of and proper size of the array being passed. If there are 16 multi-sequence results, and an array with only 4 elements allocated is passed, invalid memory settings will occur
- Parameters
-
res | conversion result of the last multi-sequence sample in an array of unsigned 16-bit integers |
- Returns
- None
References ADC14_CTL1_CSTARTADD__M.
void ADC14_getResultArray |
( |
uint32_t |
memoryStart, |
|
|
uint32_t |
memoryEnd, |
|
|
uint16_t * |
res |
|
) |
| |
Returns the conversion results of the specified ADC memory locations. Note that it is up to the user to verify the integrity of and proper size of the array being passed. If there are 16 multi-sequence results, and an array with only 4 elements allocated is passed, invalid memory settings will occur. This function is inclusive.
- Parameters
-
memoryStart | is the memory location to get the conversion result. Valid values are:
- ADC_MEM0 through ADC_MEM31
|
memoryEnd | is the memory location to get the conversion result. Valid values are:
- ADC_MEM0 through ADC_MEM31
|
res | conversion result of the last multi-sequence sample in an array of unsigned 16-bit integers |
- Returns
- None
References ADC_INVALID_MEM, and ASSERT.
bool ADC14_enableReferenceBurst |
( |
void |
| ) |
|
Enables the "on-demand" activity of the voltage reference register. If this setting is enabled, the internal voltage reference buffer will only be updated during a sample or conversion cycle. This is used to optimize power consumption.
- Returns
- false if setting fails due to an in progress conversion
bool ADC14_disableReferenceBurst |
( |
void |
| ) |
|
Disables the "on-demand" activity of the voltage reference register.
- Returns
- false if setting fails due to an in progress conversion
bool ADC14_setPowerMode |
( |
uint32_t |
powerMode | ) |
|
Sets the power mode of the ADC module. A more aggressive power mode will restrict the number of samples per second for sampling while optimizing power consumption. Ideally, if power consumption is a concern, this value should be set to the most restrictive setting that satisfies your sampling requirement.
- Parameters
-
adcPowerMode | is the power mode to set. Valid values are:
- ADC_UNRESTRICTED_POWER_MODE (no restriction)
- ADC_LOW_POWER_MODE (500ksps restriction)
- ADC_ULTRA_LOW_POWER_MODE (200ksps restriction)
- ADC_EXTREME_LOW_POWER_MODE (50ksps restriction)
|
- Returns
- false if setting fails due to an in progress conversion
References ADC14_CTL1_PWRMD__0, ADC14_CTL1_PWRMD__2, ADC14_CTL1_PWRMD__M, ADC_ULTRA_LOW_POWER_MODE, ADC_UNRESTRICTED_POWER_MODE, and ASSERT.
bool ADC14_enableSampleTimer |
( |
uint32_t |
multiSampleConvert | ) |
|
Enables SAMPCON to be sourced from the sampling timer and to configures multi sample and conversion mode.
- Parameters
-
multiSampleConvert | - Switches between manual and automatic iteration when using the sample timer. Valid values are:
- ADC_MANUAL_ITERATION The user will have to manually set the SHI signal ( usually by ADC14_toggleConversionTrigger ) at the end of each sample/conversion cycle.
- ADC_AUTOMATIC_ITERATION After one sample/convert is finished, the ADC module will automatically continue on to the next sample
|
- Returns
- false if the initialization fails due to an in progress conversion
References ADC_MANUAL_ITERATION.
bool ADC14_disableSampleTimer |
( |
void |
| ) |
|
Disables SAMPCON from being sourced from the sample timer.
- Returns
- false if the initialization fails due to an in progress conversion
void ADC14_enableInterrupt |
( |
uint_fast64_t |
mask | ) |
|
Enables the indicated ADCC interrupt sources. The ADC_INT0 through ADC_INT31 parameters correspond to a completion event of the corresponding memory location. For example, when the ADC_MEM0 location finishes a conversion cycle, the ADC_INT0 interrupt will be set.
- Parameters
-
mask | is the bit mask of interrupts to enable. Valid values are a bitwise OR of the following values:
- ADC_INT0 through ADC_INT31
- ADC_IN_INT - Interrupt enable for a conversion in the result register is either greater than the ADCLO or lower than the ADCHI threshold.
- ADC_LO_INT - Interrupt enable for the falling short of the lower limit interrupt of the window comparator for the result register.
- ADC_HI_INT - Interrupt enable for the exceeding the upper limit of the window comparator for the result register.
- ADC_OV_INT - Interrupt enable for a conversion that is about to save to a memory buffer that has not been read out yet.
- ADC_TOV_INT -Interrupt enable for a conversion that is about to start before the previous conversion has been completed.
- ADC_RDY_INT -Interrupt enable for the local buffered reference ready signal.
|
- Returns
- NONE
void ADC14_disableInterrupt |
( |
uint_fast64_t |
mask | ) |
|
Disables the indicated ADCC interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor. The ADC_INT0 through ADC_INT31 parameters correspond to a completion event of the corresponding memory location. For example, when the ADC_MEM0 location finishes a conversion cycle, the ADC_INT0 interrupt will be set.
- Parameters
-
mask | is the bit mask of interrupts to disable. Valid values are a bitwise OR of the following values:
- ADC_INT0 through ADC_INT31
- ADC_IN_INT - Interrupt enable for a conversion in the result register is either greater than the ADCLO or lower than the ADCHI threshold.
- ADC_LO_INT - Interrupt enable for the falling short of the lower limit interrupt of the window comparator for the result register.
- ADC_HI_INT - Interrupt enable for the exceeding the upper limit of the window comparator for the result register.
- ADC_OV_INT - Interrupt enable for a conversion that is about to save to a memory buffer that has not been read out yet.
- ADC_TOV_INT -Interrupt enable for a conversion that is about to start before the previous conversion has been completed.
- ADC_RDY_INT -Interrupt enable for the local buffered reference ready signal.
|
- Returns
- NONE
uint_fast64_t ADC14_getInterruptStatus |
( |
void |
| ) |
|
Returns the status of a the ADC interrupt register. The ADC_INT0 through ADC_INT31 parameters correspond to a completion event of the corresponding memory location. For example, when the ADC_MEM0 location finishes a conversion cycle, the ADC_INT0 interrupt will be set.
- Returns
- The interrupt status. Value is a bitwise OR of the following values:
- ADC_INT0 through ADC_INT31
- ADC_IN_INT - Interrupt enable for a conversion in the result register is either greater than the ADCLO or lower than the ADCHI threshold.
- ADC_LO_INT - Interrupt enable for the falling short of the lower limit interrupt of the window comparator for the result register.
- ADC_HI_INT - Interrupt enable for the exceeding the upper limit of the window comparator for the result register.
- ADC_OV_INT - Interrupt enable for a conversion that is about to save to a memory buffer that has not been read out yet.
- ADC_TOV_INT -Interrupt enable for a conversion that is about to start before the previous conversion has been completed.
- ADC_RDY_INT -Interrupt enable for the local buffered reference ready signal.
Referenced by ADC14_getEnabledInterruptStatus().
uint_fast64_t ADC14_getEnabledInterruptStatus |
( |
void |
| ) |
|
Returns the status of a the ADC interrupt register masked with the enabled interrupts. This function is useful to call in ISRs to get a list of pending interrupts that are actually enabled and could have caused the ISR. The ADC_INT0 through ADC_INT31 parameters correspond to a completion event of the corresponding memory location. For example, when the ADC_MEM0 location finishes a conversion cycle, the ADC_INT0
- Returns
- The interrupt status. Value is a bitwise OR of the following values:
- ADC_INT0 through ADC_INT31
- ADC_IN_INT - Interrupt enable for a conversion in the result register is either greater than the ADCLO or lower than the ADCHI threshold.
- ADC_LO_INT - Interrupt enable for the falling short of the lower limit interrupt of the window comparator for the result register.
- ADC_HI_INT - Interrupt enable for the exceeding the upper limit of the window comparator for the result register.
- ADC_OV_INT - Interrupt enable for a conversion that is about to save to a memory buffer that has not been read out yet.
- ADC_TOV_INT -Interrupt enable for a conversion that is about to start before the previous conversion has been completed.
- ADC_RDY_INT -Interrupt enable for the local buffered reference ready signal.
References ADC14_getInterruptStatus().
void ADC14_clearInterruptFlag |
( |
uint_fast64_t |
mask | ) |
|
Clears the indicated ADCC interrupt sources.
- Parameters
-
mask | is the bit mask of interrupts to clear. The ADC_INT0 through ADC_INT31 parameters correspond to a completion event of the corresponding memory location. For example, when the ADC_MEM0 location finishes a conversion cycle, the ADC_INT0 interrupt will be set. Valid values are a bitwise OR of the following values:
- ADC_INT0 through ADC_INT31
- ADC_IN_INT - Interrupt enable for a conversion in the result register is either greater than the ADCLO or lower than the ADCHI threshold.
- ADC_LO_INT - Interrupt enable for the falling short of the lower limit interrupt of the window comparator for the result register.
- ADC_HI_INT - Interrupt enable for the exceeding the upper limit of the window comparator for the result register.
- ADC_OV_INT - Interrupt enable for a conversion that is about to save to a memory buffer that has not been read out yet.
- ADC_TOV_INT -Interrupt enable for a conversion that is about to start before the previous conversion has been completed.
- ADC_RDY_INT -Interrupt enable for the local buffered reference ready signal.
|
- Returns
- NONE
void ADC14_registerInterrupt |
( |
void(*)(void) |
intHandler | ) |
|
void ADC14_unregisterInterrupt |
( |
void |
| ) |
|
Unregisters the interrupt handler for the ADCC module.
This function unregisters the handler to be called when an ADCC interrupt occurs. This function also masks off the interrupt in the interrupt controller so that the interrupt handler no longer is called.
- See also
- Interrupt_registerInterrupt() for important information about registering interrupt handlers.
- Returns
- None.
References Interrupt_disableInterrupt(), and Interrupt_unregisterInterrupt().