28 #define DEFAULT_SYNC 0x00
29 #define EUSCI_A_UART_AUTOMATICBAUDRATE_SYNC 0x55
31 #define EUSCI_A_UART_NO_PARITY 0x00
32 #define EUSCI_A_UART_ODD_PARITY 0x01
33 #define EUSCI_A_UART_EVEN_PARITY 0x02
35 #define EUSCI_A_UART_MSB_FIRST EUSCI_A_CTLW0_MSB
36 #define EUSCI_A_UART_LSB_FIRST 0x00
38 #define EUSCI_A_UART_MODE EUSCI_A_CTLW0_MODE_0
39 #define EUSCI_A_UART_IDLE_LINE_MULTI_PROCESSOR_MODE EUSCI_A_CTLW0_MODE_1
40 #define EUSCI_A_UART_ADDRESS_BIT_MULTI_PROCESSOR_MODE EUSCI_A_CTLW0_MODE_2
41 #define EUSCI_A_UART_AUTOMATIC_BAUDRATE_DETECTION_MODE EUSCI_A_CTLW0_MODE_3
43 #define EUSCI_A_UART_CLOCKSOURCE_SMCLK EUSCI_A_CTLW0_SSEL__SMCLK
44 #define EUSCI_A_UART_CLOCKSOURCE_ACLK EUSCI_A_CTLW0_SSEL__ACLK
46 #define EUSCI_A_UART_ONE_STOP_BIT 0x00
47 #define EUSCI_A_UART_TWO_STOP_BITS EUSCI_A_CTLW0_SPB
49 #define EUSCI_A_UART_OVERSAMPLING_BAUDRATE_GENERATION 0x01
50 #define EUSCI_A_UART_LOW_FREQUENCY_BAUDRATE_GENERATION 0x00
52 #define EUSCI_A_UART_RECEIVE_INTERRUPT EUSCI_A_IE_RXIE
53 #define EUSCI_A_UART_TRANSMIT_INTERRUPT EUSCI_A_IE_TXIE
54 #define EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT EUSCI_A_CTLW0_RXEIE
55 #define EUSCI_A_UART_BREAKCHAR_INTERRUPT EUSCI_A_CTLW0_BRKIE
56 #define EUSCI_A_UART_STARTBIT_INTERRUPT EUSCI_A_IE_STTIE
57 #define EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT EUSCI_B_IE_STPIE
59 #define EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG EUSCI_A_IFG_RXIFG
60 #define EUSCI_A_UART_TRANSMIT_INTERRUPT_FLAG EUSCI_A_IFG_TXIFG
61 #define EUSCI_A_UART_STARTBIT_INTERRUPT_FLAG EUSCI_A_IFG_STTIFG
62 #define EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT_FLAG EUSCI_A_IFG_TXCPTIFG
64 #define EUSCI_A_UART_LISTEN_ENABLE EUSCI_A_STATW_LISTEN
65 #define EUSCI_A_UART_FRAMING_ERROR EUSCI_A_STATW_FE
66 #define EUSCI_A_UART_OVERRUN_ERROR EUSCI_A_STATW_OE
67 #define EUSCI_A_UART_PARITY_ERROR EUSCI_A_STATW_PE
68 #define EUSCI_A_UART_BREAK_DETECT EUSCI_A_STATW_BRK
69 #define EUSCI_A_UART_RECEIVE_ERROR EUSCI_A_STATW_RXERR
70 #define EUSCI_A_UART_ADDRESS_RECEIVED EUSCI_A_STATW_ADDR_IDLE
71 #define EUSCI_A_UART_IDLELINE EUSCI_A_STATW_ADDR_IDLE
72 #define EUSCI_A_UART_BUSY EUSCI_A_STATW_BUSY
74 #define EUSCI_A_UART_DEGLITCH_TIME_2ns 0x00
75 #define EUSCI_A_UART_DEGLITCH_TIME_50ns 0x0001
76 #define EUSCI_A_UART_DEGLITCH_TIME_100ns 0x0002
77 #define EUSCI_A_UART_DEGLITCH_TIME_200ns (0x0001 + 0x0002)
202 uint_fast8_t transmitData);
381 uint_fast8_t transmitAddress);
481 uint32_t deglitchTime);
662 void (*intHandler)(
void));
691 #define EUSCI_A_UART_transmitData UART_transmitData
692 #define EUSCI_A_UART_receiveData UART_receiveData
693 #define EUSCI_A_UART_enableInterrupt UART_enableInterrupt
694 #define EUSCI_A_UART_disableInterrupt UART_disableInterrupt
695 #define EUSCI_A_UART_getInterruptStatus UART_getInterruptStatus
696 #define EUSCI_A_UART_clearInterruptFlag UART_clearInterruptFlag
697 #define EUSCI_A_UART_enable UART_enableModule
698 #define EUSCI_A_UART_disable UART_disableModule
699 #define EUSCI_A_UART_queryStatusFlags UART_queryStatusFlags
700 #define EUSCI_A_UART_setDormant UART_setDormant
701 #define EUSCI_A_UART_resetDormant UART_resetDormant
702 #define EUSCI_A_UART_transmitAddress UART_transmitAddress
703 #define EUSCI_A_UART_transmitBreak UART_transmitBreak
704 #define EUSCI_A_UART_getReceiveBufferAddressForDMA UART_getReceiveBufferAddressForDMA
705 #define EUSCI_A_UART_getTransmitBufferAddressForDMA UART_getTransmitBufferAddressForDMA
706 #define EUSCI_A_UART_selectDeglitchTime UART_selectDeglitchTime
void UART_resetDormant(uint32_t moduleInstance)
Definition: uart.c:139
uint_fast8_t UART_queryStatusFlags(uint32_t moduleInstance, uint_fast8_t mask)
Definition: uart.c:119
void UART_disableInterrupt(uint32_t moduleInstance, uint_fast8_t mask)
Definition: uart.c:223
void UART_selectDeglitchTime(uint32_t moduleInstance, uint32_t deglitchTime)
Definition: uart.c:183
void UART_transmitData(uint32_t moduleInstance, uint_fast8_t transmitData)
Definition: uart.c:87
bool UART_initModule(uint32_t moduleInstance, const eUSCI_UART_Config *config)
Definition: uart.c:6
uint_fast8_t overSampling
Definition: uart.h:101
void UART_unregisterInterrupt(uint32_t moduleInstance)
Definition: uart.c:333
uint_fast8_t parity
Definition: uart.h:97
uint_fast8_t UART_getInterruptStatus(uint32_t moduleInstance, uint8_t mask)
Definition: uart.c:248
uint_fast16_t uartMode
Definition: uart.h:100
uint_fast8_t secondModReg
Definition: uart.h:96
uint32_t UART_getReceiveBufferAddressForDMA(uint32_t moduleInstance)
Definition: uart.c:173
uint8_t UART_receiveData(uint32_t moduleInstance)
Definition: uart.c:97
uint_fast8_t selectClockSource
Definition: uart.h:93
void UART_enableInterrupt(uint32_t moduleInstance, uint_fast8_t mask)
Definition: uart.c:197
void UART_transmitBreak(uint32_t moduleInstance)
Definition: uart.c:153
void UART_clearInterruptFlag(uint32_t moduleInstance, uint_fast8_t mask)
Definition: uart.c:291
uint_fast16_t msborLsbFirst
Definition: uart.h:98
uint32_t UART_getTransmitBufferAddressForDMA(uint32_t moduleInstance)
Definition: uart.c:178
uint_fast8_t firstModReg
Definition: uart.h:95
void UART_transmitAddress(uint32_t moduleInstance, uint_fast8_t transmitAddress)
Definition: uart.c:144
uint_fast8_t UART_getEnabledInterruptStatus(uint32_t moduleInstance)
Definition: uart.c:260
void UART_setDormant(uint32_t moduleInstance)
Definition: uart.c:134
void UART_enableModule(uint32_t moduleInstance)
Definition: uart.c:107
void UART_registerInterrupt(uint32_t moduleInstance, void(*intHandler)(void))
Definition: uart.c:304
uint_fast16_t numberofStopBits
Definition: uart.h:99
Type definition for _eUSCI_UART_Config structure.
Definition: uart.h:91
uint_fast16_t clockPrescalar
Definition: uart.h:94
struct _eUSCI_eUSCI_UART_Config eUSCI_UART_Config
void UART_disableModule(uint32_t moduleInstance)
Definition: uart.c:113