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Defines | |
#define | __MSP430_HAS_SFR__ |
#define | __MSP430_HAS_UCS__ |
#define | UCS_ACLK 0x01 |
#define | UCS_MCLK 0x02 |
#define | UCS_SMCLK 0x04 |
#define | UCS_FLLREF 0x08 |
#define | UCS_MODOSC MODOSCREQEN |
#define | UCS_XT1CLK_SELECT SELM__XT1CLK |
#define | UCS_VLOCLK_SELECT SELM__VLOCLK |
#define | UCS_REFOCLK_SELECT SELM__REFOCLK |
#define | UCS_DCOCLK_SELECT SELM__DCOCLK |
#define | UCS_DCOCLKDIV_SELECT SELM__DCOCLKDIV |
#define | UCS_XT2CLK_SELECT SELM__XT2CLK |
#define | UCS_CLOCK_DIVIDER_1 DIVM__1 |
#define | UCS_CLOCK_DIVIDER_2 DIVM__2 |
#define | UCS_CLOCK_DIVIDER_4 DIVM__4 |
#define | UCS_CLOCK_DIVIDER_8 DIVM__8 |
#define | UCS_CLOCK_DIVIDER_12 DIVM__32 |
#define | UCS_CLOCK_DIVIDER_16 DIVM__16 |
#define | UCS_CLOCK_DIVIDER_32 DIVM__32 |
#define | UCS_XT1_DRIVE0 XT1DRIVE_0 |
#define | UCS_XT1_DRIVE1 XT1DRIVE_1 |
#define | UCS_XT1_DRIVE2 XT1DRIVE_2 |
#define | UCS_XT1_DRIVE3 XT1DRIVE_3 |
#define | UCS_XT1_HIGH_FREQUENCY XTS |
#define | UCS_XT1_LOW_FREQUENCY 0x00 |
#define | UCS_XT2DRIVE_4MHZ_8MHZ XT2DRIVE_0 |
#define | UCS_XT2DRIVE_8MHZ_16MHZ XT2DRIVE_1 |
#define | UCS_XT2DRIVE_16MHZ_24MHZ XT2DRIVE_2 |
#define | UCS_XT2DRIVE_24MHZ_32MHZ XT2DRIVE_3 |
#define | UCS_XT2OFFG XT2OFFG |
#define | UCS_XT1HFOFFG XT1HFOFFG |
#define | UCS_XT1LFOFFG XT1LFOFFG |
#define | UCS_DCOFFG DCOFFG |
#define | UCS_XCAP_0 XCAP_0 |
#define | UCS_XCAP_1 XCAP_1 |
#define | UCS_XCAP_2 XCAP_2 |
#define | UCS_XCAP_3 XCAP_3 |
#define | UCS_VLOCLK_FREQUENCY 10000 |
#define | UCS_REFOCLK_FREQUENCY 32768 |
Functions | |
void | UCS_setExternalClockSource (unsigned int baseaddress, unsigned long XT1CLK_frequency, unsigned long XT2CLK_frequency) |
void | UCS_clockSignalInit (unsigned int baseaddress, unsigned char selectedClockSignal, unsigned int clockSource, unsigned char clockSourceDivider) |
void | UCS_LFXT1Start (unsigned int baseAddress, unsigned int xt1drive, unsigned char xcap) |
void | UCS_HFXT1Start (unsigned int baseAddress, unsigned int xt1drive) |
void | UCS_bypassXT1 (unsigned int baseAddress, unsigned char highOrLowFrequency) |
unsigned short | UCS_bypassXT1WithTimeout (unsigned int baseAddress, unsigned char highOrLowFrequency, unsigned int timeout) |
void | UCS_XT1Off (unsigned int baseAddress) |
unsigned short | UCS_LFXT1StartWithTimeout (unsigned int baseAddress, unsigned int xt1drive, unsigned char xcap, unsigned int timeout) |
unsigned short | UCS_HFXT1StartWithTimeout (unsigned int baseAddress, unsigned int xt1drive, unsigned int timeout) |
void | UCS_XT2Start (unsigned int baseAddress, unsigned int xt2drive) |
void | UCS_bypassXT2 (unsigned int baseAddress) |
unsigned short | UCS_XT2StartWithTimeout (unsigned int baseAddress, unsigned int xt2drive, unsigned int timeout) |
unsigned short | UCS_bypassXT2WithTimeout (unsigned int baseAddress, unsigned int timeout) |
void | UCS_XT2Off (unsigned int baseAddress) |
void | UCS_initFLL (unsigned int baseAddress, unsigned int fsystem, unsigned int ratio) |
void | UCS_initFLLSettle (unsigned int baseAddress, unsigned int fsystem, unsigned int ratio) |
void | UCS_enableClockRequest (unsigned int baseAddress, unsigned char selectClock) |
void | UCS_disableClockRequest (unsigned int baseAddress, unsigned char selectClock) |
unsigned char | UCS_faultFlagStatus (unsigned int baseAddress, unsigned char mask) |
void | UCS_clearFaultFlag (unsigned int baseAddress, unsigned char mask) |
void | UCS_SMCLKOff (unsigned int baseAddress) |
void | UCS_SMCLKOn (unsigned int baseAddress) |
unsigned long | UCS_getACLK (unsigned int baseAddress) |
unsigned long | UCS_getSMCLK (unsigned int baseAddress) |
unsigned long | UCS_getMCLK (unsigned int baseAddress) |
unsigned int | UCS_clearAllOscFlagsWithTimeout (unsigned int baseAddress, unsigned int timeout) |
#define __MSP430_HAS_SFR__ |
#define __MSP430_HAS_UCS__ |
#define UCS_ACLK 0x01 |
Referenced by UCS_clockSignalInit().
#define UCS_MCLK 0x02 |
Referenced by UCS_clockSignalInit().
#define UCS_SMCLK 0x04 |
Referenced by UCS_clockSignalInit().
#define UCS_FLLREF 0x08 |
Referenced by UCS_clockSignalInit().
#define UCS_MODOSC MODOSCREQEN |
#define UCS_XT1CLK_SELECT SELM__XT1CLK |
Referenced by UCS_clockSignalInit().
#define UCS_VLOCLK_SELECT SELM__VLOCLK |
Referenced by UCS_clockSignalInit().
#define UCS_REFOCLK_SELECT SELM__REFOCLK |
Referenced by UCS_clockSignalInit().
#define UCS_DCOCLK_SELECT SELM__DCOCLK |
Referenced by UCS_clockSignalInit().
#define UCS_DCOCLKDIV_SELECT SELM__DCOCLKDIV |
Referenced by UCS_clockSignalInit().
#define UCS_XT2CLK_SELECT SELM__XT2CLK |
Referenced by UCS_clockSignalInit().
#define UCS_CLOCK_DIVIDER_1 DIVM__1 |
Referenced by UCS_clockSignalInit().
#define UCS_CLOCK_DIVIDER_2 DIVM__2 |
Referenced by UCS_clockSignalInit().
#define UCS_CLOCK_DIVIDER_4 DIVM__4 |
Referenced by UCS_clockSignalInit().
#define UCS_CLOCK_DIVIDER_8 DIVM__8 |
Referenced by UCS_clockSignalInit().
#define UCS_CLOCK_DIVIDER_12 DIVM__32 |
Referenced by UCS_clockSignalInit().
#define UCS_CLOCK_DIVIDER_16 DIVM__16 |
Referenced by UCS_clockSignalInit().
#define UCS_CLOCK_DIVIDER_32 DIVM__32 |
Referenced by UCS_clockSignalInit().
#define UCS_XT1_DRIVE0 XT1DRIVE_0 |
Referenced by UCS_HFXT1StartWithTimeout(), UCS_LFXT1Start(), and UCS_LFXT1StartWithTimeout().
#define UCS_XT1_DRIVE1 XT1DRIVE_1 |
Referenced by UCS_HFXT1StartWithTimeout(), UCS_LFXT1Start(), and UCS_LFXT1StartWithTimeout().
#define UCS_XT1_DRIVE2 XT1DRIVE_2 |
Referenced by UCS_HFXT1StartWithTimeout(), UCS_LFXT1Start(), and UCS_LFXT1StartWithTimeout().
#define UCS_XT1_DRIVE3 XT1DRIVE_3 |
Referenced by UCS_HFXT1StartWithTimeout(), UCS_LFXT1Start(), and UCS_LFXT1StartWithTimeout().
#define UCS_XT1_HIGH_FREQUENCY XTS |
Referenced by UCS_bypassXT1(), and UCS_bypassXT1WithTimeout().
#define UCS_XT1_LOW_FREQUENCY 0x00 |
Referenced by UCS_bypassXT1(), and UCS_bypassXT1WithTimeout().
#define UCS_XT2DRIVE_4MHZ_8MHZ XT2DRIVE_0 |
#define UCS_XT2DRIVE_8MHZ_16MHZ XT2DRIVE_1 |
#define UCS_XT2DRIVE_16MHZ_24MHZ XT2DRIVE_2 |
#define UCS_XT2DRIVE_24MHZ_32MHZ XT2DRIVE_3 |
#define UCS_XT2OFFG XT2OFFG |
Referenced by UCS_clearFaultFlag(), and UCS_faultFlagStatus().
#define UCS_XT1HFOFFG XT1HFOFFG |
#define UCS_XT1LFOFFG XT1LFOFFG |
#define UCS_DCOFFG DCOFFG |
#define UCS_XCAP_0 XCAP_0 |
Referenced by UCS_LFXT1Start(), and UCS_LFXT1StartWithTimeout().
#define UCS_XCAP_1 XCAP_1 |
Referenced by UCS_LFXT1Start(), and UCS_LFXT1StartWithTimeout().
#define UCS_XCAP_2 XCAP_2 |
Referenced by UCS_LFXT1Start(), and UCS_LFXT1StartWithTimeout().
#define UCS_XCAP_3 XCAP_3 |
Referenced by UCS_LFXT1Start(), and UCS_LFXT1StartWithTimeout().
#define UCS_VLOCLK_FREQUENCY 10000 |
Referenced by privateUCSComputeCLKFrequency().
#define UCS_REFOCLK_FREQUENCY 32768 |
Referenced by privateUCSComputeCLKFrequency(), and privateUCSSourceClockFromDCO().
void UCS_setExternalClockSource | ( | unsigned int | baseaddress, |
unsigned long | XT1CLK_frequency, | ||
unsigned long | XT2CLK_frequency | ||
) |
This function sets the external clock sources XT1 and XT2 crystal oscillator frequency values. This function must be called if an external crystal XT1 or XT2 is used and the user intends to call UCS_getMCLK, UCS_getSMCLK or UCS_getACLK APIs. If not, it is not necessary to invoke this API.
baseAddress | is the base address of the UCS module. |
XT1CLK_frequency | is the XT1 crystal frequencies in Hz |
XT2CLK_frequency | is the XT2 crystal frequencies in Hz |
References UCS_XT1ClockFrequency, and UCS_XT2ClockFrequency.
void UCS_clockSignalInit | ( | unsigned int | baseaddress, |
unsigned char | selectedClockSignal, | ||
unsigned int | clockSource, | ||
unsigned char | clockSourceDivider | ||
) |
This function initializes each of the clock signals. The user must ensure that this function is called for each clock signal. If not, the default state is assumed for the particular clock signal. Refer MSP430ware documentation for UCS module or Device Family User's Guide for details of default clock signal states
baseAddress | is the base address of the UCS module. |
selectedClockSignal | - Valid values are UCS_ACLK, UCS_MCLK, UCS_SMCLK, UCS_FLLREF |
clockSource | is Clock source for the selectedClock Signal Valid values are UCS_XT1CLK_SELECT, UCS_VLOCLK_SELECT, UCS_REFOCLK_SELECT, UCS_DCOCLK_SELECT, UCS_DCOCLKDIV_SELECT UCS_XT2CLK_SELECT |
clockSourceDivider | - selected the clock divider to calculate clocksignal from clock source. Valid values are UCS_CLOCK_DIVIDER_1 [Default Value], UCS_CLOCK_DIVIDER_2, UCS_CLOCK_DIVIDER_4, UCS_CLOCK_DIVIDER_8, UCS_CLOCK_DIVIDER_12, [Valid ONLY for UCS_FLLREF] UCS_CLOCK_DIVIDER_16, UCS_CLOCK_DIVIDER_32 [Not valid for UCS_FLLREF] |
Modified registers are UCSCTL4, UCSCTL5, UCSCTL3 Note that the dividers for UCS_FLLREF are different from the available clock dividers.
References ASSERT, HWREG, HWREGB, UCS_ACLK, UCS_CLOCK_DIVIDER_1, UCS_CLOCK_DIVIDER_12, UCS_CLOCK_DIVIDER_16, UCS_CLOCK_DIVIDER_2, UCS_CLOCK_DIVIDER_32, UCS_CLOCK_DIVIDER_4, UCS_CLOCK_DIVIDER_8, UCS_DCOCLK_SELECT, UCS_DCOCLKDIV_SELECT, UCS_FLLREF, UCS_MCLK, UCS_REFOCLK_SELECT, UCS_SMCLK, UCS_VLOCLK_SELECT, UCS_XT1CLK_SELECT, and UCS_XT2CLK_SELECT.
void UCS_LFXT1Start | ( | unsigned int | baseAddress, |
unsigned int | xt1drive, | ||
unsigned char | xcap | ||
) |
Initializes the XT1 crystal oscillator in low frequency mode. Loops until all oscillator fault flags are cleared, with no timeout. See the device-specific data sheet for appropriate drive settings.
baseAddress | is the base address of the UCS module. |
xt1drive | is the target drive strength for the XT1 crystal oscillator. Valid values are UCS_XT1_DRIVE0, UCS_XT1_DRIVE1, UCS_XT1_DRIVE2, UCS_XT1_DRIVE3 [Default value]. Modified bits are XT1DRIVE of UCSCTL6 register. |
xcap | is the selected capactor value. Valid values are: UCS_XCAP_0, UCS_XCAP_1, UCS_XCAP_2 UCS_XCAP_3 [Default value] This parameter selects the capacitors applied to the LF crystal (XT1) or resonator in the LF mode. The effective capacitance (seen by the crystal) is Ceff . (CXIN + 2 pF)/2. It is assumed that CXIN = CXOUT and that a parasitic capacitance of 2 pF is added by the package and the printed circuit board. For details about the typical internal and the effective capacitors, refer to the device-specific data sheet. |
Modified bits are XCAP of UCSCTL6 register.
References ASSERT, HWREG, HWREGB, SFR_BASEADDRESS, UCS_XCAP_0, UCS_XCAP_1, UCS_XCAP_2, UCS_XCAP_3, UCS_XT1_DRIVE0, UCS_XT1_DRIVE1, UCS_XT1_DRIVE2, and UCS_XT1_DRIVE3.
void UCS_HFXT1Start | ( | unsigned int | baseAddress, |
unsigned int | xt1drive | ||
) |
Initializes the XT1 crystal oscillator in high frequency mode. Loops until all oscillator fault flags are cleared, with no timeout. See the device-specific data sheet for appropriate drive settings.
baseAddress | is the base address of the UCS module. |
xt1drive | is the target drive strength for the XT1 crystal oscillator. Valid values are UCS_XT1_DRIVE0 , UCS_XT1_DRIVE1, UCS_XT1_DRIVE2 , UCS_XT1_DRIVE3[Default Value] |
Modified registers are UCSCTL6, UCSCTL7, SFRIFG
References HWREG, HWREGB, and SFR_BASEADDRESS.
void UCS_bypassXT1 | ( | unsigned int | baseAddress, |
unsigned char | highOrLowFrequency | ||
) |
Bypasses the XT1 crystal oscillator. Loops until all oscillator fault flags are cleared, with no timeout.
baseAddress | is the base address of the UCS module. |
highOrLowFrequency | selects high frequency or low frequency mode for XT1. Valid values are UCS_XT1_HIGH_FREQUENCY, UCS_XT1_LOW_FREQUENCY [Default Value] |
Modified registers are UCSCTL6, UCSCTL7, SFRIFG
References ASSERT, HWREG, HWREGB, SFR_BASEADDRESS, UCS_XT1_HIGH_FREQUENCY, and UCS_XT1_LOW_FREQUENCY.
unsigned short UCS_bypassXT1WithTimeout | ( | unsigned int | baseAddress, |
unsigned char | highOrLowFrequency, | ||
unsigned int | timeout | ||
) |
Bypasses the XT1 crystal oscillator with time out. Loops until all oscillator fault flags are cleared or until a timeout counter is decremented and equals to zero.
baseAddress | is the base address of the UCS module. |
highOrLowFrequency | selects high frequency or low frequency mode for XT1. Valid values are UCS_XT1_HIGH_FREQUENCY, UCS_XT1_LOW_FREQUENCY [Default Value] |
timeout | is the count value that gets decremented every time the loop that clears oscillator fault flags gets executed. |
Modified registers are UCSCTL6, UCSCTL7, SFRIFG
References ASSERT, HWREG, HWREGB, SFR_BASEADDRESS, STATUS_FAIL, STATUS_SUCCESS, UCS_XT1_HIGH_FREQUENCY, and UCS_XT1_LOW_FREQUENCY.
void UCS_XT1Off | ( | unsigned int | baseAddress | ) |
Stops the XT1 oscillator using the XT1OFF bit.
baseAddress | is the base address of the UCS module. |
References HWREG.
unsigned short UCS_LFXT1StartWithTimeout | ( | unsigned int | baseAddress, |
unsigned int | xt1drive, | ||
unsigned char | xcap, | ||
unsigned int | timeout | ||
) |
Initializes the XT1 crystal oscillator in low frequency mode with timeout. Loops until all oscillator fault flags are cleared or until a timeout counter is decremented and equals to zero. See the device-specific datasheet for appropriate drive settings.
baseAddress | is the base address of the UCS module. |
xt1drive | is the target drive strength for the XT1 crystal oscillator. Valid values are UCS_XT1_DRIVE0, UCS_XT1_DRIVE1, UCS_XT1_DRIVE2, UCS_XT1_DRIVE3[Default Value] |
xcap | is the selected capactor value. Valid values are: UCS_XCAP_0, UCS_XCAP_1, UCS_XCAP_2, UCS_XCAP_3[Default Value] This parameter selects the capacitors applied to the LF crystal (XT1) or resonator in the LF mode. The effective capacitance (seen by the crystal) is Ceff . (CXIN + 2 pF)/2. It is assumed that CXIN = CXOUT and that a parasitic capacitance of 2 pF is added by the package and the printed circuit board. For details about the typical internal and the effective capacitors, refer to the device-specific data sheet. |
timeout | is the count value that gets decremented every time the loop that clears oscillator fault flags gets executed. |
Modified registers are UCSCTL6, UCSCTL7, SFRIFG
References ASSERT, HWREG, HWREGB, SFR_BASEADDRESS, STATUS_FAIL, STATUS_SUCCESS, UCS_XCAP_0, UCS_XCAP_1, UCS_XCAP_2, UCS_XCAP_3, UCS_XT1_DRIVE0, UCS_XT1_DRIVE1, UCS_XT1_DRIVE2, and UCS_XT1_DRIVE3.
unsigned short UCS_HFXT1StartWithTimeout | ( | unsigned int | baseAddress, |
unsigned int | xt1drive, | ||
unsigned int | timeout | ||
) |
Initializes the XT1 crystal oscillator in high freqquency mode with timeout. Loops until all oscillator fault flags are cleared or until a timeout counter is decremented and equals to zero. See the device-specific data sheet for appropriate drive settings.
baseAddress | is the base address of the UCS module. |
xt1drive | is the target drive strength for the XT1 crystal oscillator. Valid values are UCS_XT1_DRIVE0, UCS_XT1_DRIVE1, UCS_XT1_DRIVE2, UCS_XT1_DRIVE3 [Default Value] |
timeout | is the count value that gets decremented every time the loop that clears oscillator fault flags gets executed. |
Modified registers are UCSCTL6, UCSCTL7, SFRIFG
References ASSERT, HWREG, HWREGB, SFR_BASEADDRESS, STATUS_FAIL, STATUS_SUCCESS, UCS_XT1_DRIVE0, UCS_XT1_DRIVE1, UCS_XT1_DRIVE2, and UCS_XT1_DRIVE3.
void UCS_XT2Start | ( | unsigned int | baseAddress, |
unsigned int | xt2drive | ||
) |
Initializes the XT2 crystal oscillator, which supports crystal frequencies between 4 MHz and 32 MHz, depending on the selected drive strength. Loops until all oscillator fault flags are cleared, with no timeout. See the device-specific data sheet for appropriate drive settings.
baseAddress | is the base address of the UCS module. |
xt2drive | is the target drive strength for the XT2 crystal oscillator. Valid values are UCS_XT2DRIVE_4MHZ_8MHZ, UCS_XT2DRIVE_8MHZ_16MHZ, UCS_XT2DRIVE_16MHZ_24MHZ, UCS_XT2DRIVE_24MHZ_32MHZ [Default Value] |
Modified registers are UCSCTL6, UCSCTL7, SFRIFG
References HWREG, HWREGB, and SFR_BASEADDRESS.
void UCS_bypassXT2 | ( | unsigned int | baseAddress | ) |
Bypasses the XT2 crystal oscillator, which supports crystal frequencies between 4 MHz and 32 MHz. Loops until all oscillator fault flags are cleared, with no timeout.
baseAddress | is the base address of the UCS module. |
Modified registers are UCSCTL6, UCSCTL7, SFRIFG
References HWREG, HWREGB, and SFR_BASEADDRESS.
unsigned short UCS_XT2StartWithTimeout | ( | unsigned int | baseAddress, |
unsigned int | xt2drive, | ||
unsigned int | timeout | ||
) |
Initializes the XT2 crystal oscillator, which supports crystal frequencies between 4 MHz and 32 MHz, depending on the selected drive strength. Loops until all oscillator fault flags are cleared or until a timeout counter is decremented and equals to zero. See the device-specific data sheet for appropriate drive settings.
baseAddress | is the base address of the UCS module. |
xt2drive | is the target drive strength for the XT2 crystal oscillator. Valid values are UCS_XT2_4MHZ_8MHZ, UCS_XT2_8MHZ_16MHZ, UCS_XT2_16MHZ_24MHZ UCS_XT2_24MHZ_32MHZ [Default Value] |
timeout | is the count value that gets decremented every time the loop that clears oscillator fault flags gets executed. |
Modified registers are UCSCTL6, UCSCTL7, SFRIFG
References HWREG, HWREGB, SFR_BASEADDRESS, STATUS_FAIL, and STATUS_SUCCESS.
unsigned short UCS_bypassXT2WithTimeout | ( | unsigned int | baseAddress, |
unsigned int | timeout | ||
) |
Bypasses the XT2 crystal oscillator, which supports crystal frequencies between 4 MHz and 32 MHz. Loops until all oscillator fault flags are cleared or until a timeout counter is decremented and equals to zero.
baseAddress | is the base address of the UCS module. |
timeout | is the count value that gets decremented every time the loop that clears oscillator fault flags gets executed. |
Modified registers are UCSCTL6, UCSCTL7, SFRIFG
References HWREG, HWREGB, SFR_BASEADDRESS, STATUS_FAIL, and STATUS_SUCCESS.
void UCS_XT2Off | ( | unsigned int | baseAddress | ) |
Stops the XT2 oscillator using the XT2OFF bit.
baseAddress | is the base address of the UCS module. |
Modified registers are UCSCTL6
References HWREG.
void UCS_initFLL | ( | unsigned int | baseAddress, |
unsigned int | fsystem, | ||
unsigned int | ratio | ||
) |
Initializes the DCO to operate a frequency that is a multiple of the reference frequency into the FLL. Loops until all oscillator fault flags are cleared, with no timeout. If the frequency is greater than 16 MHz, the function sets the MCLK and SMCLK source to the undivided DCO frequency. Otherwise, the function sets the MCLK and SMCLK source to the DCOCLKDIV frequency.
baseAddress | is the base address of the UCS module. |
fsystem | is the target frequency for MCLK in kHz |
ratio | is the ratio x/y, where x = fsystem and y = FLL reference frequency. |
Modified registers are UCSCTL0, UCSCTL1, UCSCTL2, UCSCTL4, UCSCTL7, SFRIFG1
References HWREG, HWREGB, and SFR_BASEADDRESS.
Referenced by UCS_initFLLSettle().
void UCS_initFLLSettle | ( | unsigned int | baseAddress, |
unsigned int | fsystem, | ||
unsigned int | ratio | ||
) |
Initializes the DCO to operate a frequency that is a multiple of the reference frequency into the FLL. Loops until all oscillator fault flags are cleared, with a timeout. If the frequency is greater than 16 MHz, the function sets the MCLK and SMCLK source to the undivided DCO frequency. Otherwise, the function sets the MCLK and SMCLK source to the DCOCLKDIV frequency. This function executes a software delay that is proportional in length to the ratio of the target FLL frequency and the FLL reference.
baseAddress | is the base address of the UCS module. |
fsystem | is the target frequency for MCLK in kHz |
ratio | is the ratio x/y, where x = fsystem and y = FLL reference frequency. |
Modified registers are UCSCTL0, UCSCTL1, UCSCTL2, UCSCTL4, UCSCTL7, SFRIFG1
References UCS_initFLL().
void UCS_enableClockRequest | ( | unsigned int | baseAddress, |
unsigned char | selectClock | ||
) |
Enables conditional module requests
baseAddress | is the base address of the UCS module. |
selectClock | selects specific request enables. Valid values are UCS_ACLK, UCS_SMCLK, UCS_MCLK, UCS_MODOSC |
Modified registers are UCSCTL8
References HWREGB.
void UCS_disableClockRequest | ( | unsigned int | baseAddress, |
unsigned char | selectClock | ||
) |
Disables conditional module requests
baseAddress | is the base address of the UCS module. |
selectClock | selects specific request enables. Valid values are UCS_ACLK, UCS_SMCLK, UCS_MCLK, UCS_MODOSC |
Modified registers are UCSCTL8
References HWREGB.
unsigned char UCS_faultFlagStatus | ( | unsigned int | baseAddress, |
unsigned char | mask | ||
) |
Gets the current UCS fault flag status.
baseAddress | is the base address of the UCS module. |
mask | is the masked interrupt flag status to be returned. Mask parameter can be either any of the following selection.
|
Modified registers are UCSCTL7
References ASSERT, HWREGB, and UCS_XT2OFFG.
void UCS_clearFaultFlag | ( | unsigned int | baseAddress, |
unsigned char | mask | ||
) |
Clears the current UCS fault flag status for the masked bit.
baseAddress | is the base address of the UCS module. |
mask | is the masked interrupt flag status to be returned. mask parameter can be any one of the following
|
Modified registers are UCSCTL7
References ASSERT, HWREGB, and UCS_XT2OFFG.
void UCS_SMCLKOff | ( | unsigned int | baseAddress | ) |
Turns off SMCLK using the SMCLKOFF bit
baseAddress | is the base address of the UCS module. |
Modified registers are UCSCTL6
References HWREG.
void UCS_SMCLKOn | ( | unsigned int | baseAddress | ) |
Turns ON SMCLK using the SMCLKOFF bit
baseAddress | is the base address of the UCS module. |
Modified registers are UCSCTL6
References HWREG.
unsigned long UCS_getACLK | ( | unsigned int | baseAddress | ) |
Get the current ACLK frequency. The user of this API must ensure that UCS_externalClockSourceInit API was invoked before in case XT1 or XT2 is being used.
baseAddress | is the base address of the UCS module. |
References HWREG, and privateUCSComputeCLKFrequency().
unsigned long UCS_getSMCLK | ( | unsigned int | baseAddress | ) |
Get the current SMCLK frequency. The user of this API must ensure that UCS_externalClockSourceInit API was invoked before in case XT1 or XT2 is being used.
baseAddress | is the base address of the UCS module. |
References HWREG, HWREGB, and privateUCSComputeCLKFrequency().
unsigned long UCS_getMCLK | ( | unsigned int | baseAddress | ) |
Get the current MCLK frequency. The user of this API must ensure that UCS_externalClockSourceInit API was invoked before in case XT1 or XT2 is being used.
baseAddress | is the base address of the UCS module. |
References HWREG, and privateUCSComputeCLKFrequency().
unsigned int UCS_clearAllOscFlagsWithTimeout | ( | unsigned int | baseAddress, |
unsigned int | timeout | ||
) |
Clears all the Oscillator Flags
baseAddress | is the base address of the UCS module. |
timeout | is the count value that gets decremented every time the loop that clears oscillator fault flags gets executed. |
References HWREGB, and SFR_BASEADDRESS.