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Defines | |
| #define | __MSP430_HAS_USCI_Ax__ |
| #define | UART_NO_PARITY 0x00 |
| #define | UART_ODD_PARITY 0x01 |
| #define | UART_EVEN_PARITY 0x02 |
| #define | UART_CLOCKSOURCE_ACLK UCSSEL__ACLK |
| #define | UART_CLOCKSOURCE_SMCLK UCSSEL__SMCLK |
| #define | UART_ONE_STOP_BIT 0x00 |
| #define | UART_TWO_STOP_BITS UCSPB |
| #define | UART_MSB_FIRST UCMSB |
| #define | UART_LSB_FIRST 0x00 |
| #define | UART_RECEIVE_INTERRUPT_FLAG UCRXIFG |
| #define | UART_TRANSMIT_INTERRUPT_FLAG UCTXIFG |
| #define | UART_RECEIVE_INTERRUPT UCRXIE |
| #define | UART_TRANSMIT_INTERRUPT UCTXIE |
| #define | UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT UCRXEIE |
| #define | UART_BREAKCHAR_INTERRUPT UCBRKIE |
| #define | UART_LISTEN_ENABLE UCLISTEN |
| #define | UART_FRAMING_ERROR UCFE |
| #define | UART_OVERRUN_ERROR UCOE |
| #define | UART_PARITY_ERROR UCPE |
| #define | UARTBREAK_DETECT UCBRK |
| #define | UART_RECEIVE_ERROR UCRXERR |
| #define | UART_ADDRESS_RECEIVED UCADDR |
| #define | UART_IDLELINE UCIDLE |
| #define | UART_BUSY UCBUSY |
| #define | UART_MODE UCMODE_0 |
| #define | UART_IDLE_LINE_MULTI_PROCESSOR_MODE UCMODE_1 |
| #define | UART_ADDRESS_BIT_MULTI_PROCESSOR_MODE UCMODE_2 |
| #define | UART_AUTOMATIC_BAUDRATE_DETECTION_MODE UCMODE_3 |
| #define | UART_OVERSAMPLING_BAUDRATE_GENERATION 0x01 |
| #define | UART_LOW_FREQUENCY_BAUDRATE_GENERATION 0x00 |
| #define | DEFAULT_SYNC 0x00 |
| #define | UART_AUTOMATICBAUDRATE_SYNC 0x55 |
Functions | |
| unsigned short | UART_init (unsigned int baseAddress, unsigned char selectClockSource, unsigned long clockSourceFrequency, unsigned long desiredUartBaudRate, unsigned char parity, unsigned char msborLsbFirst, unsigned char numberofStopBits, unsigned char uartMode, unsigned short overSampling) |
| unsigned short | UART_initAdvance (unsigned int baseAddress, unsigned char selectClockSource, unsigned int clockPrescalar, unsigned char firstModReg, unsigned char secondModReg, unsigned char parity, unsigned char msborLsbFirst, unsigned char numberofStopBits, unsigned char uartMode, unsigned short overSampling) |
| void | UART_transmitData (unsigned int baseAddress, unsigned char transmitData) |
| unsigned char | UART_receiveData (unsigned int baseAddress) |
| void | UART_enableInterrupt (unsigned int baseAddress, unsigned char mask) |
| void | UART_disableInterrupt (unsigned int baseAddress, unsigned char mask) |
| unsigned char | UART_getInterruptStatus (unsigned int baseAddress, unsigned char mask) |
| void | UART_clearInterruptFlag (unsigned int baseAddress, unsigned char mask) |
| void | UART_enable (unsigned int baseAddress) |
| void | UART_disable (unsigned int baseAddress) |
| unsigned char | UART_queryStatusFlags (unsigned int baseAddress, unsigned char mask) |
| void | UART_setDormant (unsigned int baseAddress) |
| void | UART_resetDormant (unsigned int baseAddress) |
| void | UART_transmitAddress (unsigned int baseAddress, unsigned char transmitAddress) |
| void | UART_transmitBreak (unsigned int baseAddress) |
| unsigned long | UART_getReceiveBufferAddressForDMA (unsigned int baseAddress) |
| unsigned long | UART_getTransmitBufferAddressForDMA (unsigned int baseAddress) |
| #define __MSP430_HAS_USCI_Ax__ |
| #define UART_NO_PARITY 0x00 |
Referenced by UART_init(), and UART_initAdvance().
| #define UART_ODD_PARITY 0x01 |
Referenced by UART_init(), and UART_initAdvance().
| #define UART_EVEN_PARITY 0x02 |
Referenced by UART_init(), and UART_initAdvance().
| #define UART_CLOCKSOURCE_ACLK UCSSEL__ACLK |
Referenced by UART_init(), and UART_initAdvance().
| #define UART_CLOCKSOURCE_SMCLK UCSSEL__SMCLK |
Referenced by UART_init(), and UART_initAdvance().
| #define UART_ONE_STOP_BIT 0x00 |
Referenced by UART_init(), and UART_initAdvance().
| #define UART_TWO_STOP_BITS UCSPB |
Referenced by UART_init(), and UART_initAdvance().
| #define UART_MSB_FIRST UCMSB |
Referenced by UART_init(), and UART_initAdvance().
| #define UART_LSB_FIRST 0x00 |
Referenced by UART_init(), and UART_initAdvance().
| #define UART_RECEIVE_INTERRUPT_FLAG UCRXIFG |
Referenced by UART_getInterruptStatus().
| #define UART_TRANSMIT_INTERRUPT_FLAG UCTXIFG |
Referenced by UART_getInterruptStatus().
| #define UART_RECEIVE_INTERRUPT UCRXIE |
Referenced by UART_disableInterrupt(), and UART_enableInterrupt().
| #define UART_TRANSMIT_INTERRUPT UCTXIE |
Referenced by UART_disableInterrupt(), and UART_enableInterrupt().
| #define UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT UCRXEIE |
Referenced by UART_disableInterrupt(), and UART_enableInterrupt().
| #define UART_BREAKCHAR_INTERRUPT UCBRKIE |
Referenced by UART_disableInterrupt(), and UART_enableInterrupt().
| #define UART_LISTEN_ENABLE UCLISTEN |
Referenced by UART_queryStatusFlags().
| #define UART_FRAMING_ERROR UCFE |
Referenced by UART_queryStatusFlags().
| #define UART_OVERRUN_ERROR UCOE |
Referenced by UART_queryStatusFlags().
| #define UART_PARITY_ERROR UCPE |
Referenced by UART_queryStatusFlags().
| #define UARTBREAK_DETECT UCBRK |
Referenced by eUART_queryStatusFlags(), and UART_queryStatusFlags().
| #define UART_RECEIVE_ERROR UCRXERR |
Referenced by UART_queryStatusFlags().
| #define UART_ADDRESS_RECEIVED UCADDR |
Referenced by UART_queryStatusFlags().
| #define UART_IDLELINE UCIDLE |
Referenced by UART_queryStatusFlags().
| #define UART_BUSY UCBUSY |
Referenced by UART_queryStatusFlags().
| #define UART_MODE UCMODE_0 |
Referenced by UART_init(), and UART_initAdvance().
| #define UART_IDLE_LINE_MULTI_PROCESSOR_MODE UCMODE_1 |
Referenced by UART_init(), and UART_initAdvance().
| #define UART_ADDRESS_BIT_MULTI_PROCESSOR_MODE UCMODE_2 |
Referenced by UART_init(), and UART_initAdvance().
| #define UART_AUTOMATIC_BAUDRATE_DETECTION_MODE UCMODE_3 |
Referenced by UART_init(), UART_initAdvance(), and UART_transmitBreak().
| #define UART_OVERSAMPLING_BAUDRATE_GENERATION 0x01 |
| #define UART_LOW_FREQUENCY_BAUDRATE_GENERATION 0x00 |
| #define DEFAULT_SYNC 0x00 |
| #define UART_AUTOMATICBAUDRATE_SYNC 0x55 |
Referenced by UART_transmitBreak().
| unsigned short UART_init | ( | unsigned int | baseAddress, |
| unsigned char | selectClockSource, | ||
| unsigned long | clockSourceFrequency, | ||
| unsigned long | desiredUartBaudRate, | ||
| unsigned char | parity, | ||
| unsigned char | msborLsbFirst, | ||
| unsigned char | numberofStopBits, | ||
| unsigned char | uartMode, | ||
| unsigned short | overSampling | ||
| ) |
Initializes the UART block.
| baseAddress | is the base address of the UART module. |
| selectClockSource | selects Clock source. Valid values are UART_CLOCKSOURCE_SMCLK UART_CLOCKSOURCE_ACLK |
| clockSourceFrequency | is the frequency of the slected clock source |
| desiredUartClock | is the desired clock rate for UART communication |
| parity | is the desired parity. Valid values are UART_NO_PARITY [Default Value], UART_ODD_PARITY, UART_EVEN_PARITY |
| msborLsbFirst | controls direction of receive and transmit shift register. Valid values are UART_MSB_FIRST UART_LSB_FIRST [Default Value] |
| numberofStopBits | indicates one/two STOP bits Valid values are UART_ONE_STOP_BIT [Default Value] UART_TWO_STOP_BITS |
| uartMode | selects the mode of operation Valid values are UART_MODE [Default Value], UART_IDLE_LINE_MULTI_PROCESSOR_MODE, UART_ADDRESS_BIT_MULTI_PROCESSOR_MODE, UART_AUTOMATIC_BAUDRATE_DETECTION_MODE |
| overSampling | indicates low frequency or oversampling baud generation Valid values are UART_OVERSAMPLING_BAUDRATE_GENERATION UART_LOW_FREQUENCY_BAUDRATE_GENERATION |
Upon successful initialization of the UART block, this function will have initialized the module, but the UART block still remains disabled and must be enabled with UART_enable()
Modified bits are UCPEN, UCPAR, UCMSB, UC7BIT, UCSPB, UCMODEx, UCSYNC bits of UCAxCTL0 and UCSSELx, UCSWRST bits of UCAxCTL1
References ASSERT, HWREGB, STATUS_FAIL, STATUS_SUCCESS, UART_ADDRESS_BIT_MULTI_PROCESSOR_MODE, UART_AUTOMATIC_BAUDRATE_DETECTION_MODE, UART_CLOCKSOURCE_ACLK, UART_CLOCKSOURCE_SMCLK, UART_EVEN_PARITY, UART_IDLE_LINE_MULTI_PROCESSOR_MODE, UART_LSB_FIRST, UART_MODE, UART_MSB_FIRST, UART_NO_PARITY, UART_ODD_PARITY, UART_ONE_STOP_BIT, UART_TWO_STOP_BITS, and UARTBAUDRATE_calculateBaudDividers().
| unsigned short UART_initAdvance | ( | unsigned int | baseAddress, |
| unsigned char | selectClockSource, | ||
| unsigned int | clockPrescalar, | ||
| unsigned char | firstModReg, | ||
| unsigned char | secondModReg, | ||
| unsigned char | parity, | ||
| unsigned char | msborLsbFirst, | ||
| unsigned char | numberofStopBits, | ||
| unsigned char | uartMode, | ||
| unsigned short | overSampling | ||
| ) |
Advanced initialization routine for the UART block. The values to be written into the UCAxBRW and UCAxMCTLW registers should be pre-computed and passed into the initialization function
| baseAddress | is the base address of the UART module. |
| selectClockSource | selects Clock source. Valid values are UART_CLOCKSOURCE_SMCLK UART_CLOCKSOURCE_ACLK |
| clockPrescalar | is the value to be written into UCBRx bits |
| firstModReg | is First modulation stage register setting. This value is a pre-calculated value which can be obtained from the Device User’s Guide.This value is written into UCBRFx bits of UCAxMCTLW. |
| secondModReg | is Second modulation stage register setting. This value is a pre-calculated value which can be obtained from the Device User’s Guide. This value is written into UCBRSx bits of UCAxMCTLW. |
| parity | is the desired parity. Valid values are UART_NO_PARITY [Default Value], UART_ODD_PARITY, UART_EVEN_PARITY |
| msborLsbFirst | controls direction of receive and transmit shift register. Valid values are UART_MSB_FIRST UART_LSB_FIRST [Default Value] |
| numberofStopBits | indicates one/two STOP bits Valid values are UART_ONE_STOP_BIT [Default Value] UART_TWO_STOP_BITS |
| uartMode | selects the mode of operation Valid values are UART_MODE [Default Value], UART_IDLE_LINE_MULTI_PROCESSOR_MODE, UART_ADDRESS_BIT_MULTI_PROCESSOR_MODE, UART_AUTOMATIC_BAUDRATE_DETECTION_MODE |
| overSampling | indicates low frequency or oversampling baud generation Valid values are UART_OVERSAMPLING_BAUDRATE_GENERATION UART_LOW_FREQUENCY_BAUDRATE_GENERATION |
Upon successful initialization of the UART block, this function will have initialized the module, but the UART block still remains disabled and must be enabled with UART_enable()
Modified bits are UCPEN, UCPAR, UCMSB, UC7BIT, UCSPB, UCMODEx, UCSYNC bits of UCAxCTL0 and UCSSELx, UCSWRST bits of UCAxCTL1
References ASSERT, HWREGB, STATUS_SUCCESS, UART_ADDRESS_BIT_MULTI_PROCESSOR_MODE, UART_AUTOMATIC_BAUDRATE_DETECTION_MODE, UART_CLOCKSOURCE_ACLK, UART_CLOCKSOURCE_SMCLK, UART_EVEN_PARITY, UART_IDLE_LINE_MULTI_PROCESSOR_MODE, UART_LSB_FIRST, UART_MODE, UART_MSB_FIRST, UART_NO_PARITY, UART_ODD_PARITY, UART_ONE_STOP_BIT, and UART_TWO_STOP_BITS.
| void UART_transmitData | ( | unsigned int | baseAddress, |
| unsigned char | transmitData | ||
| ) |
Transmits a byte from the UART Module.
| baseAddress | is the base address of the UART module. |
| transmitData | data to be transmitted from the UART module |
This function will place the supplied data into UART trasmit data register to start transmission
Modified register is UCAxTXBUF
References HWREGB.
| unsigned char UART_receiveData | ( | unsigned int | baseAddress | ) |
Receives a byte that has been sent to the UART Module.
| baseAddress | is the base address of the UART module. |
This function reads a byte of data from the UART receive data Register.
Modified register is UCAxRXBUF
References HWREGB.
| void UART_enableInterrupt | ( | unsigned int | baseAddress, |
| unsigned char | mask | ||
| ) |
Enables individual UART interrupt sources.
| baseAddress | is the base address of the UART module. |
| mask | is the bit mask of the interrupt sources to be enabled. |
Enables the indicated UART interrupt sources. The interrupt flag is first and then the corresponfing interrupt is enabled. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.
The mask parameter is the logical OR of any of the following:
Modified register is UCAxIFG, UCAxIE and UCAxCTL1
References ASSERT, HWREG, HWREGB, UART_BREAKCHAR_INTERRUPT, UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT, UART_RECEIVE_INTERRUPT, and UART_TRANSMIT_INTERRUPT.
| void UART_disableInterrupt | ( | unsigned int | baseAddress, |
| unsigned char | mask | ||
| ) |
Disables individual UART interrupt sources.
| baseAddress | is the base address of the UART module. |
| mask | is the bit mask of the interrupt sources to be disabled. |
Disables the indicated UART interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.
The mask parameter is the logical OR of any of the following:
Modified register is UCAxIFG, UCAxIE and UCAxCTL1
References ASSERT, HWREGB, UART_BREAKCHAR_INTERRUPT, UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT, UART_RECEIVE_INTERRUPT, and UART_TRANSMIT_INTERRUPT.
| unsigned char UART_getInterruptStatus | ( | unsigned int | baseAddress, |
| unsigned char | mask | ||
| ) |
Gets the current UART interrupt status.
| baseAddress | is the base address of the UART module. |
| mask | is the masked interrupt flag status to be returned. |
This returns the interrupt status for the UART module based on which flag is passed. mask parameter can be either any of the following selection.
Modified register is UCAxIFG.
References ASSERT, HWREGB, UART_RECEIVE_INTERRUPT_FLAG, and UART_TRANSMIT_INTERRUPT_FLAG.
Referenced by UART_transmitBreak().
| void UART_clearInterruptFlag | ( | unsigned int | baseAddress, |
| unsigned char | mask | ||
| ) |
Clears UART interrupt sources.
| baseAddress | is the base address of the UART module. |
| mask | is a bit mask of the interrupt sources to be cleared. |
The UART interrupt source is cleared, so that it no longer asserts. The highest interrupt flag is automatically cleared when an interrupt vector generator is used.
The mask parameter has the same definition as the mask parameter to UART_enableInterrupt().
Modified register is UCAxIFG
References HWREG.
| void UART_enable | ( | unsigned int | baseAddress | ) |
Enables the UART block.
| baseAddress | is the base address of the USCI UART module. |
This will enable operation of the UART block.
Modified register is UCAxCTL1
References HWREGB.
| void UART_disable | ( | unsigned int | baseAddress | ) |
Disables the UART block.
| baseAddress | is the base address of the USCI UART module. |
This will disable operation of the UART block.
Modified register is UCAxCTL1
References HWREGB.
| unsigned char UART_queryStatusFlags | ( | unsigned int | baseAddress, |
| unsigned char | mask | ||
| ) |
Gets the current UART status flags.
| baseAddress | is the base address of the UART module. |
| mask | is the masked interrupt flag status to be returned. |
This returns the status for the UART module based on which flag is passed. mask parameter can be either any of the following selection.
Modified register is UCAxSTAT
References ASSERT, HWREGB, UART_ADDRESS_RECEIVED, UART_BUSY, UART_FRAMING_ERROR, UART_IDLELINE, UART_LISTEN_ENABLE, UART_OVERRUN_ERROR, UART_PARITY_ERROR, UART_RECEIVE_ERROR, and UARTBREAK_DETECT.
| void UART_setDormant | ( | unsigned int | baseAddress | ) |
Sets the UART module in dormant mode
| baseAddress | is the base address of the UART module. |
Puts USCI in sleep mode Only characters that are preceded by an idle-line or with address bit set UCRXIFG. In UART mode with automatic baud-rate detection, only the combination of a break and synch field sets UCRXIFG.
Modified register is UCAxCTL1
References HWREGB.
| void UART_resetDormant | ( | unsigned int | baseAddress | ) |
Re-enables UART module from dormant mode
| baseAddress | is the base address of the UART module. |
Not dormant. All received characters set UCRXIFG.
Modified register is UCAxCTL1
References HWREGB.
| void UART_transmitAddress | ( | unsigned int | baseAddress, |
| unsigned char | transmitAddress | ||
| ) |
Transmits the next byte to be transmitted marked as address depending on selected multiprocessor mode
| baseAddress | is the base address of the UART module. |
| transmitAddress | is the next byte to be transmitted |
Modified register is UCAxCTL1, UCAxTXBUF
References HWREGB.
| void UART_transmitBreak | ( | unsigned int | baseAddress | ) |
Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud-rate detection, UART_AUTOMATICBAUDRATE_SYNC(0x55) must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise, DEFAULT_SYNC(0x00) must be written into the transmit buffer. Also ensures module is ready for transmitting the next data
| baseAddress | is the base address of the UART module. |
Modified register is UCAxCTL1, UCAxTXBUF
References DEFAULT_SYNC, HWREGB, UART_AUTOMATIC_BAUDRATE_DETECTION_MODE, UART_AUTOMATICBAUDRATE_SYNC, and UART_getInterruptStatus().
| unsigned long UART_getReceiveBufferAddressForDMA | ( | unsigned int | baseAddress | ) |
Returns the address of the RX Buffer of the UART for the DMA module.
| baseAddress | is the base address of the UART module. |
Returns the address of the UART RX Buffer. This can be used in conjunction with the DMA to store the received data directly to memory.
| unsigned long UART_getTransmitBufferAddressForDMA | ( | unsigned int | baseAddress | ) |
Returns the address of the TX Buffer of the UART for the DMA module.
| baseAddress | is the base address of the UART module. |
Returns the address of the UART TX Buffer. This can be used in conjunction with the DMA to obtain transmitted data directly from memory.