timerd.h File Reference

Go to the source code of this file.

Defines
#define	__MSP430_HAS_TxD7__
#define	TIMERD_CLOCKSOURCE_EXTERNAL_TDCLK   TDSSEL__TACLK
#define	TIMERD_CLOCKSOURCE_ACLK   TDSSEL__ACLK
#define	TIMERD_CLOCKSOURCE_SMCLK   TDSSEL__SMCLK
#define	TIMERD_CLOCKSOURCE_INVERTED_EXTERNAL_TDCLK   TDSSEL__INCLK
#define	TIMERD_CLOCKINGMODE_EXTERNAL_CLOCK   TDCLKM_0
#define	TIMERD_CLOCKINGMODE_HIRES_LOCAL_CLOCK   TDCLKM_1
#define	TIMERD_CLOCKINGMODE_AUXILIARY_CLK   TDCLKM_2
#define	TIMERD_HIGHRES_CLK_MULTIPLY_FACTOR_8x   TDHM_0
#define	TIMERD_HIGHRES_CLK_MULTIPLY_FACTOR_16x   TDHM_1
#define	TIMERD_CLOCKSOURCE_DIVIDER_1   0x01
#define	TIMERD_CLOCKSOURCE_DIVIDER_2   0x02
#define	TIMERD_CLOCKSOURCE_DIVIDER_4   0x04
#define	TIMERD_CLOCKSOURCE_DIVIDER_8   0x08
#define	TIMERD_CLOCKSOURCE_DIVIDER_3   0x03
#define	TIMERD_CLOCKSOURCE_DIVIDER_5   0x05
#define	TIMERD_CLOCKSOURCE_DIVIDER_6   0x06
#define	TIMERD_CLOCKSOURCE_DIVIDER_7   0x07
#define	TIMERD_CLOCKSOURCE_DIVIDER_10   0x0A
#define	TIMERD_CLOCKSOURCE_DIVIDER_12   0x0C
#define	TIMERD_CLOCKSOURCE_DIVIDER_14   0x0E
#define	TIMERD_CLOCKSOURCE_DIVIDER_16   0x10
#define	TIMERD_CLOCKSOURCE_DIVIDER_20   0x14
#define	TIMERD_CLOCKSOURCE_DIVIDER_24   0x18
#define	TIMERD_CLOCKSOURCE_DIVIDER_28   0x1C
#define	TIMERD_CLOCKSOURCE_DIVIDER_32   0x20
#define	TIMERD_CLOCKSOURCE_DIVIDER_40   0x28
#define	TIMERD_CLOCKSOURCE_DIVIDER_48   0x30
#define	TIMERD_CLOCKSOURCE_DIVIDER_56   0x38
#define	TIMERD_CLOCKSOURCE_DIVIDER_64   0x40
#define	TIMERD_DO_CLEAR   TDCLR
#define	TIMERD_SKIP_CLEAR   0x00
#define	TIMERD_CAPTURECOMPARE_INPUT   CCI
#define	TIMERD_CAPTURECOMPARE_INPUT_HIGH   0x01
#define	TIMERD_CAPTURECOMPARE_INPUT_LOW   0x00
#define	TIMERD_OUTPUTMODE_OUTBITVALUE_HIGH   OUT
#define	TIMERD_OUTPUTMODE_OUTBITVALUE_LOW   0x00
#define	TIMERD_CAPTURE_OVERFLOW   COV
#define	TIMERD_CAPTURECOMPARE_INTERRUPT_FLAG   CCIFG
#define	TIMERD_HIGH_RES_FREQUENCY_UNLOCK   TDHUNLKIE
#define	TIMERD_HIGH_RES_FREQUENCY_LOCK   TDHLKIE
#define	TIMERD_HIGH_RES_FAIL_HIGH   TDHFHIE
#define	TIMERD_HIGH_RES_FAIL_LOW   TDHFLIE
#define	TIMERD_TDIE_INTERRUPT_ENABLE   TDIE
#define	TIMERD_TDIE_INTERRUPT_DISABLE   0x00
#define	TIMERD_CCIE_CCR0_INTERRUPT_ENABLE   CCIE
#define	TIMERD_CCIE_CCR0_INTERRUPT_DISABLE   0x00
#define	TIMERD_STOP_MODE   MC_0
#define	TIMERD_UP_MODE   MC_1
#define	TIMERD_CONTINUOUS_MODE   MC_2
#define	TIMERD_UPDOWN_MODE   MC_3
#define	TIMERD_CAPTURECOMPARE_REGISTER_0   0x08
#define	TIMERD_CAPTURECOMPARE_REGISTER_1   0x0E
#define	TIMERD_CAPTURECOMPARE_REGISTER_2   0x14
#define	TIMERD_CAPTURECOMPARE_REGISTER_3   0x1A
#define	TIMERD_CAPTURECOMPARE_REGISTER_4   0x20
#define	TIMERD_CAPTURECOMPARE_REGISTER_5   0x28
#define	TIMERD_CAPTURECOMPARE_REGISTER_6   0x2E
#define	TIMERD_OUTPUTMODE_OUTBITVALUE   OUTMOD_0
#define	TIMERD_OUTPUTMODE_SET   OUTMOD_1
#define	TIMERD_OUTPUTMODE_TOGGLE_RESET   OUTMOD_2
#define	TIMERD_OUTPUTMODE_SET_RESET   OUTMOD_3
#define	TIMERD_OUTPUTMODE_TOGGLE   OUTMOD_4
#define	TIMERD_OUTPUTMODE_RESET   OUTMOD_5
#define	TIMERD_OUTPUTMODE_TOGGLE_SET   OUTMOD_6
#define	TIMERD_OUTPUTMODE_RESET_SET   OUTMOD_7
#define	TIMERD_CAPTUREMODE_NO_CAPTURE   CM_0
#define	TIMERD_CAPTUREMODE_RISING_EDGE   CM_1
#define	TIMERD_CAPTUREMODE_FALLING_EDGE   CM_2
#define	TIMERD_CAPTUREMODE_RISING_AND_FALLING_EDGE   CM_3
#define	TIMERD_CAPTURE_ASYNCHRONOUS   0x00
#define	TIMERD_CAPTURE_SYNCHRONOUS   SCS
#define	TIMERD_SINGLE_CAPTURE_MODE   0x00
#define	TIMERD_DUAL_CAPTURE_MODE   0x01
#define	TIMERD_CAPTURECOMPARE_INTERRUPT_ENABLE   CCIE
#define	TIMERD_CAPTURECOMPARE_INTERRUPT_DISABLE   0x00
#define	TIMERD_CAPTURE_INPUTSELECT_CCIxA   CCIS_0
#define	TIMERD_CAPTURE_INPUTSELECT_CCIxB   CCIS_1
#define	TIMERD_CAPTURE_INPUTSELECT_GND   CCIS_2
#define	TIMERD_CAPTURE_INPUTSELECT_Vcc   CCIS_3
#define	TIMERD_INTERRUPT_NOT_PENDING   0x00
#define	TIMERD_INTERRUPT_PENDING   0x01
#define	TIMERD_READ_SYNCHRONIZED_CAPTURECOMPAREINPUT   SCCI
#define	TIMERD_READ_CAPTURE_COMPARE_INPUT   CCI
#define	TIMERD_HIGHRES_64MHZ   0x00
#define	TIMERD_HIGHRES_128MHZ   0x01
#define	TIMERD_HIGHRES_200MHZ   0x02
#define	TIMERD_HIGHRES_256MHZ   0x03
#define	TIMERD_COMBINE_CCR1_CCR2   2
#define	TIMERD_COMBINE_CCR3_CCR4   4
#define	TIMERD_COMBINE_CCR5_CCR6   6
#define	TIMERD_CLOCK_RANGE0   0x0000
#define	TIMERD_CLOCK_RANGE1   0x2000
#define	TIMERD_CLOCK_RANGE2   0x4000
#define	TIMERD_HIGHRES_BELOW_15MHz   0x00
#define	TIMERD_HIGHRES_ABOVE_15MHz   TDHCLKCR
Functions
void	TimerD_startCounter (unsigned int baseAddress, unsigned int timerMode)
void	TimerD_configureContinuousMode (unsigned int baseAddress, unsigned int clockSource, unsigned int clockSourceDivider, unsigned int clockingMode, unsigned int timerInterruptEnable_TDIE, unsigned int timerClear)
void	TimerD_configureUpMode (unsigned int baseAddress, unsigned int clockSource, unsigned int clockSourceDivider, unsigned int clockingMode, unsigned int timerPeriod, unsigned int timerInterruptEnable_TDIE, unsigned int captureCompareInterruptEnable_CCR0_CCIE, unsigned int timerClear)
void	TimerD_configureUpDownMode (unsigned int baseAddress, unsigned int clockSource, unsigned int clockSourceDivider, unsigned int clockingMode, unsigned int timerPeriod, unsigned int timerInterruptEnable_TDIE, unsigned int captureCompareInterruptEnable_CCR0_CCIE, unsigned int timerClear)
void	TimerD_initCapture (unsigned int baseAddress, unsigned int captureRegister, unsigned int captureMode, unsigned int captureInputSelect, unsigned short synchronizeCaptureSource, unsigned short captureInterruptEnable, unsigned int captureOutputMode, unsigned char channelCaptureMode)
void	TimerD_initCompare (unsigned int baseAddress, unsigned int compareRegister, unsigned short compareInterruptEnable, unsigned int compareOutputMode, unsigned int compareValue)
void	TimerD_enableTimerInterrupt (unsigned int baseAddress)
void	TimerD_enableHighResInterrupt (unsigned int baseAddress, unsigned int mask)
void	TimerD_disableTimerInterrupt (unsigned int baseAddress)
void	TimerD_disableHighResInterrupt (unsigned int baseAddress, unsigned int mask)
unsigned long	TimerD_getTimerInterruptStatus (unsigned int baseAddress)
void	TimerD_enableCaptureCompareInterrupt (unsigned int baseAddress, unsigned int captureCompareRegister)
void	TimerD_disableCaptureCompareInterrupt (unsigned int baseAddress, unsigned int captureCompareRegister)
unsigned long	TimerD_getCaptureCompareInterruptStatus (unsigned int baseAddress, unsigned int captureCompareRegister, unsigned int mask)
unsigned int	TimerD_getHighResInterruptStatus (unsigned int baseAddress, unsigned int mask)
void	TimerD_clear (unsigned int baseAddress)
void	TimerD_clearHighResInterruptStatus (unsigned int baseAddress, unsigned int mask)
unsigned short	TimerD_getSynchronizedCaptureCompareInput (unsigned int baseAddress, unsigned int captureCompareRegister, unsigned short synchronized)
unsigned char	TimerD_getOutputForOutputModeOutBitValue (unsigned int baseAddress, unsigned int captureCompareRegister)
unsigned int	TimerD_getCaptureCompareCount (unsigned int baseAddress, unsigned int captureCompareRegister)
unsigned int	TimerD_getCaptureCompareLatchCount (unsigned int baseAddress, unsigned int captureCompareRegister)
unsigned char	TimerD_getCaptureCompareInputSignal (unsigned int baseAddress, unsigned int captureCompareRegister)
void	TimerD_setOutputForOutputModeOutBitValue (unsigned int baseAddress, unsigned int captureCompareRegister, unsigned char outputModeOutBitValue)
void	TimerD_generatePWM (unsigned int baseAddress, unsigned int clockSource, unsigned int clockSourceDivider, unsigned int clockingMode, unsigned int timerPeriod, unsigned int compareRegister, unsigned int compareOutputMode, unsigned int dutyCycle)
void	TimerD_stop (unsigned int baseAddress)
void	TimerD_setCompareValue (unsigned int baseAddress, unsigned int compareRegister, unsigned int compareValue)
void	TimerD_clearTimerInterruptFlag (unsigned int baseAddress)
void	TimerD_clearCaptureCompareInterruptFlag (unsigned int baseAddress, unsigned int captureCompareRegister)
unsigned char	TimerD_configureHighResGeneratorInFreeRunningMode (unsigned int baseAddress, unsigned char desiredHighResFrequency)
void	TimerD_configureHighResGeneratorInRegulatedMode (unsigned int baseAddress, unsigned int clockSource, unsigned int clockSourceDivider, unsigned int clockingMode, unsigned char highResClockMultiplyFactor, unsigned char highResClockDivider)
void	TimerD_combineTDCCRToGeneratePWM (unsigned int baseAddress, unsigned int clockSource, unsigned int clockSourceDivider, unsigned int clockingMode, unsigned int timerPeriod, unsigned int combineCCRRegistersCombination, unsigned int compareOutputMode, unsigned int dutyCycle1, unsigned int dutyCycle2)
void	TimerD_selectLatchingGroup (unsigned int baseAddress, unsigned int groupLatch)
void	TimerD_selectCounterLength (unsigned int baseAddress, unsigned int counterLength)
void	TimerD_initCompareLatchLoadEvent (unsigned int baseAddress, unsigned int compareRegister, unsigned int compareLatchLoadEvent)
void	TimerD_disableHighResFastWakeup (unsigned int baseAddress)
void	TimerD_enableHighResFastWakeup (unsigned int baseAddress)
void	TimerD_disableHighResClockEnhancedAccuracy (unsigned int baseAddress)
void	TimerD_enableHighResClockEnhancedAccuracy (unsigned int baseAddress)
void	TimerD_DisableHighResGeneratorForceON (unsigned int baseAddress)
void	TimerD_EnableHighResGeneratorForceON (unsigned int baseAddress)
void	TimerD_selectHighResCoarseClockRange (unsigned int baseAddress, unsigned int highResCoarseClockRange)
void	TimerD_selectHighResClockRange (unsigned int baseAddress, unsigned int highResClockRange)

---

Define Documentation

#define __MSP430_HAS_TxD7__

#define TIMERD_CLOCKSOURCE_EXTERNAL_TDCLK   TDSSEL__TACLK

#define TIMERD_CLOCKSOURCE_ACLK   TDSSEL__ACLK

Referenced by TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_SMCLK   TDSSEL__SMCLK

Referenced by TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_INVERTED_EXTERNAL_TDCLK   TDSSEL__INCLK

Referenced by TimerD_configureContinuousMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKINGMODE_EXTERNAL_CLOCK   TDCLKM_0

Referenced by TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKINGMODE_HIRES_LOCAL_CLOCK   TDCLKM_1

Referenced by TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKINGMODE_AUXILIARY_CLK   TDCLKM_2

Referenced by TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_HIGHRES_CLK_MULTIPLY_FACTOR_8x   TDHM_0

#define TIMERD_HIGHRES_CLK_MULTIPLY_FACTOR_16x   TDHM_1

#define TIMERD_CLOCKSOURCE_DIVIDER_1   0x01

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_DIVIDER_2   0x02

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_DIVIDER_4   0x04

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_DIVIDER_8   0x08

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_DIVIDER_3   0x03

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_DIVIDER_5   0x05

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_DIVIDER_6   0x06

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_DIVIDER_7   0x07

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_DIVIDER_10   0x0A

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_DIVIDER_12   0x0C

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_DIVIDER_14   0x0E

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_DIVIDER_16   0x10

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_DIVIDER_20   0x14

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_DIVIDER_24   0x18

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_DIVIDER_28   0x1C

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_DIVIDER_32   0x20

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_DIVIDER_40   0x28

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_DIVIDER_48   0x30

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_DIVIDER_56   0x38

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CLOCKSOURCE_DIVIDER_64   0x40

Referenced by privateTimerDProcessClockSourceDivider(), TimerD_combineTDCCRToGeneratePWM(), TimerD_configureContinuousMode(), TimerD_configureHighResGeneratorInRegulatedMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_DO_CLEAR   TDCLR

Referenced by TimerD_configureContinuousMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), TimerD_generatePWM(), and TimerD_initCapture().

#define TIMERD_SKIP_CLEAR   0x00

Referenced by TimerD_configureContinuousMode(), TimerD_configureUpDownMode(), and TimerD_configureUpMode().

#define TIMERD_CAPTURECOMPARE_INPUT   CCI

#define TIMERD_CAPTURECOMPARE_INPUT_HIGH   0x01

Referenced by TimerD_getSynchronizedCaptureCompareInput().

#define TIMERD_CAPTURECOMPARE_INPUT_LOW   0x00

Referenced by TimerD_getSynchronizedCaptureCompareInput().

#define TIMERD_OUTPUTMODE_OUTBITVALUE_HIGH   OUT

Referenced by TimerD_getOutputForOutputModeOutBitValue(), and TimerD_setOutputForOutputModeOutBitValue().

#define TIMERD_OUTPUTMODE_OUTBITVALUE_LOW   0x00

Referenced by TimerD_getOutputForOutputModeOutBitValue(), and TimerD_setOutputForOutputModeOutBitValue().

#define TIMERD_CAPTURE_OVERFLOW   COV

#define TIMERD_CAPTURECOMPARE_INTERRUPT_FLAG   CCIFG

#define TIMERD_HIGH_RES_FREQUENCY_UNLOCK   TDHUNLKIE

#define TIMERD_HIGH_RES_FREQUENCY_LOCK   TDHLKIE

#define TIMERD_HIGH_RES_FAIL_HIGH   TDHFHIE

#define TIMERD_HIGH_RES_FAIL_LOW   TDHFLIE

#define TIMERD_TDIE_INTERRUPT_ENABLE   TDIE

Referenced by TimerD_configureContinuousMode(), TimerD_configureUpDownMode(), TimerD_configureUpMode(), TimerD_generatePWM(), and TimerD_initCapture().

#define TIMERD_TDIE_INTERRUPT_DISABLE   0x00

Referenced by TimerD_configureContinuousMode().

#define TIMERD_CCIE_CCR0_INTERRUPT_ENABLE   CCIE

Referenced by TimerD_configureUpDownMode(), and TimerD_configureUpMode().

#define TIMERD_CCIE_CCR0_INTERRUPT_DISABLE   0x00

#define TIMERD_STOP_MODE   MC_0

Referenced by TimerD_configureContinuousMode(), TimerD_configureUpDownMode(), and TimerD_configureUpMode().

#define TIMERD_UP_MODE   MC_1

Referenced by TimerD_generatePWM().

#define TIMERD_CONTINUOUS_MODE   MC_2

Referenced by TimerD_configureContinuousMode().

#define TIMERD_UPDOWN_MODE   MC_3

Referenced by TimerD_configureUpDownMode(), TimerD_configureUpMode(), and TimerD_generatePWM().

#define TIMERD_CAPTURECOMPARE_REGISTER_0   0x08

Referenced by TimerD_clearCaptureCompareInterruptFlag(), TimerD_disableCaptureCompareInterrupt(), TimerD_enableCaptureCompareInterrupt(), TimerD_generatePWM(), TimerD_getCaptureCompareCount(), TimerD_getCaptureCompareInputSignal(), TimerD_getCaptureCompareLatchCount(), TimerD_getOutputForOutputModeOutBitValue(), TimerD_getSynchronizedCaptureCompareInput(), TimerD_initCapture(), TimerD_initCompare(), TimerD_setCompareValue(), and TimerD_setOutputForOutputModeOutBitValue().

#define TIMERD_CAPTURECOMPARE_REGISTER_1   0x0E

Referenced by TimerD_clearCaptureCompareInterruptFlag(), TimerD_disableCaptureCompareInterrupt(), TimerD_enableCaptureCompareInterrupt(), TimerD_generatePWM(), TimerD_getCaptureCompareCount(), TimerD_getCaptureCompareInputSignal(), TimerD_getCaptureCompareLatchCount(), TimerD_getOutputForOutputModeOutBitValue(), TimerD_getSynchronizedCaptureCompareInput(), TimerD_initCapture(), TimerD_initCompare(), TimerD_setCompareValue(), and TimerD_setOutputForOutputModeOutBitValue().

#define TIMERD_CAPTURECOMPARE_REGISTER_2   0x14

Referenced by TimerD_clearCaptureCompareInterruptFlag(), TimerD_disableCaptureCompareInterrupt(), TimerD_enableCaptureCompareInterrupt(), TimerD_generatePWM(), TimerD_getCaptureCompareCount(), TimerD_getCaptureCompareInputSignal(), TimerD_getCaptureCompareLatchCount(), TimerD_getOutputForOutputModeOutBitValue(), TimerD_getSynchronizedCaptureCompareInput(), TimerD_initCapture(), TimerD_initCompare(), TimerD_setCompareValue(), and TimerD_setOutputForOutputModeOutBitValue().

#define TIMERD_CAPTURECOMPARE_REGISTER_3   0x1A

Referenced by TimerD_clearCaptureCompareInterruptFlag(), TimerD_disableCaptureCompareInterrupt(), TimerD_enableCaptureCompareInterrupt(), TimerD_generatePWM(), TimerD_getCaptureCompareCount(), TimerD_getCaptureCompareInputSignal(), TimerD_getCaptureCompareLatchCount(), TimerD_getOutputForOutputModeOutBitValue(), TimerD_getSynchronizedCaptureCompareInput(), TimerD_initCapture(), TimerD_initCompare(), TimerD_setCompareValue(), and TimerD_setOutputForOutputModeOutBitValue().

#define TIMERD_CAPTURECOMPARE_REGISTER_4   0x20

Referenced by TimerD_clearCaptureCompareInterruptFlag(), TimerD_disableCaptureCompareInterrupt(), TimerD_enableCaptureCompareInterrupt(), TimerD_generatePWM(), TimerD_getCaptureCompareCount(), TimerD_getCaptureCompareInputSignal(), TimerD_getCaptureCompareLatchCount(), TimerD_getOutputForOutputModeOutBitValue(), TimerD_getSynchronizedCaptureCompareInput(), TimerD_initCapture(), TimerD_initCompare(), TimerD_setCompareValue(), and TimerD_setOutputForOutputModeOutBitValue().

#define TIMERD_CAPTURECOMPARE_REGISTER_5   0x28

Referenced by TimerD_clearCaptureCompareInterruptFlag(), TimerD_disableCaptureCompareInterrupt(), TimerD_enableCaptureCompareInterrupt(), TimerD_generatePWM(), TimerD_getCaptureCompareCount(), TimerD_getCaptureCompareInputSignal(), TimerD_getCaptureCompareLatchCount(), TimerD_getOutputForOutputModeOutBitValue(), TimerD_getSynchronizedCaptureCompareInput(), TimerD_initCapture(), TimerD_initCompare(), TimerD_setCompareValue(), and TimerD_setOutputForOutputModeOutBitValue().

#define TIMERD_CAPTURECOMPARE_REGISTER_6   0x2E

Referenced by TimerD_clearCaptureCompareInterruptFlag(), TimerD_disableCaptureCompareInterrupt(), TimerD_enableCaptureCompareInterrupt(), TimerD_generatePWM(), TimerD_getCaptureCompareCount(), TimerD_getCaptureCompareInputSignal(), TimerD_getCaptureCompareLatchCount(), TimerD_getOutputForOutputModeOutBitValue(), TimerD_getSynchronizedCaptureCompareInput(), TimerD_initCapture(), TimerD_initCompare(), TimerD_setCompareValue(), and TimerD_setOutputForOutputModeOutBitValue().

#define TIMERD_OUTPUTMODE_OUTBITVALUE   OUTMOD_0

Referenced by TimerD_combineTDCCRToGeneratePWM(), TimerD_generatePWM(), TimerD_initCapture(), and TimerD_initCompare().

#define TIMERD_OUTPUTMODE_SET   OUTMOD_1

Referenced by TimerD_combineTDCCRToGeneratePWM(), TimerD_generatePWM(), TimerD_initCapture(), and TimerD_initCompare().

#define TIMERD_OUTPUTMODE_TOGGLE_RESET   OUTMOD_2

Referenced by TimerD_combineTDCCRToGeneratePWM(), TimerD_generatePWM(), TimerD_initCapture(), and TimerD_initCompare().

#define TIMERD_OUTPUTMODE_SET_RESET   OUTMOD_3

Referenced by TimerD_combineTDCCRToGeneratePWM(), TimerD_generatePWM(), TimerD_initCapture(), and TimerD_initCompare().

#define TIMERD_OUTPUTMODE_TOGGLE   OUTMOD_4

Referenced by TimerD_combineTDCCRToGeneratePWM(), TimerD_generatePWM(), TimerD_initCapture(), and TimerD_initCompare().

#define TIMERD_OUTPUTMODE_RESET   OUTMOD_5

Referenced by TimerD_combineTDCCRToGeneratePWM(), TimerD_generatePWM(), TimerD_initCapture(), and TimerD_initCompare().

#define TIMERD_OUTPUTMODE_TOGGLE_SET   OUTMOD_6

Referenced by TimerD_combineTDCCRToGeneratePWM(), TimerD_generatePWM(), TimerD_initCapture(), and TimerD_initCompare().

#define TIMERD_OUTPUTMODE_RESET_SET   OUTMOD_7

Referenced by TimerD_combineTDCCRToGeneratePWM(), TimerD_generatePWM(), TimerD_initCapture(), and TimerD_initCompare().

#define TIMERD_CAPTUREMODE_NO_CAPTURE   CM_0

Referenced by TimerD_initCapture().

#define TIMERD_CAPTUREMODE_RISING_EDGE   CM_1

Referenced by TimerD_initCapture().

#define TIMERD_CAPTUREMODE_FALLING_EDGE   CM_2

Referenced by TimerD_initCapture().

#define TIMERD_CAPTUREMODE_RISING_AND_FALLING_EDGE   CM_3

Referenced by TimerD_initCapture().

#define TIMERD_CAPTURE_ASYNCHRONOUS   0x00

Referenced by TimerD_initCapture().

#define TIMERD_CAPTURE_SYNCHRONOUS   SCS

Referenced by TimerD_initCapture().

#define TIMERD_SINGLE_CAPTURE_MODE   0x00

Referenced by TimerD_initCapture().

#define TIMERD_DUAL_CAPTURE_MODE   0x01

Referenced by TimerD_initCapture().

#define TIMERD_CAPTURECOMPARE_INTERRUPT_ENABLE   CCIE

Referenced by TimerD_generatePWM(), TimerD_initCapture(), and TimerD_initCompare().

#define TIMERD_CAPTURECOMPARE_INTERRUPT_DISABLE   0x00

Referenced by TimerD_initCapture(), and TimerD_initCompare().

#define TIMERD_CAPTURE_INPUTSELECT_CCIxA   CCIS_0

Referenced by TimerD_initCapture().

#define TIMERD_CAPTURE_INPUTSELECT_CCIxB   CCIS_1

Referenced by TimerD_initCapture().

#define TIMERD_CAPTURE_INPUTSELECT_GND   CCIS_2

Referenced by TimerD_initCapture().

#define TIMERD_CAPTURE_INPUTSELECT_Vcc   CCIS_3

Referenced by TimerD_initCapture().

#define TIMERD_INTERRUPT_NOT_PENDING   0x00

#define TIMERD_INTERRUPT_PENDING   0x01

#define TIMERD_READ_SYNCHRONIZED_CAPTURECOMPAREINPUT   SCCI

Referenced by TimerD_getSynchronizedCaptureCompareInput().

#define TIMERD_READ_CAPTURE_COMPARE_INPUT   CCI

Referenced by TimerD_getSynchronizedCaptureCompareInput().

#define TIMERD_HIGHRES_64MHZ   0x00

Referenced by TimerD_configureHighResGeneratorInFreeRunningMode().

#define TIMERD_HIGHRES_128MHZ   0x01

Referenced by TimerD_configureHighResGeneratorInFreeRunningMode().

#define TIMERD_HIGHRES_200MHZ   0x02

Referenced by TimerD_configureHighResGeneratorInFreeRunningMode().

#define TIMERD_HIGHRES_256MHZ   0x03

Referenced by TimerD_configureHighResGeneratorInFreeRunningMode().

#define TIMERD_COMBINE_CCR1_CCR2   2

Referenced by TimerD_combineTDCCRToGeneratePWM().

#define TIMERD_COMBINE_CCR3_CCR4   4

Referenced by TimerD_combineTDCCRToGeneratePWM().

#define TIMERD_COMBINE_CCR5_CCR6   6

Referenced by TimerD_combineTDCCRToGeneratePWM().

#define TIMERD_CLOCK_RANGE0   0x0000

Referenced by TimerD_selectHighResClockRange().

#define TIMERD_CLOCK_RANGE1   0x2000

Referenced by TimerD_selectHighResClockRange().

#define TIMERD_CLOCK_RANGE2   0x4000

Referenced by TimerD_selectHighResClockRange().

#define TIMERD_HIGHRES_BELOW_15MHz   0x00

Referenced by TimerD_selectHighResCoarseClockRange().

#define TIMERD_HIGHRES_ABOVE_15MHz   TDHCLKCR

Referenced by TimerD_selectHighResCoarseClockRange().

---

Function Documentation

void TimerD_startCounter	(	unsigned int	baseAddress,
		unsigned int	timerMode
	)

Starts TimerD counter

Parameters:

baseAddress	is the base address of the TimerA module.
clockSource	selects Clock source. Valid values are TIMERD_CONTINUOUS_MODE [Default value] TIMERD_UPDOWN_MODE TIMERD_UP_MODE Modified register is TDxCTL0

NOTE: This function assumes that the timer has been previously configured using TimerD_configureContinuousMode, TimerD_configureUpMode or TimerD_configureUpDownMode.

Returns:

None

References ASSERT, HWREG, TIMERA_CONTINUOUS_MODE, TIMERA_UP_MODE, and TIMERA_UPDOWN_MODE.

void TimerD_configureContinuousMode	(	unsigned int	baseAddress,
		unsigned int	clockSource,
		unsigned int	clockSourceDivider,
		unsigned int	clockingMode,
		unsigned int	timerInterruptEnable_TDIE,
		unsigned int	timerClear
	)

Configures timer in continuous mode.

Parameters:

baseAddress	is the base address of the Timer module.
clockSource	selects Clock source. Valid values are TIMERD_CLOCKSOURCE_EXTERNAL_TDCLK [Default value] TIMERD_CLOCKSOURCE_ACLK TIMERD_CLOCKSOURCE_SMCLK TIMERD_CLOCKSOURCE_INVERTED_EXTERNAL_TDCLK
clockSourceDivider	is the divider for Clock source. Valid values are TIMERD_CLOCKSOURCE_DIVIDER_1 [Default value] TIMERD_CLOCKSOURCE_DIVIDER_2 TIMERD_CLOCKSOURCE_DIVIDER_4 TIMERD_CLOCKSOURCE_DIVIDER_8 TIMERD_CLOCKSOURCE_DIVIDER_3 TIMERD_CLOCKSOURCE_DIVIDER_5 TIMERD_CLOCKSOURCE_DIVIDER_6 TIMERD_CLOCKSOURCE_DIVIDER_7 TIMERD_CLOCKSOURCE_DIVIDER_10 TIMERD_CLOCKSOURCE_DIVIDER_12 TIMERD_CLOCKSOURCE_DIVIDER_14 TIMERD_CLOCKSOURCE_DIVIDER_16 TIMERD_CLOCKSOURCE_DIVIDER_20 TIMERD_CLOCKSOURCE_DIVIDER_24 TIMERD_CLOCKSOURCE_DIVIDER_28 TIMERD_CLOCKSOURCE_DIVIDER_32 TIMERD_CLOCKSOURCE_DIVIDER_40 TIMERD_CLOCKSOURCE_DIVIDER_48 TIMERD_CLOCKSOURCE_DIVIDER_56 TIMERD_CLOCKSOURCE_DIVIDER_64
clockingMode	is the selected clock mode register values. Valid values are TIMERD_CLOCKINGMODE_EXTERNAL_CLOCK [Default value] TIMERD_CLOCKINGMODE_HIRES_LOCAL_CLOCK TIMERD_CLOCKINGMODE_AUXILIARY_CLK
timerInterruptEnable_TDIE	is to enable or disable timer interrupt Valid values are TIMERD_TDIE_INTERRUPT_ENABLE TIMERD_TDIE_INTERRUPT_DISABLE [Default value]
timerClear	decides if timer clock divider, count direction, count need to be reset. Valid values are TIMERD_DO_CLEAR TIMERD_SKIP_CLEAR [Default value]

Modified registers are TDxCTL0 and TDxCTL1

This API does not start the timer. Timer needs to be started when required using the TimerD_start API.

Returns:

None

References ASSERT, HWREG, privateTimerDProcessClockSourceDivider(), TIMERD_CLOCKINGMODE_AUXILIARY_CLK, TIMERD_CLOCKINGMODE_EXTERNAL_CLOCK, TIMERD_CLOCKINGMODE_HIRES_LOCAL_CLOCK, TIMERD_CLOCKSOURCE_ACLK, TIMERD_CLOCKSOURCE_DIVIDER_1, TIMERD_CLOCKSOURCE_DIVIDER_10, TIMERD_CLOCKSOURCE_DIVIDER_12, TIMERD_CLOCKSOURCE_DIVIDER_14, TIMERD_CLOCKSOURCE_DIVIDER_16, TIMERD_CLOCKSOURCE_DIVIDER_2, TIMERD_CLOCKSOURCE_DIVIDER_20, TIMERD_CLOCKSOURCE_DIVIDER_24, TIMERD_CLOCKSOURCE_DIVIDER_28, TIMERD_CLOCKSOURCE_DIVIDER_3, TIMERD_CLOCKSOURCE_DIVIDER_32, TIMERD_CLOCKSOURCE_DIVIDER_4, TIMERD_CLOCKSOURCE_DIVIDER_40, TIMERD_CLOCKSOURCE_DIVIDER_48, TIMERD_CLOCKSOURCE_DIVIDER_5, TIMERD_CLOCKSOURCE_DIVIDER_56, TIMERD_CLOCKSOURCE_DIVIDER_6, TIMERD_CLOCKSOURCE_DIVIDER_64, TIMERD_CLOCKSOURCE_DIVIDER_7, TIMERD_CLOCKSOURCE_DIVIDER_8, TIMERD_CLOCKSOURCE_INVERTED_EXTERNAL_TDCLK, TIMERD_CLOCKSOURCE_SMCLK, TIMERD_CONTINUOUS_MODE, TIMERD_DO_CLEAR, TIMERD_SKIP_CLEAR, TIMERD_STOP_MODE, TIMERD_TDIE_INTERRUPT_DISABLE, and TIMERD_TDIE_INTERRUPT_ENABLE.

void TimerD_configureUpMode	(	unsigned int	baseAddress,
		unsigned int	clockSource,
		unsigned int	clockSourceDivider,
		unsigned int	clockingMode,
		unsigned int	timerPeriod,
		unsigned int	timerInterruptEnable_TDIE,
		unsigned int	captureCompareInterruptEnable_CCR0_CCIE,
		unsigned int	timerClear
	)

Configures timer in up mode.

Parameters:

baseAddress	is the base address of the Timer module.
clockSource	selects Clock source. Valid values are TIMERD_CLOCKSOURCE_EXTERNAL_TDCLK [Default value] TIMERD_CLOCKSOURCE_ACLK TIMERD_CLOCKSOURCE_SMCLK TIMERD_CLOCKSOURCE_INVERTED_EXTERNAL_TDCLK
clockSourceDivider	is the divider for Clock source. Valid values are TIMERD_CLOCKSOURCE_DIVIDER_1 [Default value] TIMERD_CLOCKSOURCE_DIVIDER_2 TIMERD_CLOCKSOURCE_DIVIDER_4 TIMERD_CLOCKSOURCE_DIVIDER_8 TIMERD_CLOCKSOURCE_DIVIDER_3 TIMERD_CLOCKSOURCE_DIVIDER_5 TIMERD_CLOCKSOURCE_DIVIDER_6 TIMERD_CLOCKSOURCE_DIVIDER_7 TIMERD_CLOCKSOURCE_DIVIDER_10 TIMERD_CLOCKSOURCE_DIVIDER_12 TIMERD_CLOCKSOURCE_DIVIDER_14 TIMERD_CLOCKSOURCE_DIVIDER_16 TIMERD_CLOCKSOURCE_DIVIDER_20 TIMERD_CLOCKSOURCE_DIVIDER_24 TIMERD_CLOCKSOURCE_DIVIDER_28 TIMERD_CLOCKSOURCE_DIVIDER_32 TIMERD_CLOCKSOURCE_DIVIDER_40 TIMERD_CLOCKSOURCE_DIVIDER_48 TIMERD_CLOCKSOURCE_DIVIDER_56 TIMERD_CLOCKSOURCE_DIVIDER_64
clockingMode	is the selected clock mode register values. Valid values are TIMERD_CLOCKINGMODE_EXTERNAL_CLOCK [Default value] TIMERD_CLOCKINGMODE_HIRES_LOCAL_CLOCK TIMERD_CLOCKINGMODE_AUXILIARY_CLK
timerPeriod	is the specified timer period. This is the value that gets written into the CCR0. Limited to 16 bits[unsigned int]
timerInterruptEnable_TDIE	is to enable or disable timer interrupt Valid values are TIMERD_TDIE_INTERRUPT_ENABLE and TIMERD_TDIE_INTERRUPT_DISABLE [Default value]
captureCompareInterruptEnable_CCR0_CCIE	is to enable or disable timer CCR0 captureComapre interrupt. Valid values are TIMERD_CCIE_CCR0_INTERRUPT_ENABLE and TIMERD_CCIE_CCR0_INTERRUPT_DISABLE [Default value]
timerClear	decides if timer clock divider, count direction, count need to be reset. Valid values are TIMERD_DO_CLEAR TIMERD_SKIP_CLEAR [Default value]

Modified registers are TDxCTL0, TDxCTL1,TDxCCR0, TDxCCTL0

This API does not start the timer. Timer needs to be started when required using the TimerD_start API.

Returns:

None

References ASSERT, HWREG, privateTimerDProcessClockSourceDivider(), TIMERD_CCIE_CCR0_INTERRUPT_ENABLE, TIMERD_CLOCKINGMODE_AUXILIARY_CLK, TIMERD_CLOCKINGMODE_EXTERNAL_CLOCK, TIMERD_CLOCKINGMODE_HIRES_LOCAL_CLOCK, TIMERD_CLOCKSOURCE_ACLK, TIMERD_CLOCKSOURCE_DIVIDER_1, TIMERD_CLOCKSOURCE_DIVIDER_10, TIMERD_CLOCKSOURCE_DIVIDER_12, TIMERD_CLOCKSOURCE_DIVIDER_14, TIMERD_CLOCKSOURCE_DIVIDER_16, TIMERD_CLOCKSOURCE_DIVIDER_2, TIMERD_CLOCKSOURCE_DIVIDER_20, TIMERD_CLOCKSOURCE_DIVIDER_24, TIMERD_CLOCKSOURCE_DIVIDER_28, TIMERD_CLOCKSOURCE_DIVIDER_3, TIMERD_CLOCKSOURCE_DIVIDER_32, TIMERD_CLOCKSOURCE_DIVIDER_4, TIMERD_CLOCKSOURCE_DIVIDER_40, TIMERD_CLOCKSOURCE_DIVIDER_48, TIMERD_CLOCKSOURCE_DIVIDER_5, TIMERD_CLOCKSOURCE_DIVIDER_56, TIMERD_CLOCKSOURCE_DIVIDER_6, TIMERD_CLOCKSOURCE_DIVIDER_64, TIMERD_CLOCKSOURCE_DIVIDER_7, TIMERD_CLOCKSOURCE_DIVIDER_8, TIMERD_CLOCKSOURCE_INVERTED_EXTERNAL_TDCLK, TIMERD_CLOCKSOURCE_SMCLK, TIMERD_DO_CLEAR, TIMERD_SKIP_CLEAR, TIMERD_STOP_MODE, TIMERD_TDIE_INTERRUPT_ENABLE, and TIMERD_UPDOWN_MODE.

void TimerD_configureUpDownMode	(	unsigned int	baseAddress,
		unsigned int	clockSource,
		unsigned int	clockSourceDivider,
		unsigned int	clockingMode,
		unsigned int	timerPeriod,
		unsigned int	timerInterruptEnable_TDIE,
		unsigned int	captureCompareInterruptEnable_CCR0_CCIE,
		unsigned int	timerClear
	)

Configures timer in up down mode.

Parameters:

baseAddress	is the base address of the Timer module.
clockSource	selects Clock source. Valid values are TIMERD_CLOCKSOURCE_EXTERNAL_TDCLK [Default value] TIMERD_CLOCKSOURCE_ACLK TIMERD_CLOCKSOURCE_SMCLK TIMERD_CLOCKSOURCE_INVERTED_EXTERNAL_TDCLK
clockSourceDivider	is the divider for Clock source. Valid values are TIMERD_CLOCKSOURCE_DIVIDER_1 [Default value] TIMERD_CLOCKSOURCE_DIVIDER_2 TIMERD_CLOCKSOURCE_DIVIDER_4 TIMERD_CLOCKSOURCE_DIVIDER_8 TIMERD_CLOCKSOURCE_DIVIDER_3 TIMERD_CLOCKSOURCE_DIVIDER_5 TIMERD_CLOCKSOURCE_DIVIDER_6 TIMERD_CLOCKSOURCE_DIVIDER_7 TIMERD_CLOCKSOURCE_DIVIDER_10 TIMERD_CLOCKSOURCE_DIVIDER_12 TIMERD_CLOCKSOURCE_DIVIDER_14 TIMERD_CLOCKSOURCE_DIVIDER_16 TIMERD_CLOCKSOURCE_DIVIDER_20 TIMERD_CLOCKSOURCE_DIVIDER_24 TIMERD_CLOCKSOURCE_DIVIDER_28 TIMERD_CLOCKSOURCE_DIVIDER_32 TIMERD_CLOCKSOURCE_DIVIDER_40 TIMERD_CLOCKSOURCE_DIVIDER_48 TIMERD_CLOCKSOURCE_DIVIDER_56 TIMERD_CLOCKSOURCE_DIVIDER_64
clockingMode	is the selected clock mode register values. Valid values are TIMERD_CLOCKINGMODE_EXTERNAL_CLOCK [Default value] TIMERD_CLOCKINGMODE_HIRES_LOCAL_CLOCK TIMERD_CLOCKINGMODE_AUXILIARY_CLK
timerPeriod	is the specified timer period
timerInterruptEnable_TDIE	is to enable or disable timer interrupt Valid values are TIMERD_TDIE_INTERRUPT_ENABLE TIMERD_TDIE_INTERRUPT_DISABLE [Default value]
captureCompareInterruptEnable_CCR0_CCIE	is to enable or disable timer CCR0 captureComapre interrupt. Valid values are TIMERD_CCIE_CCR0_INTERRUPT_ENABLE and TIMERD_CCIE_CCR0_INTERRUPT_DISABLE [Default value]
timerClear	decides if timer clock divider, count direction, count need to be reset. Valid values are TIMERD_DO_CLEAR TIMERD_SKIP_CLEAR [Default value]

Modified registers are TDxCTL0, TDxCTL1, TDxCCR0, TDxCCTL0

This API does not start the timer. Timer needs to be started when required using the TimerD_start API.

Returns:

None

References ASSERT, HWREG, privateTimerDProcessClockSourceDivider(), TIMERD_CCIE_CCR0_INTERRUPT_ENABLE, TIMERD_CLOCKINGMODE_AUXILIARY_CLK, TIMERD_CLOCKINGMODE_EXTERNAL_CLOCK, TIMERD_CLOCKINGMODE_HIRES_LOCAL_CLOCK, TIMERD_CLOCKSOURCE_ACLK, TIMERD_CLOCKSOURCE_DIVIDER_1, TIMERD_CLOCKSOURCE_DIVIDER_10, TIMERD_CLOCKSOURCE_DIVIDER_12, TIMERD_CLOCKSOURCE_DIVIDER_14, TIMERD_CLOCKSOURCE_DIVIDER_16, TIMERD_CLOCKSOURCE_DIVIDER_2, TIMERD_CLOCKSOURCE_DIVIDER_20, TIMERD_CLOCKSOURCE_DIVIDER_24, TIMERD_CLOCKSOURCE_DIVIDER_28, TIMERD_CLOCKSOURCE_DIVIDER_3, TIMERD_CLOCKSOURCE_DIVIDER_32, TIMERD_CLOCKSOURCE_DIVIDER_4, TIMERD_CLOCKSOURCE_DIVIDER_40, TIMERD_CLOCKSOURCE_DIVIDER_48, TIMERD_CLOCKSOURCE_DIVIDER_5, TIMERD_CLOCKSOURCE_DIVIDER_56, TIMERD_CLOCKSOURCE_DIVIDER_6, TIMERD_CLOCKSOURCE_DIVIDER_64, TIMERD_CLOCKSOURCE_DIVIDER_7, TIMERD_CLOCKSOURCE_DIVIDER_8, TIMERD_CLOCKSOURCE_INVERTED_EXTERNAL_TDCLK, TIMERD_CLOCKSOURCE_SMCLK, TIMERD_DO_CLEAR, TIMERD_SKIP_CLEAR, TIMERD_STOP_MODE, TIMERD_TDIE_INTERRUPT_ENABLE, and TIMERD_UPDOWN_MODE.

void TimerD_initCapture	(	unsigned int	baseAddress,
		unsigned int	captureRegister,
		unsigned int	captureMode,
		unsigned int	captureInputSelect,
		unsigned short	synchronizeCaptureSource,
		unsigned short	captureInterruptEnable,
		unsigned int	captureOutputMode,
		unsigned char	channelCaptureMode
	)

Initializes Capture Mode

Parameters:

baseAddress	is the base address of the Timer module.
captureRegister	selects the Capture register being used. Valid values are TIMERD_CAPTURECOMPARE_REGISTER_0 TIMERD_CAPTURECOMPARE_REGISTER_1 TIMERD_CAPTURECOMPARE_REGISTER_2 TIMERD_CAPTURECOMPARE_REGISTER_3 TIMERD_CAPTURECOMPARE_REGISTER_4 TIMERD_CAPTURECOMPARE_REGISTER_5 TIMERD_CAPTURECOMPARE_REGISTER_6 Refer datasheet to ensure the device has the capture compare register being used
captureMode	is the capture mode selected. Valid values are TIMERD_CAPTUREMODE_NO_CAPTURE [Default value] TIMERD_CAPTUREMODE_RISING_EDGE TIMERD_CAPTUREMODE_FALLING_EDGE TIMERD_CAPTUREMODE_RISING_AND_FALLING_EDGE
captureInputSelect	decides the Input Select TIMERD_CAPTURE_INPUTSELECT_CCIxA [Default value] TIMERD_CAPTURE_INPUTSELECT_CCIxB TIMERD_CAPTURE_INPUTSELECT_GND TIMERD_CAPTURE_INPUTSELECT_Vcc
synchronizeCaptureSource	decides if capture source should be synchronized with timer clock Valid values are TIMERD_CAPTURE_ASYNCHRONOUS [Default value] TIMERD_CAPTURE_SYNCHRONOUS
captureInterruptEnable	is to enable or disable timer captureComapre interrupt. Valid values are TIMERD_CAPTURECOMPARE_INTERRUPT_DISABLE [Default value] TIMERD_CAPTURECOMPARE_INTERRUPT_ENABLE
captureOutputMode	specifies the output mode. Valid values are TIMERD_OUTPUTMODE_OUTBITVALUE [Default value], TIMERD_OUTPUTMODE_SET, TIMERD_OUTPUTMODE_TOGGLE_RESET, TIMERD_OUTPUTMODE_SET_RESET TIMERD_OUTPUTMODE_TOGGLE, TIMERD_OUTPUTMODE_RESET, TIMERD_OUTPUTMODE_TOGGLE_SET, TIMERD_OUTPUTMODE_RESET_SET
channelCaptureMode	specifies single/dual capture mode. Valid values are TIMERD_SINGLE_CAPTURE_MODE [Default value], TIMERD_DUAL_CAPTURE_MODE

Modified registers are TDxCTL2, TDxCCTLn

Returns:

None

References ASSERT, HWREG, HWREGB, TIMERD_CAPTURE_ASYNCHRONOUS, TIMERD_CAPTURE_INPUTSELECT_CCIxA, TIMERD_CAPTURE_INPUTSELECT_CCIxB, TIMERD_CAPTURE_INPUTSELECT_GND, TIMERD_CAPTURE_INPUTSELECT_Vcc, TIMERD_CAPTURE_SYNCHRONOUS, TIMERD_CAPTURECOMPARE_INTERRUPT_DISABLE, TIMERD_CAPTURECOMPARE_INTERRUPT_ENABLE, TIMERD_CAPTURECOMPARE_REGISTER_0, TIMERD_CAPTURECOMPARE_REGISTER_1, TIMERD_CAPTURECOMPARE_REGISTER_2, TIMERD_CAPTURECOMPARE_REGISTER_3, TIMERD_CAPTURECOMPARE_REGISTER_4, TIMERD_CAPTURECOMPARE_REGISTER_5, TIMERD_CAPTURECOMPARE_REGISTER_6, TIMERD_CAPTUREMODE_FALLING_EDGE, TIMERD_CAPTUREMODE_NO_CAPTURE, TIMERD_CAPTUREMODE_RISING_AND_FALLING_EDGE, TIMERD_CAPTUREMODE_RISING_EDGE, TIMERD_DO_CLEAR, TIMERD_DUAL_CAPTURE_MODE, TIMERD_OUTPUTMODE_OUTBITVALUE, TIMERD_OUTPUTMODE_RESET, TIMERD_OUTPUTMODE_RESET_SET, TIMERD_OUTPUTMODE_SET, TIMERD_OUTPUTMODE_SET_RESET, TIMERD_OUTPUTMODE_TOGGLE, TIMERD_OUTPUTMODE_TOGGLE_RESET, TIMERD_OUTPUTMODE_TOGGLE_SET, TIMERD_SINGLE_CAPTURE_MODE, and TIMERD_TDIE_INTERRUPT_ENABLE.

void TimerD_initCompare	(	unsigned int	baseAddress,
		unsigned int	compareRegister,
		unsigned short	compareInterruptEnable,
		unsigned int	compareOutputMode,
		unsigned int	compareValue
	)

Initializes Compare Mode

Parameters:

baseAddress	is the base address of the Timer module.
compareRegister	selects the Capture register being used. Valid values are TIMERD_CAPTURECOMPARE_REGISTER_0 TIMERD_CAPTURECOMPARE_REGISTER_1 TIMERD_CAPTURECOMPARE_REGISTER_2 TIMERD_CAPTURECOMPARE_REGISTER_3 TIMERD_CAPTURECOMPARE_REGISTER_4 TIMERD_CAPTURECOMPARE_REGISTER_5 TIMERD_CAPTURECOMPARE_REGISTER_6 Refer datasheet to ensure the device has the capture compare register being used
compareInterruptEnable	is to enable or disable timer captureComapre interrupt. Valid values are TIMERD_CAPTURECOMPARE_INTERRUPT_ENABLE and TIMERD_CAPTURECOMPARE_INTERRUPT_DISABLE [Default value]
compareOutputMode	specifies the ouput mode. Valid values are TIMERD_OUTPUTMODE_OUTBITVALUE [Default value], TIMERD_OUTPUTMODE_SET, TIMERD_OUTPUTMODE_TOGGLE_RESET, TIMERD_OUTPUTMODE_SET_RESET TIMERD_OUTPUTMODE_TOGGLE, TIMERD_OUTPUTMODE_RESET, TIMERD_OUTPUTMODE_TOGGLE_SET, TIMERD_OUTPUTMODE_RESET_SET
compareValue	is the count to be compared with in compare mode

Modified register is TDxCCTLn and TDxCCRn

Returns:

None

References ASSERT, HWREG, TIMERD_CAPTURECOMPARE_INTERRUPT_DISABLE, TIMERD_CAPTURECOMPARE_INTERRUPT_ENABLE, TIMERD_CAPTURECOMPARE_REGISTER_0, TIMERD_CAPTURECOMPARE_REGISTER_1, TIMERD_CAPTURECOMPARE_REGISTER_2, TIMERD_CAPTURECOMPARE_REGISTER_3, TIMERD_CAPTURECOMPARE_REGISTER_4, TIMERD_CAPTURECOMPARE_REGISTER_5, TIMERD_CAPTURECOMPARE_REGISTER_6, TIMERD_OUTPUTMODE_OUTBITVALUE, TIMERD_OUTPUTMODE_RESET, TIMERD_OUTPUTMODE_RESET_SET, TIMERD_OUTPUTMODE_SET, TIMERD_OUTPUTMODE_SET_RESET, TIMERD_OUTPUTMODE_TOGGLE, TIMERD_OUTPUTMODE_TOGGLE_RESET, and TIMERD_OUTPUTMODE_TOGGLE_SET.

void TimerD_enableTimerInterrupt

(

unsigned int

baseAddress

)

Enable timer interrupt

Parameters:

baseAddress

is the base address of the Timer module.

Modified register is TDxCTL0

Returns:

None

References HWREGB.

void TimerD_enableHighResInterrupt	(	unsigned int	baseAddress,
		unsigned int	mask
	)

Enable High Resolution interrupt

Parameters:

baseAddress	is the base address of the Timer module.
mask	is the mask for the interrupt status Valid values is an OR of TIMERD_HIGH_RES_FREQUENCY_UNLOCK, TIMERD_HIGH_RES_FREQUENCY_LOCK TIMERD_HIGH_RES_FAIL_HIGH, TIMERD_HIGH_RES_FAIL_LOW

Modified register is TDxHINT

Returns:

NONE

References HWREG.

void TimerD_disableTimerInterrupt

(

unsigned int

baseAddress

)

Disable timer interrupt

Parameters:

baseAddress

is the base address of the Timer module.

Modified register is TDxCTL0

Returns:

None

References HWREGB.

void TimerD_disableHighResInterrupt	(	unsigned int	baseAddress,
		unsigned int	mask
	)

Disable High Resolution interrupt

Parameters:

baseAddress	is the base address of the Timer module.
mask	is the mask for the interrupt status Valid values is an OR of TIMERD_HIGH_RES_FREQUENCY_UNLOCK, TIMERD_HIGH_RES_FREQUENCY_LOCK TIMERD_HIGH_RES_FAIL_HIGH, TIMERD_HIGH_RES_FAIL_LOW

Modified register is TDxHINT

Returns:

NONE

References HWREG.

unsigned long TimerD_getTimerInterruptStatus

(

unsigned int

baseAddress

)

Get timer interrupt status

Parameters:

baseAddress

is the base address of the Timer module.

Returns:

unsigned char. Return interrupt status. Valid values are TIMERD_INTERRUPT_PENDING TIMERD_INTERRUPT_NOT_PENDING

References HWREGB.

void TimerD_enableCaptureCompareInterrupt	(	unsigned int	baseAddress,
		unsigned int	captureCompareRegister
	)

Enable capture compare interrupt

Parameters:

baseAddress	is the base address of the Timer module.
captureCompareRegister	is the selected capture compare regsiter

Modified register is TDxCCTLn

Returns:

None

References ASSERT, HWREG, HWREGB, TIMERD_CAPTURECOMPARE_REGISTER_0, TIMERD_CAPTURECOMPARE_REGISTER_1, TIMERD_CAPTURECOMPARE_REGISTER_2, TIMERD_CAPTURECOMPARE_REGISTER_3, TIMERD_CAPTURECOMPARE_REGISTER_4, TIMERD_CAPTURECOMPARE_REGISTER_5, and TIMERD_CAPTURECOMPARE_REGISTER_6.

void TimerD_disableCaptureCompareInterrupt	(	unsigned int	baseAddress,
		unsigned int	captureCompareRegister
	)

Disable capture compare interrupt

Parameters:

baseAddress	is the base address of the Timer module.
captureCompareRegister	is the selected capture compare regsiter

Modified register is TDxCCTLn

Returns:

None

References ASSERT, HWREG, TIMERD_CAPTURECOMPARE_REGISTER_0, TIMERD_CAPTURECOMPARE_REGISTER_1, TIMERD_CAPTURECOMPARE_REGISTER_2, TIMERD_CAPTURECOMPARE_REGISTER_3, TIMERD_CAPTURECOMPARE_REGISTER_4, TIMERD_CAPTURECOMPARE_REGISTER_5, and TIMERD_CAPTURECOMPARE_REGISTER_6.

unsigned long TimerD_getCaptureCompareInterruptStatus	(	unsigned int	baseAddress,
		unsigned int	captureCompareRegister,
		unsigned int	mask
	)

Return capture compare interrupt status

Parameters:

baseAddress	is the base address of the Timer module.
captureCompareRegister	is the selected capture compare register
mask	is the mask for the interrupt status Valid values is an OR of TIMERD_CAPTURE_OVERFLOW, TIMERD_CAPTURECOMPARE_INTERRUPT_FLAG

Returns:

unsigned long. The mask of the set flags. Modifed Registers None

References HWREG.

unsigned int TimerD_getHighResInterruptStatus	(	unsigned int	baseAddress,
		unsigned int	mask
	)

Returns High Resolution interrupt status

Parameters:

baseAddress	is the base address of the Timer module.
mask	is the mask for the interrupt status Valid values is an OR of TIMERD_HIGH_RES_FREQUENCY_UNLOCK, TIMERD_HIGH_RES_FREQUENCY_LOCK TIMERD_HIGH_RES_FAIL_HIGH, TIMERD_HIGH_RES_FAIL_LOW

Modified register is TDxHINT

Returns:

unsigned long. The mask of the set flags.

References HWREG.

void TimerD_clear

(

unsigned int

baseAddress

)

Reset/Clear the timer clock divider, count direction, count

Parameters:

baseAddress

is the base address of the Timer module.

Modified register is TDxCTL0

Returns:

None

References HWREG.

void TimerD_clearHighResInterruptStatus	(	unsigned int	baseAddress,
		unsigned int	mask
	)

Clears High Resolution interrupt status

Parameters:

baseAddress	is the base address of the Timer module.
mask	is the mask for the interrupt status Valid values is an OR of TIMERD_HIGH_RES_FREQUENCY_UNLOCK, TIMERD_HIGH_RES_FREQUENCY_LOCK TIMERD_HIGH_RES_FAIL_HIGH, TIMERD_HIGH_RES_FAIL_LOW

Modified register is TDxHINT

Returns:

none

References HWREG.

unsigned short TimerD_getSynchronizedCaptureCompareInput	(	unsigned int	baseAddress,
		unsigned int	captureCompareRegister,
		unsigned short	synchronized
	)

Get synchrnozied capturecompare input

Parameters:

baseAddress	is the base address of the Timer module.
captureRegister	selects the Capture register being used. Valid values are TIMERD_CAPTURECOMPARE_REGISTER_0 TIMERD_CAPTURECOMPARE_REGISTER_1 TIMERD_CAPTURECOMPARE_REGISTER_2 TIMERD_CAPTURECOMPARE_REGISTER_3 TIMERD_CAPTURECOMPARE_REGISTER_4 TIMERD_CAPTURECOMPARE_REGISTER_5 TIMERD_CAPTURECOMPARE_REGISTER_6 Refer datasheet to ensure the device has the capture compare register being used
synchronized	is to select type of capture compare input. Valid values are TIMERD_READ_CAPTURE_COMPARE_INPUT TIMERD_READ_SYNCHRONIZED_CAPTURECOMPAREINPUT

Returns:

TIMERD_CAPTURECOMPARE_INPUT_HIGH or TIMERD_CAPTURECOMPARE_INPUT_LOW Modifed Registers None

References ASSERT, HWREG, TIMERD_CAPTURECOMPARE_INPUT_HIGH, TIMERD_CAPTURECOMPARE_INPUT_LOW, TIMERD_CAPTURECOMPARE_REGISTER_0, TIMERD_CAPTURECOMPARE_REGISTER_1, TIMERD_CAPTURECOMPARE_REGISTER_2, TIMERD_CAPTURECOMPARE_REGISTER_3, TIMERD_CAPTURECOMPARE_REGISTER_4, TIMERD_CAPTURECOMPARE_REGISTER_5, TIMERD_CAPTURECOMPARE_REGISTER_6, TIMERD_READ_CAPTURE_COMPARE_INPUT, and TIMERD_READ_SYNCHRONIZED_CAPTURECOMPAREINPUT.

unsigned char TimerD_getOutputForOutputModeOutBitValue	(	unsigned int	baseAddress,
		unsigned int	captureCompareRegister
	)

Get ouput bit for output mode

Parameters:

baseAddress	is the base address of the Timer module.
captureRegister	selects the Capture register being used. Valid values are TIMERD_CAPTURECOMPARE_REGISTER_0 TIMERD_CAPTURECOMPARE_REGISTER_1 TIMERD_CAPTURECOMPARE_REGISTER_2 TIMERD_CAPTURECOMPARE_REGISTER_3 TIMERD_CAPTURECOMPARE_REGISTER_4 TIMERD_CAPTURECOMPARE_REGISTER_5 TIMERD_CAPTURECOMPARE_REGISTER_6 Refer datasheet to ensure the device has the capture compare register being used

Returns:

TIMERD_OUTPUTMODE_OUTBITVALUE_HIGH or TIMERD_OUTPUTMODE_OUTBITVALUE_LOW

References ASSERT, HWREG, TIMERD_CAPTURECOMPARE_REGISTER_0, TIMERD_CAPTURECOMPARE_REGISTER_1, TIMERD_CAPTURECOMPARE_REGISTER_2, TIMERD_CAPTURECOMPARE_REGISTER_3, TIMERD_CAPTURECOMPARE_REGISTER_4, TIMERD_CAPTURECOMPARE_REGISTER_5, TIMERD_CAPTURECOMPARE_REGISTER_6, TIMERD_OUTPUTMODE_OUTBITVALUE_HIGH, and TIMERD_OUTPUTMODE_OUTBITVALUE_LOW.

unsigned int TimerD_getCaptureCompareCount	(	unsigned int	baseAddress,
		unsigned int	captureCompareRegister
	)

Get current capturecompare count

Parameters:

baseAddress	is the base address of the Timer module.
captureCompareRegister	selects the Capture register being used. Valid values are TIMERD_CAPTURECOMPARE_REGISTER_0 TIMERD_CAPTURECOMPARE_REGISTER_1 TIMERD_CAPTURECOMPARE_REGISTER_2 TIMERD_CAPTURECOMPARE_REGISTER_3 TIMERD_CAPTURECOMPARE_REGISTER_4 TIMERD_CAPTURECOMPARE_REGISTER_5 TIMERD_CAPTURECOMPARE_REGISTER_6 Refer datasheet to ensure the device has the capture compare register being used

Returns:

current count as unsigned int Modifed Registers None

References ASSERT, HWREG, TIMERD_CAPTURECOMPARE_REGISTER_0, TIMERD_CAPTURECOMPARE_REGISTER_1, TIMERD_CAPTURECOMPARE_REGISTER_2, TIMERD_CAPTURECOMPARE_REGISTER_3, TIMERD_CAPTURECOMPARE_REGISTER_4, TIMERD_CAPTURECOMPARE_REGISTER_5, and TIMERD_CAPTURECOMPARE_REGISTER_6.

unsigned int TimerD_getCaptureCompareLatchCount	(	unsigned int	baseAddress,
		unsigned int	captureCompareRegister
	)

Get current capture compare latch register count

Parameters:

baseAddress	is the base address of the Timer module.
captureCompareRegister	selects the Capture register being used. Valid values are TIMERD_CAPTURECOMPARE_REGISTER_0 TIMERD_CAPTURECOMPARE_REGISTER_1 TIMERD_CAPTURECOMPARE_REGISTER_2 TIMERD_CAPTURECOMPARE_REGISTER_3 TIMERD_CAPTURECOMPARE_REGISTER_4 TIMERD_CAPTURECOMPARE_REGISTER_5 TIMERD_CAPTURECOMPARE_REGISTER_6 Refer datasheet to ensure the device has the capture compare register being used

Returns:

current count as unsigned int Modifed Registers None

References ASSERT, HWREG, TIMERD_CAPTURECOMPARE_REGISTER_0, TIMERD_CAPTURECOMPARE_REGISTER_1, TIMERD_CAPTURECOMPARE_REGISTER_2, TIMERD_CAPTURECOMPARE_REGISTER_3, TIMERD_CAPTURECOMPARE_REGISTER_4, TIMERD_CAPTURECOMPARE_REGISTER_5, and TIMERD_CAPTURECOMPARE_REGISTER_6.

unsigned char TimerD_getCaptureCompareInputSignal	(	unsigned int	baseAddress,
		unsigned int	captureCompareRegister
	)

Get current capturecompare input signal

Parameters:

baseAddress	is the base address of the Timer module.
captureCompareRegister	selects the Capture register being used. Valid values are TIMERD_CAPTURECOMPARE_REGISTER_0 TIMERD_CAPTURECOMPARE_REGISTER_1 TIMERD_CAPTURECOMPARE_REGISTER_2 TIMERD_CAPTURECOMPARE_REGISTER_3 TIMERD_CAPTURECOMPARE_REGISTER_4 TIMERD_CAPTURECOMPARE_REGISTER_5 TIMERD_CAPTURECOMPARE_REGISTER_6 Refer datasheet to ensure the device has the capture compare register being used

Returns:

current input signal as TIMERD_CAPTURECOMPARE_INPUT or 0x00 Modifed Registers None

References ASSERT, HWREGB, TIMERD_CAPTURECOMPARE_REGISTER_0, TIMERD_CAPTURECOMPARE_REGISTER_1, TIMERD_CAPTURECOMPARE_REGISTER_2, TIMERD_CAPTURECOMPARE_REGISTER_3, TIMERD_CAPTURECOMPARE_REGISTER_4, TIMERD_CAPTURECOMPARE_REGISTER_5, and TIMERD_CAPTURECOMPARE_REGISTER_6.

void TimerD_setOutputForOutputModeOutBitValue	(	unsigned int	baseAddress,
		unsigned int	captureCompareRegister,
		unsigned char	outputModeOutBitValue
	)

Set ouput bit for output mode

Parameters:

baseAddress	is the base address of the Timer module.
captureCompareRegister	selects the Capture register being used. Valid values are TIMERD_CAPTURECOMPARE_REGISTER_0 TIMERD_CAPTURECOMPARE_REGISTER_1 TIMERD_CAPTURECOMPARE_REGISTER_2 TIMERD_CAPTURECOMPARE_REGISTER_3 TIMERD_CAPTURECOMPARE_REGISTER_4 TIMERD_CAPTURECOMPARE_REGISTER_5 TIMERD_CAPTURECOMPARE_REGISTER_6 Refer datasheet to ensure the device has the capture compare register being used
outputModeOutBitValueis	the value to be set for out bit Valid values are TIMERD_OUTPUTMODE_OUTBITVALUE_HIGH TIMERD_OUTPUTMODE_OUTBITVALUE_LOW

Modified register is TDxCCTLn

Returns:

None

References ASSERT, HWREG, TIMERD_CAPTURECOMPARE_REGISTER_0, TIMERD_CAPTURECOMPARE_REGISTER_1, TIMERD_CAPTURECOMPARE_REGISTER_2, TIMERD_CAPTURECOMPARE_REGISTER_3, TIMERD_CAPTURECOMPARE_REGISTER_4, TIMERD_CAPTURECOMPARE_REGISTER_5, TIMERD_CAPTURECOMPARE_REGISTER_6, TIMERD_OUTPUTMODE_OUTBITVALUE_HIGH, and TIMERD_OUTPUTMODE_OUTBITVALUE_LOW.

void TimerD_generatePWM	(	unsigned int	baseAddress,
		unsigned int	clockSource,
		unsigned int	clockSourceDivider,
		unsigned int	clockingMode,
		unsigned int	timerPeriod,
		unsigned int	compareRegister,
		unsigned int	compareOutputMode,
		unsigned int	dutyCycle
	)

Generate a PWM with timer running in up down mode

Parameters:

baseAddress	is the base address of the Timer module.
clockSource	selects Clock source. Valid values are TIMERD_CLOCKSOURCE_EXTERNAL_TDCLK [Default value] TIMERD_CLOCKSOURCE_ACLK TIMERD_CLOCKSOURCE_SMCLK TIMERD_CLOCKSOURCE_INVERTED_EXTERNAL_TDCLK
clockSourceDivider	is the divider for Clock source. Valid values are TIMERD_CLOCKSOURCE_DIVIDER_1 [Default value] TIMERD_CLOCKSOURCE_DIVIDER_2 TIMERD_CLOCKSOURCE_DIVIDER_4 TIMERD_CLOCKSOURCE_DIVIDER_8 TIMERD_CLOCKSOURCE_DIVIDER_3 TIMERD_CLOCKSOURCE_DIVIDER_5 TIMERD_CLOCKSOURCE_DIVIDER_6 TIMERD_CLOCKSOURCE_DIVIDER_7 TIMERD_CLOCKSOURCE_DIVIDER_10 TIMERD_CLOCKSOURCE_DIVIDER_12 TIMERD_CLOCKSOURCE_DIVIDER_14 TIMERD_CLOCKSOURCE_DIVIDER_16 TIMERD_CLOCKSOURCE_DIVIDER_20 TIMERD_CLOCKSOURCE_DIVIDER_24 TIMERD_CLOCKSOURCE_DIVIDER_28 TIMERD_CLOCKSOURCE_DIVIDER_32 TIMERD_CLOCKSOURCE_DIVIDER_40 TIMERD_CLOCKSOURCE_DIVIDER_48 TIMERD_CLOCKSOURCE_DIVIDER_56 TIMERD_CLOCKSOURCE_DIVIDER_64
clockingMode	is the selected clock mode register values. Valid values are TIMERD_CLOCKINGMODE_EXTERNAL_CLOCK [Default value] TIMERD_CLOCKINGMODE_HIRES_LOCAL_CLOCK TIMERD_CLOCKINGMODE_AUXILIARY_CLK
timerPeriod	selects the desired timer period
compareRegister	selects the compare register being used. Valid values are TIMERD_CAPTURECOMPARE_REGISTER_0 TIMERD_CAPTURECOMPARE_REGISTER_1 TIMERD_CAPTURECOMPARE_REGISTER_2 TIMERD_CAPTURECOMPARE_REGISTER_3 TIMERD_CAPTURECOMPARE_REGISTER_4 TIMERD_CAPTURECOMPARE_REGISTER_5 TIMERD_CAPTURECOMPARE_REGISTER_6 Refer datasheet to ensure the device has the capture compare register being used
compareOutputMode	specifies the ouput mode. Valid values are TIMERD_OUTPUTMODE_OUTBITVALUE, TIMERD_OUTPUTMODE_SET, TIMERD_OUTPUTMODE_TOGGLE_RESET, TIMERD_OUTPUTMODE_SET_RESET TIMERD_OUTPUTMODE_TOGGLE, TIMERD_OUTPUTMODE_RESET, TIMERD_OUTPUTMODE_TOGGLE_SET, TIMERD_OUTPUTMODE_RESET_SET
dutyCycle	specifies the dutycycle for the generated waveform

Modified registers are TDxCTL0, TDxCTL1, TDxCCR0, TDxCCTL0,TDxCCTLn

Returns:

None

References ASSERT, HWREG, privateTimerDProcessClockSourceDivider(), TIMERD_CAPTURECOMPARE_INTERRUPT_ENABLE, TIMERD_CAPTURECOMPARE_REGISTER_0, TIMERD_CAPTURECOMPARE_REGISTER_1, TIMERD_CAPTURECOMPARE_REGISTER_2, TIMERD_CAPTURECOMPARE_REGISTER_3, TIMERD_CAPTURECOMPARE_REGISTER_4, TIMERD_CAPTURECOMPARE_REGISTER_5, TIMERD_CAPTURECOMPARE_REGISTER_6, TIMERD_CLOCKINGMODE_AUXILIARY_CLK, TIMERD_CLOCKINGMODE_EXTERNAL_CLOCK, TIMERD_CLOCKINGMODE_HIRES_LOCAL_CLOCK, TIMERD_CLOCKSOURCE_ACLK, TIMERD_CLOCKSOURCE_DIVIDER_1, TIMERD_CLOCKSOURCE_DIVIDER_10, TIMERD_CLOCKSOURCE_DIVIDER_12, TIMERD_CLOCKSOURCE_DIVIDER_14, TIMERD_CLOCKSOURCE_DIVIDER_16, TIMERD_CLOCKSOURCE_DIVIDER_2, TIMERD_CLOCKSOURCE_DIVIDER_20, TIMERD_CLOCKSOURCE_DIVIDER_24, TIMERD_CLOCKSOURCE_DIVIDER_28, TIMERD_CLOCKSOURCE_DIVIDER_3, TIMERD_CLOCKSOURCE_DIVIDER_32, TIMERD_CLOCKSOURCE_DIVIDER_4, TIMERD_CLOCKSOURCE_DIVIDER_40, TIMERD_CLOCKSOURCE_DIVIDER_48, TIMERD_CLOCKSOURCE_DIVIDER_5, TIMERD_CLOCKSOURCE_DIVIDER_56, TIMERD_CLOCKSOURCE_DIVIDER_6, TIMERD_CLOCKSOURCE_DIVIDER_64, TIMERD_CLOCKSOURCE_DIVIDER_7, TIMERD_CLOCKSOURCE_DIVIDER_8, TIMERD_CLOCKSOURCE_INVERTED_EXTERNAL_TDCLK, TIMERD_CLOCKSOURCE_SMCLK, TIMERD_DO_CLEAR, TIMERD_OUTPUTMODE_OUTBITVALUE, TIMERD_OUTPUTMODE_RESET, TIMERD_OUTPUTMODE_RESET_SET, TIMERD_OUTPUTMODE_SET, TIMERD_OUTPUTMODE_SET_RESET, TIMERD_OUTPUTMODE_TOGGLE, TIMERD_OUTPUTMODE_TOGGLE_RESET, TIMERD_OUTPUTMODE_TOGGLE_SET, TIMERD_TDIE_INTERRUPT_ENABLE, TIMERD_UP_MODE, and TIMERD_UPDOWN_MODE.

void TimerD_stop

(

unsigned int

baseAddress

)

Stops the timer

Parameters:

baseAddress

is the base address of the Timer module.

Modified registers are TDxCTL0

Returns:

None

References HWREG.

void TimerD_setCompareValue	(	unsigned int	baseAddress,
		unsigned int	compareRegister,
		unsigned int	compareValue
	)

Sets the value of the capture-compare register

Parameters:

baseAddress	is the base address of the Timer module.
compareRegister	selects the Capture register being used. Valid values are TIMERD_CAPTURECOMPARE_REGISTER_0 TIMERD_CAPTURECOMPARE_REGISTER_1 TIMERD_CAPTURECOMPARE_REGISTER_2 TIMERD_CAPTURECOMPARE_REGISTER_3 TIMERD_CAPTURECOMPARE_REGISTER_4 TIMERD_CAPTURECOMPARE_REGISTER_5 TIMERD_CAPTURECOMPARE_REGISTER_6 Refer datasheet to ensure the device has the capture compare register being used
compareValue	is the count to be compared with in compare mode

Modified register is TDxCCRn

Returns:

None

References ASSERT, HWREG, TIMERD_CAPTURECOMPARE_REGISTER_0, TIMERD_CAPTURECOMPARE_REGISTER_1, TIMERD_CAPTURECOMPARE_REGISTER_2, TIMERD_CAPTURECOMPARE_REGISTER_3, TIMERD_CAPTURECOMPARE_REGISTER_4, TIMERD_CAPTURECOMPARE_REGISTER_5, and TIMERD_CAPTURECOMPARE_REGISTER_6.

void TimerD_clearTimerInterruptFlag

(

unsigned int

baseAddress

)

Clears the Timer TAIFG interrupt flag

Parameters:

baseAddress

is the base address of the Timer module.

Modified bits are TAIFG og TDxCTL0 register

Returns:

None

References HWREGB.

void TimerD_clearCaptureCompareInterruptFlag	(	unsigned int	baseAddress,
		unsigned int	captureCompareRegister
	)

Clears the capture-compare interrupt flag

Parameters:

baseAddress	is the base address of the Timer module.
captureCompareRegister	selects the Capture-compare register being used. Valid values are TIMERD_CAPTURECOMPARE_REGISTER_0 TIMERD_CAPTURECOMPARE_REGISTER_1 TIMERD_CAPTURECOMPARE_REGISTER_2 TIMERD_CAPTURECOMPARE_REGISTER_3 TIMERD_CAPTURECOMPARE_REGISTER_4 TIMERD_CAPTURECOMPARE_REGISTER_5 TIMERD_CAPTURECOMPARE_REGISTER_6 Refer datasheet to ensure the device has the capture compare register being used

Modified bits are CCIFG of TDxCCTLn register

Returns:

None

References ASSERT, HWREG, TIMERD_CAPTURECOMPARE_REGISTER_0, TIMERD_CAPTURECOMPARE_REGISTER_1, TIMERD_CAPTURECOMPARE_REGISTER_2, TIMERD_CAPTURECOMPARE_REGISTER_3, TIMERD_CAPTURECOMPARE_REGISTER_4, TIMERD_CAPTURECOMPARE_REGISTER_5, and TIMERD_CAPTURECOMPARE_REGISTER_6.

unsigned char TimerD_configureHighResGeneratorInFreeRunningMode	(	unsigned int	baseAddress,
		unsigned char	desiredHighResFrequency
	)

Configures Timer_D in free running mode

Parameters:

baseAddress	is the base address of the Timer module.
desiredHighResFrequency	selects the desired High Resolution frequency used. Valid values are TIMERD_HIGHRES_64MHZ TIMERD_HIGHRES_128MHZ TIMERD_HIGHRES_200MHZ TIMERD_HIGHRES_256MHZ

Modified registers are TDxHCTL1, TDxCTL1 and TDxHCTL0 register

Returns:

STATUS_SUCCESS or STATUS_FAIL

References ASSERT, HWREG, STATUS_FAIL, STATUS_SUCCESS, TIMERD_HIGHRES_128MHZ, TIMERD_HIGHRES_200MHZ, TIMERD_HIGHRES_256MHZ, TIMERD_HIGHRES_64MHZ, TLV_getInfo(), and TLV_TIMER_D_CAL.

void TimerD_configureHighResGeneratorInRegulatedMode	(	unsigned int	baseAddress,
		unsigned int	clockSource,
		unsigned int	clockSourceDivider,
		unsigned int	clockingMode,
		unsigned char	highResClockMultiplyFactor,
		unsigned char	highResClockDivider
	)

Configures Timer_D in Regulated mode

Parameters:

baseAddress	is the base address of the Timer module.
clockSource	selects Clock source. Valid values are TIMERD_CLOCKSOURCE_EXTERNAL_TDCLK [Default value] TIMERD_CLOCKSOURCE_ACLK TIMERD_CLOCKSOURCE_SMCLK TIMERD_CLOCKSOURCE_INVERTED_EXTERNAL_TDCLK
clockSourceDivider	is the divider for Clock source. Valid values are TIMERD_CLOCKSOURCE_DIVIDER_1 [Default value] TIMERD_CLOCKSOURCE_DIVIDER_2 TIMERD_CLOCKSOURCE_DIVIDER_4 TIMERD_CLOCKSOURCE_DIVIDER_8 TIMERD_CLOCKSOURCE_DIVIDER_3 TIMERD_CLOCKSOURCE_DIVIDER_5 TIMERD_CLOCKSOURCE_DIVIDER_6 TIMERD_CLOCKSOURCE_DIVIDER_7 TIMERD_CLOCKSOURCE_DIVIDER_10 TIMERD_CLOCKSOURCE_DIVIDER_12 TIMERD_CLOCKSOURCE_DIVIDER_14 TIMERD_CLOCKSOURCE_DIVIDER_16 TIMERD_CLOCKSOURCE_DIVIDER_20 TIMERD_CLOCKSOURCE_DIVIDER_24 TIMERD_CLOCKSOURCE_DIVIDER_28 TIMERD_CLOCKSOURCE_DIVIDER_32 TIMERD_CLOCKSOURCE_DIVIDER_40 TIMERD_CLOCKSOURCE_DIVIDER_48 TIMERD_CLOCKSOURCE_DIVIDER_56 TIMERD_CLOCKSOURCE_DIVIDER_64
clockingMode	is the selected clock mode register values. Valid values are TIMERD_CLOCKINGMODE_EXTERNAL_CLOCK [Default value] TIMERD_CLOCKINGMODE_HIRES_LOCAL_CLOCK TIMERD_CLOCKINGMODE_AUXILIARY_CLK
highResClockMultiplyFactor	selects the high resolution multiply factor. TIMERD_HIGHRES_CLK_MULTIPLY_FACTOR_8x TIMERD_HIGHRES_CLK_MULTIPLY_FACTOR_16x
highResClockDivider	selects the high resolution divider. TIMERD_HIGHRES_CLK_DIVIDER_1 [Default value] TIMERD_HIGHRES_CLK_DIVIDER_2 TIMERD_HIGHRES_CLK_DIVIDER_4 TIMERD_HIGHRES_CLK_DIVIDER_8

Modified registers are OFS_TDxCTL0, TDxCTL1 and TDxHCTL0 register

Returns:

NONE

References ASSERT, HWREG, privateTimerDProcessClockSourceDivider(), TIMERD_CLOCKINGMODE_AUXILIARY_CLK, TIMERD_CLOCKINGMODE_EXTERNAL_CLOCK, TIMERD_CLOCKINGMODE_HIRES_LOCAL_CLOCK, TIMERD_CLOCKSOURCE_ACLK, TIMERD_CLOCKSOURCE_DIVIDER_1, TIMERD_CLOCKSOURCE_DIVIDER_10, TIMERD_CLOCKSOURCE_DIVIDER_12, TIMERD_CLOCKSOURCE_DIVIDER_14, TIMERD_CLOCKSOURCE_DIVIDER_16, TIMERD_CLOCKSOURCE_DIVIDER_2, TIMERD_CLOCKSOURCE_DIVIDER_20, TIMERD_CLOCKSOURCE_DIVIDER_24, TIMERD_CLOCKSOURCE_DIVIDER_28, TIMERD_CLOCKSOURCE_DIVIDER_3, TIMERD_CLOCKSOURCE_DIVIDER_32, TIMERD_CLOCKSOURCE_DIVIDER_4, TIMERD_CLOCKSOURCE_DIVIDER_40, TIMERD_CLOCKSOURCE_DIVIDER_48, TIMERD_CLOCKSOURCE_DIVIDER_5, TIMERD_CLOCKSOURCE_DIVIDER_56, TIMERD_CLOCKSOURCE_DIVIDER_6, TIMERD_CLOCKSOURCE_DIVIDER_64, TIMERD_CLOCKSOURCE_DIVIDER_7, TIMERD_CLOCKSOURCE_DIVIDER_8, and TIMERD_CLOCKSOURCE_SMCLK.

void TimerD_combineTDCCRToGeneratePWM	(	unsigned int	baseAddress,
		unsigned int	clockSource,
		unsigned int	clockSourceDivider,
		unsigned int	clockingMode,
		unsigned int	timerPeriod,
		unsigned int	combineCCRRegistersCombination,
		unsigned int	compareOutputMode,
		unsigned int	dutyCycle1,
		unsigned int	dutyCycle2
	)

Combine TDCCRto get PWM

Parameters:

baseAddress	is the base address of the Timer module.
clockSource	selects Clock source. Valid values are TIMERD_CLOCKSOURCE_EXTERNAL_TDCLK [Default value] TIMERD_CLOCKSOURCE_ACLK TIMERD_CLOCKSOURCE_SMCLK TIMERD_CLOCKSOURCE_INVERTED_EXTERNAL_TDCLK
clockSourceDivider	is the divider for Clock source. Valid values are TIMERD_CLOCKSOURCE_DIVIDER_1 [Default value] TIMERD_CLOCKSOURCE_DIVIDER_2 TIMERD_CLOCKSOURCE_DIVIDER_4 TIMERD_CLOCKSOURCE_DIVIDER_8 TIMERD_CLOCKSOURCE_DIVIDER_3 TIMERD_CLOCKSOURCE_DIVIDER_5 TIMERD_CLOCKSOURCE_DIVIDER_6 TIMERD_CLOCKSOURCE_DIVIDER_7 TIMERD_CLOCKSOURCE_DIVIDER_10 TIMERD_CLOCKSOURCE_DIVIDER_12 TIMERD_CLOCKSOURCE_DIVIDER_14 TIMERD_CLOCKSOURCE_DIVIDER_16 TIMERD_CLOCKSOURCE_DIVIDER_20 TIMERD_CLOCKSOURCE_DIVIDER_24 TIMERD_CLOCKSOURCE_DIVIDER_28 TIMERD_CLOCKSOURCE_DIVIDER_32 TIMERD_CLOCKSOURCE_DIVIDER_40 TIMERD_CLOCKSOURCE_DIVIDER_48 TIMERD_CLOCKSOURCE_DIVIDER_56 TIMERD_CLOCKSOURCE_DIVIDER_64
clockingMode	is the selected clock mode register values. Valid values are TIMERD_CLOCKINGMODE_EXTERNAL_CLOCK [Default value] TIMERD_CLOCKINGMODE_HIRES_LOCAL_CLOCK TIMERD_CLOCKINGMODE_AUXILIARY_CLK !
timerPeriod	selects the desired timer period
combineCCRRegistersCombination	selects desired CCR registers to combine TIMERD_COMBINE_CCR1_CCR2 TIMERD_COMBINE_CCR3_CCR4 (available on Timer_D5, Timer_D7) TIMERD_COMBINE_CCR5_CCR6(available only on Timer_D7)
compareOutputMode	specifies the ouput mode. Valid values are TIMERD_OUTPUTMODE_OUTBITVALUE, TIMERD_OUTPUTMODE_SET, TIMERD_OUTPUTMODE_TOGGLE_RESET, TIMERD_OUTPUTMODE_SET_RESET TIMERD_OUTPUTMODE_TOGGLE, TIMERD_OUTPUTMODE_RESET, TIMERD_OUTPUTMODE_TOGGLE_SET, TIMERD_OUTPUTMODE_RESET_SET
dutyCycle	specifies the dutycycle for the generated waveform

Modified registers are TDxCTL0, TDxCTL1, TDxCCR0, TDxCCTL0,TDxCCTLn

Returns:

None

References ASSERT, HWREG, privateTimerDProcessClockSourceDivider(), TIMERD_CLOCKINGMODE_AUXILIARY_CLK, TIMERD_CLOCKINGMODE_EXTERNAL_CLOCK, TIMERD_CLOCKINGMODE_HIRES_LOCAL_CLOCK, TIMERD_CLOCKSOURCE_ACLK, TIMERD_CLOCKSOURCE_DIVIDER_1, TIMERD_CLOCKSOURCE_DIVIDER_10, TIMERD_CLOCKSOURCE_DIVIDER_12, TIMERD_CLOCKSOURCE_DIVIDER_14, TIMERD_CLOCKSOURCE_DIVIDER_16, TIMERD_CLOCKSOURCE_DIVIDER_2, TIMERD_CLOCKSOURCE_DIVIDER_20, TIMERD_CLOCKSOURCE_DIVIDER_24, TIMERD_CLOCKSOURCE_DIVIDER_28, TIMERD_CLOCKSOURCE_DIVIDER_3, TIMERD_CLOCKSOURCE_DIVIDER_32, TIMERD_CLOCKSOURCE_DIVIDER_4, TIMERD_CLOCKSOURCE_DIVIDER_40, TIMERD_CLOCKSOURCE_DIVIDER_48, TIMERD_CLOCKSOURCE_DIVIDER_5, TIMERD_CLOCKSOURCE_DIVIDER_56, TIMERD_CLOCKSOURCE_DIVIDER_6, TIMERD_CLOCKSOURCE_DIVIDER_64, TIMERD_CLOCKSOURCE_DIVIDER_7, TIMERD_CLOCKSOURCE_DIVIDER_8, TIMERD_CLOCKSOURCE_SMCLK, TIMERD_COMBINE_CCR1_CCR2, TIMERD_COMBINE_CCR3_CCR4, TIMERD_COMBINE_CCR5_CCR6, TIMERD_OUTPUTMODE_OUTBITVALUE, TIMERD_OUTPUTMODE_RESET, TIMERD_OUTPUTMODE_RESET_SET, TIMERD_OUTPUTMODE_SET, TIMERD_OUTPUTMODE_SET_RESET, TIMERD_OUTPUTMODE_TOGGLE, TIMERD_OUTPUTMODE_TOGGLE_RESET, and TIMERD_OUTPUTMODE_TOGGLE_SET.

void TimerD_selectLatchingGroup	(	unsigned int	baseAddress,
		unsigned int	groupLatch
	)

Selects TimerD Latching Group

Parameters:

baseAddress	is the base address of the TimerD module.
groupLatch	selects the value of counter length. Valid values are TIMERD_GROUP_NONE [Default value] TIMERD_GROUP_CL12_CL23_CL56 TIMERD_GROUP_CL123_CL456 TIMERD_GROUP_ALL

Modified bits are TDCLGRP of TDxCTL0 register

Returns:

None

References ASSERT, and HWREG.

void TimerD_selectCounterLength	(	unsigned int	baseAddress,
		unsigned int	counterLength
	)

Selects TimerD counter length

Parameters:

baseAddress	is the base address of the TimerD module.
counterLength	selects the value of counter length. Valid values are TIMERD_COUNTER_16BIT [Default value] TIMERD_COUNTER_12BIT TIMERD_COUNTER_10BIT TIMERD_COUNTER_8BIT

Modified bits are CNTL of TDxCTL0 register

Returns:

None

References ASSERT, and HWREG.

void TimerD_initCompareLatchLoadEvent	(	unsigned int	baseAddress,
		unsigned int	compareRegister,
		unsigned int	compareLatchLoadEvent
	)

Selects Compare Latch Load Event

Parameters:

baseAddress	is the base address of the TimerD module.
captureCompareRegister	selects the Capture-compare register being used. Valid values are TIMERD_CAPTURECOMPARE_REGISTER_0 TIMERD_CAPTURECOMPARE_REGISTER_1 TIMERD_CAPTURECOMPARE_REGISTER_2 TIMERD_CAPTURECOMPARE_REGISTER_3 TIMERD_CAPTURECOMPARE_REGISTER_4 TIMERD_CAPTURECOMPARE_REGISTER_5 TIMERD_CAPTURECOMPARE_REGISTER_6
compareLatchLoadEvent	selects the latch load event Valid values are TIMERD_LATCH_ON_WRITE_TO_TDxCCRn_COMPARE_REGISTER [Default value] TIMERD_LATCH_WHEN_COUNTER_COUNTS_TO_0_IN_UP_OR_CONT_MODE TIMERD_LATCH_WHEN_COUNTER_COUNTS_TO_0_IN_UPDOWN_MODE TIMERD_LATCH_WHEN_COUNTER_COUNTS_TO_CURRENT_COMPARE_LATCH_VALUE

Modified bits are CLLD of TDxCCTLn register

Returns:

None

References ASSERT, and HWREG.

void TimerD_disableHighResFastWakeup

(

unsigned int

baseAddress

)

Disable High Resolution fast wakeup

Parameters:

baseAddress

is the base address of the Timer module.

Modified bits are TDHFW of TDxHCTL0 register.

Returns:

NONE

References HWREG.

void TimerD_enableHighResFastWakeup

(

unsigned int

baseAddress

)

Enable High Resolution fast wakeup

Parameters:

baseAddress

is the base address of the Timer module.

Modified bits are TDHFW of TDxHCTL0 register.

Returns:

NONE

References HWREG.

void TimerD_disableHighResClockEnhancedAccuracy

(

unsigned int

baseAddress

)

Disable High Resolution Clock Enhanced Accuracy

Parameters:

baseAddress

is the base address of the Timer module.

Modified bits are TDHEAEN of TDxHCTL0 register.

Returns:

NONE

References HWREG.

void TimerD_enableHighResClockEnhancedAccuracy

(

unsigned int

baseAddress

)

Enable High Resolution Clock Enhanced Accuracy

Parameters:

baseAddress

is the base address of the Timer module.

Modified bits are TDHEAEN of TDxHCTL0 register.

Returns:

NONE

References HWREG.

void TimerD_DisableHighResGeneratorForceON

(

unsigned int

baseAddress

)

Disable High Resolution Clock Enhanced Accuracy

Parameters:

baseAddress

is the base address of the Timer module.

Modified bit is TDHRON of register TDxHCTL0

High-resolution generator is on if the Timer_D counter MCx bits are 01, 10 or 11.

Returns:

NONE

References HWREG.

void TimerD_EnableHighResGeneratorForceON

(

unsigned int

baseAddress

)

Enable High Resolution Clock Enhanced Accuracy

Parameters:

baseAddress

is the base address of the Timer module.

Modified bit is TDHRON of register TDxHCTL0

High-resolution generator is on in all Timer_D MCx modes. The PMM remains in high-current mode.

Returns:

NONE

References HWREG.

void TimerD_selectHighResCoarseClockRange	(	unsigned int	baseAddress,
		unsigned int	highResCoarseClockRange
	)

Select High Resolution Coarse Clock Range

Parameters:

baseAddress	is the base address of the Timer module.
highResCoarseClockRange	selects the High Resolution Coarse Clock Range Valid values are TIMERD_HIGHRES_BELOW_15MHz [Default value] TIMERD_HIGHRES_ABOVE_15MHz

Modified bits are TDHCLKCR of registers TDxHCTL1.

Returns:

NONE

References ASSERT, HWREG, TIMERD_HIGHRES_ABOVE_15MHz, and TIMERD_HIGHRES_BELOW_15MHz.

void TimerD_selectHighResClockRange	(	unsigned int	baseAddress,
		unsigned int	highResClockRange
	)

Select High Resolution Clock Range Selection

Parameters:

baseAddress	is the base address of the Timer module.
highResClockRange	selects the High Resolution Clock Range Valid values are TIMERD_CLOCK_RANGE0 [Default value] TIMERD_CLOCK_RANGE1 TIMERD_CLOCK_RANGE2 Refer Datasheet for frequency details

Modified bits are TDHCLKRx of registers TDxHCTL1 NOTE: In Regulated mode these bits are modified by hardware.

Returns:

NONE

References ASSERT, HWREG, TIMERD_CLOCK_RANGE0, TIMERD_CLOCK_RANGE1, and TIMERD_CLOCK_RANGE2.