Go to the documentation of this file.00001 #ifndef __MSP430WARE_ADC12_H__
00002 #define __MSP430WARE_ADC12_H__
00003
00004
00005
00006
00007
00008
00009
00010 #define __MSP430_HAS_ADC12_PLUS__
00011
00012
00013
00014
00015
00016
00017
00018 #define ADC12_SAMPLEHOLDSOURCE_SC (ADC12SHS_0)
00019 #define ADC12_SAMPLEHOLDSOURCE_1 (ADC12SHS_1)
00020 #define ADC12_SAMPLEHOLDSOURCE_2 (ADC12SHS_2)
00021 #define ADC12_SAMPLEHOLDSOURCE_3 (ADC12SHS_3)
00022
00023
00024
00025
00026
00027
00028
00029 #define ADC12_CLOCKSOURCE_ADC12OSC (ADC12SSEL_0)
00030 #define ADC12_CLOCKSOURCE_ACLK (ADC12SSEL_1)
00031 #define ADC12_CLOCKSOURCE_MCLK (ADC12SSEL_2)
00032 #define ADC12_CLOCKSOURCE_SMCLK (ADC12SSEL_3)
00033
00034
00035
00036
00037
00038
00039
00040
00041
00042 #define ADC12_CLOCKDIVIDER_1 (ADC12DIV_0)
00043 #define ADC12_CLOCKDIVIDER_2 (ADC12DIV_1)
00044 #define ADC12_CLOCKDIVIDER_3 (ADC12DIV_2)
00045 #define ADC12_CLOCKDIVIDER_4 (ADC12DIV_3)
00046 #define ADC12_CLOCKDIVIDER_5 (ADC12DIV_4)
00047 #define ADC12_CLOCKDIVIDER_6 (ADC12DIV_5)
00048 #define ADC12_CLOCKDIVIDER_7 (ADC12DIV_6)
00049 #define ADC12_CLOCKDIVIDER_8 (ADC12DIV_7)
00050 #define ADC12_CLOCKDIVIDER_12 (ADC12DIV_2 + ADC12PDIV)
00051 #define ADC12_CLOCKDIVIDER_16 (ADC12DIV_3 + ADC12PDIV)
00052 #define ADC12_CLOCKDIVIDER_20 (ADC12DIV_4 + ADC12PDIV)
00053 #define ADC12_CLOCKDIVIDER_24 (ADC12DIV_5 + ADC12PDIV)
00054 #define ADC12_CLOCKDIVIDER_28 (ADC12DIV_6 + ADC12PDIV)
00055 #define ADC12_CLOCKDIVIDER_32 (ADC12DIV_7 + ADC12PDIV)
00056
00057
00058
00059
00060
00061
00062
00063 #define ADC12_RESOLUTION_8BIT (ADC12RES_0)
00064 #define ADC12_RESOLUTION_10BIT (ADC12RES_1)
00065 #define ADC12_RESOLUTION_12BIT (ADC12RES_2)
00066
00067
00068
00069
00070
00071
00072
00073 #define ADC12_CYCLEHOLD_4_CYCLES (ADC12SHT0_0)
00074 #define ADC12_CYCLEHOLD_8_CYCLES (ADC12SHT0_1)
00075 #define ADC12_CYCLEHOLD_16_CYCLES (ADC12SHT0_2)
00076 #define ADC12_CYCLEHOLD_32_CYCLES (ADC12SHT0_3)
00077 #define ADC12_CYCLEHOLD_64_CYCLES (ADC12SHT0_4)
00078 #define ADC12_CYCLEHOLD_96_CYCLES (ADC12SHT0_5)
00079 #define ADC12_CYCLEHOLD_128_CYCLES (ADC12SHT0_6)
00080 #define ADC12_CYCLEHOLD_192_CYCLES (ADC12SHT0_7)
00081 #define ADC12_CYCLEHOLD_256_CYCLES (ADC12SHT0_8)
00082 #define ADC12_CYCLEHOLD_384_CYCLES (ADC12SHT0_9)
00083 #define ADC12_CYCLEHOLD_512_CYCLES (ADC12SHT0_10)
00084 #define ADC12_CYCLEHOLD_768_CYCLES (ADC12SHT0_11)
00085 #define ADC12_CYCLEHOLD_1024_CYCLES (ADC12SHT0_12)
00086
00087
00088
00089
00090
00091
00092
00093 #define ADC12_MULTIPLESAMPLESDISABLE ( !(ADC12MSC) )
00094 #define ADC12_MULTIPLESAMPLESENABLE (ADC12MSC)
00095
00096
00097
00098
00099
00100
00101
00102
00103 #define ADC12_MEMORY_0 (0x0)
00104 #define ADC12_MEMORY_1 (0x1)
00105 #define ADC12_MEMORY_2 (0x2)
00106 #define ADC12_MEMORY_3 (0x3)
00107 #define ADC12_MEMORY_4 (0x4)
00108 #define ADC12_MEMORY_5 (0x5)
00109 #define ADC12_MEMORY_6 (0x6)
00110 #define ADC12_MEMORY_7 (0x7)
00111 #define ADC12_MEMORY_8 (0x8)
00112 #define ADC12_MEMORY_9 (0x9)
00113 #define ADC12_MEMORY_10 (0xA)
00114 #define ADC12_MEMORY_11 (0xB)
00115 #define ADC12_MEMORY_12 (0xC)
00116 #define ADC12_MEMORY_13 (0xD)
00117 #define ADC12_MEMORY_14 (0xE)
00118 #define ADC12_MEMORY_15 (0xF)
00119
00120
00121
00122
00123
00124
00125
00126 #define ADC12_INPUT_A0 (ADC12INCH_0)
00127 #define ADC12_INPUT_A1 (ADC12INCH_1)
00128 #define ADC12_INPUT_A2 (ADC12INCH_2)
00129 #define ADC12_INPUT_A3 (ADC12INCH_3)
00130 #define ADC12_INPUT_A4 (ADC12INCH_4)
00131 #define ADC12_INPUT_A5 (ADC12INCH_5)
00132 #define ADC12_INPUT_A6 (ADC12INCH_6)
00133 #define ADC12_INPUT_A7 (ADC12INCH_7)
00134 #define ADC12_INPUT_A8 (ADC12INCH_8)
00135 #define ADC12_INPUT_A9 (ADC12INCH_9)
00136 #define ADC12_INPUT_TEMPSENSOR (ADC12INCH_10)
00137 #define ADC12_INPUT_BATTERYMONITOR (ADC12INCH_11)
00138 #define ADC12_INPUT_A12 (ADC12INCH_12)
00139 #define ADC12_INPUT_A13 (ADC12INCH_13)
00140 #define ADC12_INPUT_A14 (ADC12INCH_14)
00141 #define ADC12_INPUT_A15 (ADC12INCH_15)
00142
00143
00144
00145
00146
00147
00148
00149 #define ADC12_VREFPOS_AVCC ( !(ADC12SREF0 + ADC12SREF1) )
00150 #define ADC12_VREFPOS_INT (ADC12SREF0)
00151 #define ADC12_VREFPOS_EXT (ADC12SREF1)
00152
00153
00154
00155
00156
00157
00158
00159 #define ADC12_VREFNEG_AVSS ( !(ADC12SREF2) )
00160 #define ADC12_VREFNEG_EXT (ADC12SREF2)
00161
00162
00163
00164
00165
00166
00167
00168 #define ADC12_NOTENDOFSEQUENCE ( !(ADC12EOS) )
00169 #define ADC12_ENDOFSEQUENCE (ADC12EOS)
00170
00171
00172
00173
00174
00175
00176
00177 #define ADC12OVIE0 ( (unsigned long)ADC12OVIE << 16)
00178
00179 #define ADC12TOVIE0 ( (unsigned long)ADC12TOVIE << 16)
00180
00181
00182
00183
00184
00185
00186
00187 #define ADC12_SINGLECHANNEL (ADC12CONSEQ_0)
00188 #define ADC12_SEQOFCHANNELS (ADC12CONSEQ_1)
00189 #define ADC12_REPEATED_SINGLECHANNEL (ADC12CONSEQ_2)
00190 #define ADC12_REPEATED_SEQOFCHANNELS (ADC12CONSEQ_3)
00191
00192
00193
00194
00195
00196
00197
00198 #define ADC12_COMPLETECONVERSION (0x0)
00199 #define ADC12_PREEMPTCONVERSION (0x1)
00200
00201
00202
00203
00204
00205
00206
00207 #define ADC12_NONINVERTEDSIGNAL ( !(ADC12ISSH) )
00208 #define ADC12_INVERTEDSIGNAL (ADC12ISSH)
00209
00210
00211
00212
00213
00214
00215
00216 #define ADC12_UNSIGNED_BINARY ( !(ADC12DF) )
00217 #define ADC12_SIGNED_2SCOMPLEMENT (ADC12DF)
00218
00219
00220
00221
00222
00223
00224
00225 #define ADC12_MAXSAMPLINGRATE_200KSPS ( !(ADC12SR) )
00226 #define ADC12_MAXSAMPLINGRATE_50KSPS (ADC12SR)
00227
00228
00229
00230
00231
00232
00233 #define ADC12_NOTBUSY (0x0)
00234 #define ADC12_BUSY (0x1)
00235
00236
00237
00238
00239
00240
00241
00242 extern unsigned short ADC12_init (unsigned int baseAddress,
00243 unsigned int sampleHoldSourceSelect,
00244 unsigned char clockSourceSelect,
00245 unsigned int clockSourceDivider);
00246
00247 void ADC12_enable (unsigned int baseAddress);
00248
00249 void ADC12_disable (unsigned int baseAddress);
00250
00251 extern void ADC12_setupSamplingTimer (unsigned int baseAddress,
00252 unsigned int clockCycleHoldCountLowMem,
00253 unsigned int clockCycleHoldCountHighMem,
00254 unsigned short multipleSamplesEnabled);
00255
00256 extern void ADC12_disableSamplingTimer (unsigned int baseAddress);
00257
00258 extern void ADC12_memoryConfigure (unsigned int baseAddress,
00259 unsigned char memoryBufferControlIndex,
00260 unsigned char inputSourceSelect,
00261 unsigned char positiveRefVoltageSourceSelect,
00262 unsigned char negativeRefVoltageSourceSelect,
00263 unsigned short endOfSequence);
00264
00265 extern void ADC12_enableInterrupt (unsigned int baseAddress,
00266 unsigned long interruptMask);
00267
00268 extern void ADC12_disableInterrupt (unsigned int baseAddress,
00269 unsigned long interruptMask);
00270
00271 extern void ADC12_clearInterrupt (unsigned int baseAddress,
00272 unsigned int memoryBufferInterruptFlagMask);
00273
00274 extern unsigned char ADC12_getInterruptStatus (unsigned int baseAddress,
00275 unsigned int memoryBufferInterruptFlagMask);
00276
00277 extern void ADC12_startConversion (unsigned int baseAddress,
00278 unsigned int startingMemoryBufferIndex,
00279 unsigned char conversionSequenceModeSelect);
00280
00281 void ADC12_disableConversions (unsigned int baseAddress,
00282 unsigned short preempt);
00283
00284 int ADC12_getResults (unsigned int baseAddress,
00285 unsigned char memoryBufferIndex);
00286
00287 void ADC12_setResolution (unsigned int baseAddress,
00288 unsigned char resolutionSelect);
00289
00290 extern void ADC12_setSampleHoldSignalInversion (unsigned int baseAddress,
00291 unsigned int invertedSignal);
00292
00293 extern void ADC12_setDataReadBackFormat (unsigned int baseAddress,
00294 unsigned short readBackFormat);
00295
00296 extern void ADC12_enableReferenceBurst (unsigned int baseAddress);
00297
00298 extern void ADC12_disableReferenceBurst (unsigned int baseAddress);
00299
00300 extern void ADC12_setReferenceBufferSamplingRate (unsigned int baseAddress,
00301 unsigned short samplingRateSelect);
00302
00303 extern unsigned long ADC12_getMemoryAddressForDMA (unsigned int baseAddress,
00304 unsigned char memoryIndex);
00305
00306 extern unsigned short ADC12_isBusy (unsigned int baseAddress);
00307
00308 #endif