Release Information
Click on the links in the table below to download.
The MSP debug stack (MSPDS) for all MSP430 devices consists of a dynamic link library as well as
embedded firmware that runs on flash emulation tools (FETs) such as the MSP-FET,
MSP-FET430UIF or eZ emulators.
It is the bridging element between all PC software and all MSP430 microcontroller derivatives and handles tasks such as
code download, stepping through code, break point handling and so forth. The MSP Debug Stack is used in IDEs such as Code Composer Studio (CCS),
IAR's Embedded Workbench for MSP430 or other tools like Smart RF Studio or Elprotronic's FlashPro430.
Included in
- CCSv6.0.1 (P2 6.0.1.4)
- CCSv6.1.x (Beta)
- IAR 6.20.x
New Device Support
- RF430FRL152H, RF430FRL153H, RF430FRL154H
- MSP430FR6972, MSP430FR6970, MSP430FR6922, MSP430FR6920, MSP430FR6872, MSP430FR6870, MSP430FR6822, MSP430FR6820, MSP430FR5972, MSP430FR5970, MSP430FR5872, MSP430FR5870
Changes
- Advanced hardware cycle counter support
- Hardware cycle counters can be freely configured
- Support both cycle counters where available
- Software breakpoints support when MPU is enabled
Bug Fixes
- Fixed eZ-FET LED signaling - not according to specification for over-current detection
- Fixed secure device message - Report "Security Fuse has been blown" instead of "Unknown device"
- Fixed endianness in IntelHex offset record
- Fixed clock control module names for MSP430FR413x
- Fixed accidentally changing WDT interval on sync
- Fixed secure device for MSP430FR413x
- Fixed SendJtag mailbox function - Send pattern while Reset line is low
- Fixed ResetXv2 function - Send pattern while Reset line is low
- Fixed Erase for password protected FRAM devices - do segment erase from 0xFF80 to 0x10000 on all FRAM devices to erase the password and the Reset vector to prevent code execution and to disable the password protection
- Fixed possible deadlock in MSP430_Close function
- Fixed Reset function for MSP430F5438 non A devices. Mailbox is not functional in Reset state on this device
Known Issues
- On devices with FLL, clock control does not allow to keep clocks running, while the device is halted and the clock is sourced by the FLL
- V1.3 of UIF does not work in SBW2 mode with 2.2nf cap on reset line
- eZ-FET UART might lose bytes with 115k baud (no handshake enabled) and DMA as data loopback on target device
- MSP-FET EEM access to F149 and L092 devices is only possible with JTAG speed slow
Older Releases
2_04_007_001
2_04_008_002
2_04_009_001
3_02_001_009
3_02_003_015
3_02_004_005
3_02_005_004
3_03_000_006
3_03_001_003
3_03_001_004
3_04_000_020
3_04_001_000
3_04_002_007
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