MSPM0C110X Driver Library  2.05.00.05
Data Structures | Macros | Enumerations | Functions
dl_timer.h File Reference

Detailed Description

Common General Purpose Timer (TIMx) Driver Library.

#include <stdbool.h>
#include <stdint.h>
#include <ti/devices/msp/msp.h>
#include <ti/driverlib/dl_common.h>
Include dependency graph for dl_timer.h:
This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Data Structures

struct  DL_Timer_ClockConfig
 Configuration struct for DL_Timer_setClockConfig. More...
 
struct  DL_Timer_TimerConfig
 Configuration struct for DL_Timer_initTimerMode. More...
 
struct  DL_Timer_CaptureConfig
 Configuration struct for DL_Timer_initCaptureMode. More...
 
struct  DL_Timer_CaptureTriggerConfig
 Configuration struct for DL_Timer_initCaptureTriggerMode. More...
 
struct  DL_Timer_CaptureCombinedConfig
 Configuration struct for DL_Timer_initCaptureCombinedMode. More...
 
struct  DL_Timer_CompareConfig
 Configuration struct for DL_Timer_initCompareMode. More...
 
struct  DL_Timer_CompareTriggerConfig
 Configuration struct for DL_Timer_initCompareTriggerMode. More...
 
struct  DL_Timer_PWMConfig
 Configuration struct for DL_Timer_initPWMMode. More...
 
struct  DL_Timer_backupConfig
 Configuration structure to backup Timer peripheral state before entering STOP or STANDBY mode. Used by DL_Timer_saveConfiguration and DL_Timer_restoreConfiguration. More...
 

Macros

#define DL_TIMER_CC0_OUTPUT   (GPTIMER_CCPD_C0CCP0_OUTPUT)
 Selects Output direction for CCP0.
 
#define DL_TIMER_CC0_INPUT   (GPTIMER_CCPD_C0CCP0_INPUT)
 Selects Input direction for CCP0.
 
#define DL_TIMER_CC1_OUTPUT   (GPTIMER_CCPD_C0CCP1_OUTPUT)
 Selects Output direction for CCP1.
 
#define DL_TIMER_CC1_INPUT   (GPTIMER_CCPD_C0CCP1_INPUT)
 Selects Input direction for CCP1.
 
#define DL_TIMER_CC2_OUTPUT   (GPTIMER_CCPD_C0CCP2_OUTPUT)
 Selects Output direction for CCP2.
 
#define DL_TIMER_CC2_INPUT   (GPTIMER_CCPD_C0CCP2_INPUT)
 Selects Input direction for CCP2.
 
#define DL_TIMER_CC3_OUTPUT   (GPTIMER_CCPD_C0CCP3_OUTPUT)
 Selects Output direction for CCP3.
 
#define DL_TIMER_CC3_INPUT   (GPTIMER_CCPD_C0CCP3_INPUT)
 Selects Input direction for CCP3.
 
#define DL_TIMER_CC_MODE_COMPARE   (GPTIMER_CCCTL_01_COC_COMPARE)
 Configures CC in Compare mode.
 
#define DL_TIMER_CC_MODE_CAPTURE   (GPTIMER_CCCTL_01_COC_CAPTURE)
 Configures CC in Capture mode.
 
#define DL_TIMER_CC_ZCOND_NONE   (GPTIMER_CCCTL_01_ZCOND_CC_TRIG_NO_EFFECT)
 No event generates zero pulse.
 
#define DL_TIMER_CC_ZCOND_TRIG_RISE   (GPTIMER_CCCTL_01_ZCOND_CC_TRIG_RISE)
 Rising edge of CCP or trigger assertion edge generates zero pulse.
 
#define DL_TIMER_CC_ZCOND_TRIG_FALL   (GPTIMER_CCCTL_01_ZCOND_CC_TRIG_FALL)
 Falling edge of CCP or trigger or de-assertion edge generates zero pulse.
 
#define DL_TIMER_CC_ZCOND_TRIG_EDGE   (GPTIMER_CCCTL_01_ZCOND_CC_TRIG_EDGE)
 Either edge of CCP or trigger change (assertion/de-assertion edge) generates zero pulse.
 
#define DL_TIMER_CC_LCOND_NONE   (GPTIMER_CCCTL_01_LCOND_CC_TRIG_NO_EFFECT)
 No event generates load pulse.
 
#define DL_TIMER_CC_LCOND_TRIG_RISE   (GPTIMER_CCCTL_01_LCOND_CC_TRIG_RISE)
 Rising edge of CCP or trigger assertion edge generates load pulse.
 
#define DL_TIMER_CC_LCOND_TRIG_FALL   (GPTIMER_CCCTL_01_LCOND_CC_TRIG_FALL)
 Falling edge of CCP or trigger or de-assertion edge generates load pulse.
 
#define DL_TIMER_CC_LCOND_TRIG_EDGE   (GPTIMER_CCCTL_01_LCOND_CC_TRIG_EDGE)
 Either edge of CCP or trigger change (assertion/de-assertion edge) generates load pulse.
 
#define DL_TIMER_CC_ACOND_TIMCLK   (GPTIMER_CCCTL_01_ACOND_TIMCLK)
 Each TIMCLK generates an advance pulse.
 
#define DL_TIMER_CC_ACOND_TRIG_RISE   (GPTIMER_CCCTL_01_ACOND_CC_TRIG_RISE)
 Rising edge of CCP or trigger assertion edge generates an advance pulse.
 
#define DL_TIMER_CC_ACOND_TRIG_FALL   (GPTIMER_CCCTL_01_ACOND_CC_TRIG_FALL)
 Falling edge of CCP or trigger de-assertion edge generates an advance pulse.
 
#define DL_TIMER_CC_ACOND_TRIG_EDGE   (GPTIMER_CCCTL_01_ACOND_CC_TRIG_EDGE)
 Either edge of CCP or trigger change (assertion/de-assertion edge) generates an advance pulse.
 
#define DL_TIMER_CC_ACOND_TRIG_HIGH   (GPTIMER_CCCTL_01_ACOND_CC_TRIG_HIGH)
 CCP High or Trigger assertion generates an advance pulse.
 
#define DL_TIMER_CC_CCOND_NOCAPTURE   (GPTIMER_CCCTL_01_CCOND_NOCAPTURE)
 None (never captures)
 
#define DL_TIMER_CC_CCOND_TRIG_RISE   (GPTIMER_CCCTL_01_CCOND_CC_TRIG_RISE)
 Rising edge of CCP or trigger assertion edge generates a capture pulse.
 
#define DL_TIMER_CC_CCOND_TRIG_FALL   (GPTIMER_CCCTL_01_CCOND_CC_TRIG_FALL)
 Falling edge of CCP or trigger de-assertion edge generates a capture pulse.
 
#define DL_TIMER_CC_CCOND_TRIG_EDGE   (GPTIMER_CCCTL_01_CCOND_CC_TRIG_EDGE)
 Either edge of CCP or trigger change (assertion/de-assertion edge) generates a capture pulse.
 
#define DL_TIMER_CC_OCTL_INIT_VAL_LOW   (GPTIMER_OCTL_01_CCPIV_LOW)
 CCP is low while output is disabled.
 
#define DL_TIMER_CC_OCTL_INIT_VAL_HIGH   (GPTIMER_OCTL_01_CCPIV_HIGH)
 CCP is high while output is disabled.
 
#define DL_TIMER_CC_OCTL_INV_OUT_ENABLED   (GPTIMER_OCTL_01_CCPOINV_INV)
 CCP Output inversion is enabled.
 
#define DL_TIMER_CC_OCTL_INV_OUT_DISABLED   (GPTIMER_OCTL_01_CCPOINV_NOINV)
 CCP Output inversion is disabled.
 
#define DL_TIMER_CC_OCTL_SRC_FUNCVAL   (GPTIMER_OCTL_01_CCPO_FUNCVAL)
 Output controlled by function values (e.g. PWM)
 
#define DL_TIMER_CC_OCTL_SRC_LOAD   (GPTIMER_OCTL_01_CCPO_LOAD)
 Output controlled by load event.
 
#define DL_TIMER_CC_OCTL_SRC_CMPVAL   (GPTIMER_OCTL_01_CCPO_CMPVAL)
 Output controlled by compare value = counter condition.
 
#define DL_TIMER_CC_OCTL_SRC_ZERO   (GPTIMER_OCTL_01_CCPO_ZERO)
 Output controlled by zero event.
 
#define DL_TIMER_CC_OCTL_SRC_CAPCOND   (GPTIMER_OCTL_01_CCPO_CAPCOND)
 Output controlled by capture event.
 
#define DL_TIMER_CC_OCTL_SRC_FAULTCOND   (GPTIMER_OCTL_01_CCPO_FAULTCOND)
 Output controlled by fault condition.
 
#define DL_TIMER_CC_OCTL_SRC_CC0_MIRR_ALL   (GPTIMER_OCTL_01_CCPO_CC0_MIRROR_ALL)
 Mirror CCP of first capture and compare register in counter group.
 
#define DL_TIMER_CC_OCTL_SRC_CC1_MIRR_ALL   (GPTIMER_OCTL_01_CCPO_CC1_MIRROR_ALL)
 Mirror CCP of second capture and compare register in counter group.
 
#define DL_TIMER_CC_OCTL_SRC_DEAD_BAND   (GPTIMER_OCTL_01_CCPO_DEADBAND)
 Dead band inserted output.
 
#define DL_TIMER_CC_OCTL_SRC_CNTDIR   (GPTIMER_OCTL_01_CCPO_CNTDIR)
 Counter direction.
 
#define DL_TIMER_CC_SWFRCACT_CMPL_DISABLED   (GPTIMER_CCACT_01_SWFRCACT_CMPL_DISABLED)
 The CCP complimentary output value is unaffected by the event.
 
#define DL_TIMER_CC_SWFRCACT_CMPL_HIGH   (GPTIMER_CCACT_01_SWFRCACT_CMPL_CCP_HIGH)
 CCP complimentary output value is set high.
 
#define DL_TIMER_CC_SWFRCACT_CMPL_LOW   (GPTIMER_CCACT_01_SWFRCACT_CMPL_CCP_LOW)
 CCP complimentary output value is set low.
 
#define DL_TIMER_CC_SWFRCACT_DISABLED   (GPTIMER_CCACT_01_SWFRCACT_DISABLED)
 The CCP output value is unaffected by the event.
 
#define DL_TIMER_CC_SWFRCACT_HIGH   (GPTIMER_CCACT_01_SWFRCACT_CCP_HIGH)
 CCP output value is set high.
 
#define DL_TIMER_CC_SWFRCACT_LOW   (GPTIMER_CCACT_01_SWFRCACT_CCP_LOW)
 CCP output value is set low.
 
#define DL_TIMER_CC_FEXACT_DISABLED   (GPTIMER_CCACT_01_FEXACT_DISABLED)
 The CCP output value is unaffected by the event.
 
#define DL_TIMER_CC_FEXACT_HIGH   (GPTIMER_CCACT_01_FEXACT_CCP_HIGH)
 CCP output value is set high.
 
#define DL_TIMER_CC_FEXACT_LOW   (GPTIMER_CCACT_01_FEXACT_CCP_LOW)
 CCP output value is set low.
 
#define DL_TIMER_CC_FEXACT_TOGGLE   (GPTIMER_CCACT_01_FEXACT_CCP_TOGGLE)
 CCP output value is toggled.
 
#define DL_TIMER_CC_FEXACT_HIGHZ   (GPTIMER_CCACT_01_FEXACT_CCP_HIGHZ)
 CCP output value is Hi-Z.
 
#define DL_TIMER_CC_FENACT_DISABLED   (GPTIMER_CCACT_01_FENACT_DISABLED)
 The CCP output value is unaffected by the event.
 
#define DL_TIMER_CC_FENACT_CCP_HIGH   (GPTIMER_CCACT_01_FENACT_CCP_HIGH)
 CCP output value is set high.
 
#define DL_TIMER_CC_FENACT_CCP_LOW   (GPTIMER_CCACT_01_FENACT_CCP_LOW)
 CCP output value is set low.
 
#define DL_TIMER_CC_FENACT_CCP_TOGGLE   (GPTIMER_CCACT_01_FENACT_CCP_TOGGLE)
 CCP output value is toggled.
 
#define DL_TIMER_CC_FENACT_HIGHZ   (GPTIMER_CCACT_01_FENACT_CCP_HIGHZ)
 CCP output value is Hi-Z.
 
#define DL_TIMER_CC_CC2UACT_DISABLED   (GPTIMER_CCACT_01_CC2UACT_DISABLED)
 The CCP output value is unaffected by the event.
 
#define DL_TIMER_CC_CC2UACT_CCP_HIGH   (GPTIMER_CCACT_01_CC2UACT_CCP_HIGH)
 CCP output value is set high.
 
#define DL_TIMER_CC_CC2UACT_CCP_LOW   (GPTIMER_CCACT_01_CC2UACT_CCP_LOW)
 CCP output value is set low.
 
#define DL_TIMER_CC_CC2UACT_CCP_TOGGLE   (GPTIMER_CCACT_01_CC2UACT_CCP_TOGGLE)
 CCP output value is toggled.
 
#define DL_TIMER_CC_CC2DACT_DISABLED   (GPTIMER_CCACT_01_CC2DACT_DISABLED)
 The CCP output value is unaffected by the event.
 
#define DL_TIMER_CC_CC2DACT_CCP_HIGH   (GPTIMER_CCACT_01_CC2DACT_CCP_HIGH)
 CCP output value is set high.
 
#define DL_TIMER_CC_CC2DACT_CCP_LOW   (GPTIMER_CCACT_01_CC2DACT_CCP_LOW)
 CCP output value is set low.
 
#define DL_TIMER_CC_CC2DACT_CCP_TOGGLE   (GPTIMER_CCACT_01_CC2DACT_CCP_TOGGLE)
 CCP output value is toggled.
 
#define DL_TIMER_CC_CUACT_DISABLED   (GPTIMER_CCACT_01_CUACT_DISABLED)
 The CCP output value is unaffected by the event.
 
#define DL_TIMER_CC_CUACT_CCP_HIGH   (GPTIMER_CCACT_01_CUACT_CCP_HIGH)
 CCP output value is set high.
 
#define DL_TIMER_CC_CUACT_CCP_LOW   (GPTIMER_CCACT_01_CUACT_CCP_LOW)
 CCP output value is set low.
 
#define DL_TIMER_CC_CUACT_CCP_TOGGLE   (GPTIMER_CCACT_01_CUACT_CCP_TOGGLE)
 CCP output value is toggled.
 
#define DL_TIMER_CC_CDACT_DISABLED   (GPTIMER_CCACT_01_CDACT_DISABLED)
 The CCP output value is unaffected by the event.
 
#define DL_TIMER_CC_CDACT_CCP_HIGH   (GPTIMER_CCACT_01_CDACT_CCP_HIGH)
 CCP output value is set high.
 
#define DL_TIMER_CC_CDACT_CCP_LOW   (GPTIMER_CCACT_01_CDACT_CCP_LOW)
 CCP output value is set low.
 
#define DL_TIMER_CC_CDACT_CCP_TOGGLE   (GPTIMER_CCACT_01_CDACT_CCP_TOGGLE)
 CCP output value is toggled.
 
#define DL_TIMER_CC_LACT_DISABLED   (GPTIMER_CCACT_01_LACT_DISABLED)
 The CCP output value is unaffected by the event.
 
#define DL_TIMER_CC_LACT_CCP_HIGH   (GPTIMER_CCACT_01_LACT_CCP_HIGH)
 CCP output value is set high.
 
#define DL_TIMER_CC_LACT_CCP_LOW   (GPTIMER_CCACT_01_LACT_CCP_LOW)
 CCP output value is low.
 
#define DL_TIMER_CC_LACT_CCP_TOGGLE   (GPTIMER_CCACT_01_LACT_CCP_TOGGLE)
 CCP output value is toggled.
 
#define DL_TIMER_CC_ZACT_DISABLED   (GPTIMER_CCACT_01_ZACT_DISABLED)
 The CCP output value is unaffected by the event.
 
#define DL_TIMER_CC_ZACT_CCP_HIGH   (GPTIMER_CCACT_01_ZACT_CCP_HIGH)
 CCP output value is high.
 
#define DL_TIMER_CC_ZACT_CCP_LOW   (GPTIMER_CCACT_01_ZACT_CCP_LOW)
 CCP output value is low.
 
#define DL_TIMER_CC_ZACT_CCP_TOGGLE   (GPTIMER_CCACT_01_ZACT_CCP_TOGGLE)
 CCP output value is toggled.
 
#define DL_TIMER_CC_INPUT_INV_NOINVERT   (GPTIMER_IFCTL_01_INV_NOINVERT)
 CCP input is not inverted.
 
#define DL_TIMER_CC_INPUT_INV_INVERT   (GPTIMER_IFCTL_01_INV_INVERT)
 CCP input is inverted.
 
#define DL_TIMER_CC_IN_SEL_CCPX   (GPTIMER_IFCTL_01_ISEL_CCPX_INPUT)
 CCP of the corresponding capture compare unit.
 
#define DL_TIMER_CC_IN_SEL_CCPX_PAIR   (GPTIMER_IFCTL_01_ISEL_CCPX_INPUT_PAIR)
 Input pair CCPX of the capture compare unit. For CCP0 input pair is CCP1 and viceversa.
 
#define DL_TIMER_CC_IN_SEL_CCP0   (GPTIMER_IFCTL_01_ISEL_CCP0_INPUT)
 CCP0 of the counter.
 
#define DL_TIMER_CC_IN_SEL_TRIG   (GPTIMER_IFCTL_01_ISEL_TRIG_INPUT)
 Trigger.
 
#define DL_TIMER_CC_IN_SEL_CCP_XOR   (GPTIMER_IFCTL_01_ISEL_CCP_XOR)
 XOR of CCP inputs as input source.
 
#define DL_TIMER_CC_IN_SEL_FSUB0   (GPTIMER_IFCTL_01_ISEL_FSUB0)
 subscriber 0 event as input source
 
#define DL_TIMER_CC_IN_SEL_FSUB1   (GPTIMER_IFCTL_01_ISEL_FSUB1)
 subscriber 1 event as input source
 
#define DL_TIMER_CC_IN_SEL_COMP0   (GPTIMER_IFCTL_01_ISEL_COMP0)
 Comparator 0 output.
 
#define DL_TIMER_CC_IN_SEL_COMP1   (GPTIMER_IFCTL_01_ISEL_COMP1)
 Comparator 1 output.
 
#define DL_TIMER_CC_IN_SEL_COMP2   (GPTIMER_IFCTL_01_ISEL_COMP2)
 Comparator 2 output.
 
#define DL_TIMER_FAULT_SOURCE_COMP0_DISABLE   (GPTIMER_FSCTL_FAC0EN_DISABLE | (GPTIMER_FCTL_FSENAC0_LOWCTIVE << 16))
 Disables COMP0 as fault source.
 
#define DL_TIMER_FAULT_SOURCE_COMP0_SENSE_LOW   (GPTIMER_FSCTL_FAC0EN_ENABLE | (GPTIMER_FCTL_FSENAC0_LOWCTIVE << 16))
 Enables COMP0 as fault source and fault input is active low.
 
#define DL_TIMER_FAULT_SOURCE_COMP0_SENSE_HIGH   (GPTIMER_FSCTL_FAC0EN_ENABLE | (GPTIMER_FCTL_FSENAC0_HIGHACTIVE << 16))
 Enables COMP0 as fault source and fault input is active high.
 
#define DL_TIMER_FAULT_SOURCE_COMP1_DISABLE   (GPTIMER_FSCTL_FAC1EN_DISABLE | (GPTIMER_FCTL_FSENAC1_LOWCTIVE << 16))
 Disables COMP1 as fault source.
 
#define DL_TIMER_FAULT_SOURCE_COMP1_SENSE_LOW   (GPTIMER_FSCTL_FAC1EN_ENABLE | (GPTIMER_FCTL_FSENAC1_LOWCTIVE << 16))
 Enables COMP1 as fault source and fault input is active low.
 
#define DL_TIMER_FAULT_SOURCE_COMP1_SENSE_HIGH   (GPTIMER_FSCTL_FAC1EN_ENABLE | (GPTIMER_FCTL_FSENAC1_HIGHACTIVE << 16))
 Enables COMP1 as fault source and fault input is active high.
 
#define DL_TIMER_FAULT_SOURCE_COMP2_DISABLE   (GPTIMER_FSCTL_FAC2EN_DISABLE | (GPTIMER_FCTL_FSENAC2_LOWCTIVE << 16))
 Disables COMP2 as fault source.
 
#define DL_TIMER_FAULT_SOURCE_COMP2_SENSE_LOW   (GPTIMER_FSCTL_FAC2EN_ENABLE | (GPTIMER_FCTL_FSENAC2_LOWCTIVE << 16))
 Enables COMP2 as fault source and fault input is active low.
 
#define DL_TIMER_FAULT_SOURCE_COMP2_SENSE_HIGH   (GPTIMER_FSCTL_FAC2EN_ENABLE | (GPTIMER_FCTL_FSENAC2_HIGHACTIVE << 16))
 Enables COMP2 as fault source and fault input is active high.
 
#define DL_TIMER_FAULT_SOURCE_EXTERNAL_0_DISABLE   (GPTIMER_FSCTL_FEX0EN_DISABLE | (GPTIMER_FCTL_FSENEXT0_LOWCTIVE << 16))
 Disables external fault pin 0 as fault source.
 
#define DL_TIMER_FAULT_SOURCE_EXTERNAL_0_SENSE_LOW   (GPTIMER_FSCTL_FEX0EN_ENABLE | (GPTIMER_FCTL_FSENEXT0_LOWCTIVE << 16))
 Enables external fault pin 0 as fault source and fault input is active low.
 
#define DL_TIMER_FAULT_SOURCE_EXTERNAL_0_SENSE_HIGH   (GPTIMER_FSCTL_FEX0EN_ENABLE | (GPTIMER_FCTL_FSENEXT0_HIGHACTIVE << 16))
 Enables external fault pin 0 as fault source and fault input is active high.
 
#define DL_TIMER_FAULT_SOURCE_EXTERNAL_1_DISABLE   (GPTIMER_FSCTL_FEX1EN_DISABLE | (GPTIMER_FCTL_FSENEXT1_LOWCTIVE << 16))
 Disables external fault pin 1 as fault source.
 
#define DL_TIMER_FAULT_SOURCE_EXTERNAL_1_SENSE_LOW   (GPTIMER_FSCTL_FEX1EN_ENABLE | (GPTIMER_FCTL_FSENEXT1_LOWCTIVE << 16))
 Enables external fault pin 1 as fault source and fault input is active low.
 
#define DL_TIMER_FAULT_SOURCE_EXTERNAL_1_SENSE_HIGH   (GPTIMER_FSCTL_FEX1EN_ENABLE | (GPTIMER_FCTL_FSENEXT1_HIGHACTIVE << 16))
 Enables external fault pin 1 as fault source and fault input is active high.
 
#define DL_TIMER_FAULT_SOURCE_EXTERNAL_2_DISABLE   (GPTIMER_FSCTL_FEX2EN_DISABLE | (GPTIMER_FCTL_FSENEXT2_LOWCTIVE << 16))
 Disables external fault pin 2 as fault source.
 
#define DL_TIMER_FAULT_SOURCE_EXTERNAL_2_SENSE_LOW   (GPTIMER_FSCTL_FEX2EN_ENABLE | (GPTIMER_FCTL_FSENEXT2_LOWCTIVE << 16))
 Enables external fault pin 2 as fault source and fault input is active low.
 
#define DL_TIMER_FAULT_SOURCE_EXTERNAL_2_SENSE_HIGH   (GPTIMER_FSCTL_FEX2EN_ENABLE | (GPTIMER_FCTL_FSENEXT2_HIGHACTIVE << 16))
 Enables external fault pin 2 as fault source and fault input is active high.
 
#define DL_TIMER_FAULT_CONFIG_TFIM_DISABLED   (GPTIMER_FCTL_TFIM_DISABLED)
 Selected trigger doesn't participate as a fault input.
 
#define DL_TIMER_FAULT_CONFIG_TFIM_ENABLED   (GPTIMER_FCTL_TFIM_ENABLED)
 Selected trigger participates as a fault input.
 
#define DL_TIMER_FAULT_CONFIG_FL_NO_LATCH   (GPTIMER_FCTL_FL_NO_LATCH)
 Overall fault condition is not dependent on the F bit in RIS.
 
#define DL_TIMER_FAULT_CONFIG_FL_LATCH_SW_CLR   (GPTIMER_FCTL_FL_LATCH_SW_CLR)
 Overall fault condition is dependent on the F bit in RIS.
 
#define DL_TIMER_FAULT_CONFIG_FL_LATCH_Z_CLR   (GPTIMER_FCTL_FL_LATCH_Z_CLR)
 Fault condition is latched. Fault condition is cleared on a zero event if the fault input is 0.
 
#define DL_TIMER_FAULT_CONFIG_FL_LATCH_LD_CLR   (GPTIMER_FCTL_FL_LATCH_LD_CLR)
 Fault condition is latched. Fault condition is cleared on a load event if the fault input is 0.
 
#define DL_TIMER_FAULT_CONFIG_FI_INDEPENDENT   (GPTIMER_FCTL_FI_INDEPENDENT)
 Fault condition is independent on all selected fault sources coming into the Timer.
 
#define DL_TIMER_FAULT_CONFIG_FI_DEPENDENT   (GPTIMER_FCTL_FI_DEPENDENT)
 Fault condition is dependent on all selected fault sources coming into the Timer.
 
#define DL_TIMER_FAULT_CONFIG_FIEN_DISABLED   (GPTIMER_FCTL_FIEN_DISABLED)
 Disables the input for fault detection from the device pin.
 
#define DL_TIMER_FAULT_CONFIG_FIEN_ENABLED   (GPTIMER_FCTL_FIEN_ENABLED)
 Enables the input for fault detection from the device pin.
 
#define DL_TIMER_FAULT_FILTER_BYPASS   (GPTIMER_FIFCTL_FILTEN_BYPASS)
 Input bypasses filter.
 
#define DL_TIMER_FAULT_FILTER_FILTERED   (GPTIMER_FIFCTL_FILTEN_FILTERED)
 Input filter is enabled.
 
#define DL_TIMER_FAULT_FILTER_CPV_CONSEC_PER   (GPTIMER_FIFCTL_CPV_CONSEC_PER)
 Input filter uses a stricter consecutive period count.
 
#define DL_TIMER_FAULT_FILTER_CPV_VOTING   (GPTIMER_FIFCTL_CPV_VOTING)
 Input filter uses majority voting.
 
#define DL_TIMER_FAULT_FILTER_FP_PER_3   (GPTIMER_FIFCTL_FP_PER_3)
 Sample period for the input filter is set to 3 TIMCLK.
 
#define DL_TIMER_FAULT_FILTER_FP_PER_5   (GPTIMER_FIFCTL_FP_PER_5)
 Sample period for the input filter is set to 5 TIMCLK.
 
#define DL_TIMER_FAULT_FILTER_FP_PER_8   (GPTIMER_FIFCTL_FP_PER_8)
 Sample period for the input filter is set to 8 TIMCLK.
 
#define DL_TIMER_CC_INPUT_FILT_CPV_CONSEC_PER   (GPTIMER_IFCTL_01_CPV_CONSECUTIVE)
 Input filter uses a stricter consecutive period count.
 
#define DL_TIMER_CC_INPUT_FILT_CPV_VOTING   (GPTIMER_IFCTL_01_CPV_VOTING)
 Input filter uses majority voting.
 
#define DL_TIMER_CC_INPUT_FILT_FP_PER_3   (GPTIMER_IFCTL_01_FP__3)
 Sample period for the input filter is set to 3 TIMCLK.
 
#define DL_TIMER_CC_INPUT_FILT_FP_PER_5   (GPTIMER_IFCTL_01_FP__5)
 Sample period for the input filter is set to 5 TIMCLK.
 
#define DL_TIMER_CC_INPUT_FILT_FP_PER_8   (GPTIMER_IFCTL_01_FP__8)
 Sample period for the input filter is set to 8 TIMCLK.
 
#define DL_TIMER_INTERRUPT_REPC_EVENT   (GPTIMER_CPU_INT_IMASK_REPC_SET)
 Repeat Counter interrupt.
 
#define DL_TIMER_INTERRUPT_FAULT_EVENT   (GPTIMER_CPU_INT_IMASK_F_SET)
 Fault interrupt.
 
#define DL_TIMER_INTERRUPT_ZERO_EVENT   (GPTIMER_CPU_INT_IMASK_Z_SET)
 Timer zero interrupt.
 
#define DL_TIMER_INTERRUPT_LOAD_EVENT   (GPTIMER_CPU_INT_IMASK_L_SET)
 Timer load interrupt.
 
#define DL_TIMER_INTERRUPT_CC0_DN_EVENT   (GPTIMER_CPU_INT_IMASK_CCD0_SET)
 Timer capture for compare 0 down interrupt.
 
#define DL_TIMER_INTERRUPT_CC1_DN_EVENT   (GPTIMER_CPU_INT_IMASK_CCD1_SET)
 Timer capture for compare 1 down interrupt.
 
#define DL_TIMER_INTERRUPT_CC2_DN_EVENT   (GPTIMER_CPU_INT_IMASK_CCD2_SET)
 Timer capture for compare 2 down interrupt.
 
#define DL_TIMER_INTERRUPT_CC3_DN_EVENT   (GPTIMER_CPU_INT_IMASK_CCD3_SET)
 Timer capture for compare 3 down interrupt.
 
#define DL_TIMER_INTERRUPT_CC4_DN_EVENT   (GPTIMER_CPU_INT_IMASK_CCD4_SET)
 Timer capture for compare 4 down interrupt.
 
#define DL_TIMER_INTERRUPT_CC5_DN_EVENT   (GPTIMER_CPU_INT_IMASK_CCD5_SET)
 Timer capture for compare 5 down interrupt.
 
#define DL_TIMER_INTERRUPT_CC0_UP_EVENT   (GPTIMER_CPU_INT_IMASK_CCU0_SET)
 Timer capture for compare 0 up interrupt.
 
#define DL_TIMER_INTERRUPT_CC1_UP_EVENT   (GPTIMER_CPU_INT_IMASK_CCU1_SET)
 Timer capture for compare 1 up interrupt.
 
#define DL_TIMER_INTERRUPT_CC2_UP_EVENT   (GPTIMER_CPU_INT_IMASK_CCU2_SET)
 Timer capture for compare 2 up interrupt.
 
#define DL_TIMER_INTERRUPT_CC3_UP_EVENT   (GPTIMER_CPU_INT_IMASK_CCU3_SET)
 Timer capture for compare 3 up interrupt.
 
#define DL_TIMER_INTERRUPT_CC4_UP_EVENT   (GPTIMER_CPU_INT_IMASK_CCU4_SET)
 Timer capture for compare 4 up interrupt.
 
#define DL_TIMER_INTERRUPT_CC5_UP_EVENT   (GPTIMER_CPU_INT_IMASK_CCU5_SET)
 Timer capture for compare 5 up interrupt.
 
#define DL_TIMER_INTERRUPT_OVERFLOW_EVENT   (GPTIMER_CPU_INT_IMASK_TOV_SET)
 Timer over flow interrupt.
 
#define DL_TIMER_INTERRUPT_DC_EVENT   (GPTIMER_CPU_INT_IMASK_DC_SET)
 Timer QEI mode direction change event.
 
#define DL_TIMER_INTERRUPT_QEIERR_EVENT   (GPTIMER_CPU_INT_IMASK_QEIERR_SET)
 Timer QEI mode transition error.
 
#define DL_TIMER_EVENT_REPC_EVENT   (GPTIMER_GEN_EVENT0_IMASK_REPC_SET)
 Repeat Counter event.
 
#define DL_TIMER_EVENT_FAULT_EVENT   (GPTIMER_GEN_EVENT0_IMASK_F_SET)
 Fault event.
 
#define DL_TIMER_EVENT_ZERO_EVENT   (GPTIMER_GEN_EVENT0_IMASK_Z_SET)
 Timer zero event.
 
#define DL_TIMER_EVENT_LOAD_EVENT   (GPTIMER_GEN_EVENT0_IMASK_L_SET)
 Timer load event.
 
#define DL_TIMER_EVENT_CC0_DN_EVENT   (GPTIMER_GEN_EVENT0_IMASK_CCD0_SET)
 Timer capture for compare 0 down event.
 
#define DL_TIMER_EVENT_CC1_DN_EVENT   (GPTIMER_GEN_EVENT0_IMASK_CCD1_SET)
 Timer capture for compare 1 down event.
 
#define DL_TIMER_EVENT_CC2_DN_EVENT   (GPTIMER_GEN_EVENT0_IMASK_CCD2_SET)
 Timer capture for compare 2 down interrupt.
 
#define DL_TIMER_EVENT_CC3_DN_EVENT   (GPTIMER_GEN_EVENT0_IMASK_CCD3_SET)
 Timer capture for compare 3 down event.
 
#define DL_TIMER_EVENT_CC4_DN_EVENT   (GPTIMER_GEN_EVENT0_IMASK_CCD4_SET)
 Timer capture for compare 4 down event.
 
#define DL_TIMER_EVENT_CC5_DN_EVENT   (GPTIMER_GEN_EVENT0_IMASK_CCD5_SET)
 Timer capture for compare 5 down event.
 
#define DL_TIMER_EVENT_CC0_UP_EVENT   (GPTIMER_GEN_EVENT0_IMASK_CCU0_SET)
 Timer capture for compare 0 up event.
 
#define DL_TIMER_EVENT_CC1_UP_EVENT   (GPTIMER_GEN_EVENT0_IMASK_CCU1_SET)
 Timer capture for compare 1 up event.
 
#define DL_TIMER_EVENT_CC2_UP_EVENT   (GPTIMER_GEN_EVENT0_IMASK_CCU2_SET)
 Timer capture for compare 2 up event.
 
#define DL_TIMER_EVENT_CC3_UP_EVENT   (GPTIMER_GEN_EVENT0_IMASK_CCU3_SET)
 Timer capture for compare 3 up event.
 
#define DL_TIMER_EVENT_CC4_UP_EVENT   (GPTIMER_GEN_EVENT0_IMASK_CCU4_SET)
 Timer capture for compare 4 up event.
 
#define DL_TIMER_EVENT_CC5_UP_EVENT   (GPTIMER_GEN_EVENT0_IMASK_CCU5_SET)
 
#define DL_TIMER_EVENT_OVERFLOW_EVENT   (GPTIMER_GEN_EVENT0_IMASK_TOV_SET)
 Timer over flow event.
 
#define DL_TIMER_EVENT_DC_EVENT   (GPTIMER_GEN_EVENT0_IMASK_DC_SET)
 Timer qei mode direction change event.
 
#define DL_TIMER_EVENT_QEIERR_EVENT   (GPTIMER_GEN_EVENT0_IMASK_QEIERR_SET)
 Timer qei mode transition error.
 
#define DL_TIMER_CCP0_DIS_OUT_ADV_FORCE_LOW   (GPTIMER_ODIS_C0CCP0_CCP_OUTPUT_LOW)
 CCP0 output is forced low when timer is disabled.
 
#define DL_TIMER_CCP0_DIS_OUT_ADV_SET_BY_OCTL   (GPTIMER_ODIS_C0CCP0_CCP_OUTPUT_OCTL)
 CCP0 output is set by the OCTL when timer is disabled.
 
#define DL_TIMER_CCP1_DIS_OUT_ADV_FORCE_LOW   (GPTIMER_ODIS_C0CCP1_CCP_OUTPUT_LOW)
 CCP1 output is forced low when timer is disabled.
 
#define DL_TIMER_CCP1_DIS_OUT_ADV_SET_BY_OCTL   (GPTIMER_ODIS_C0CCP1_CCP_OUTPUT_OCTL)
 CCP1 output is set by the OCTL when timer is disabled.
 
#define DL_TIMER_CCP2_DIS_OUT_ADV_FORCE_LOW   (GPTIMER_ODIS_C0CCP2_CCP_OUTPUT_LOW)
 CCP2 output is forced low when timer is disabled.
 
#define DL_TIMER_CCP2_DIS_OUT_ADV_SET_BY_OCTL   (GPTIMER_ODIS_C0CCP2_CCP_OUTPUT_OCTL)
 CCP2 output is set by the OCTL when timer is disabled.
 
#define DL_TIMER_CCP3_DIS_OUT_ADV_FORCE_LOW   (GPTIMER_ODIS_C0CCP3_CCP_OUTPUT_LOW)
 CCP3 output is forced low when timer is disabled.
 
#define DL_TIMER_CCP3_DIS_OUT_ADV_SET_BY_OCTL   (GPTIMER_ODIS_C0CCP3_CCP_OUTPUT_OCTL)
 CCP3 output is set by the OCTL when timer is disabled.
 
#define DL_Timer_initPWMMode   DL_Timer_initFourCCPWMMode
 Redirects to common DL_Timer_initFourCCPWMMode.
 

Enumerations

enum  DL_TIMER_CLOCK {
  DL_TIMER_CLOCK_BUSCLK = GPTIMER_CLKSEL_BUSCLK_SEL_ENABLE,
  DL_TIMER_CLOCK_2X_BUSCLK = GPTIMER_CLKSEL_BUS2XCLK_SEL_ENABLE,
  DL_TIMER_CLOCK_MFCLK = GPTIMER_CLKSEL_MFCLK_SEL_ENABLE,
  DL_TIMER_CLOCK_LFCLK = GPTIMER_CLKSEL_LFCLK_SEL_ENABLE,
  DL_TIMER_CLOCK_DISABLE = GPTIMER_CLKSEL_LFCLK_SEL_DISABLE
}
 
enum  DL_TIMER_CLOCK_DIVIDE {
  DL_TIMER_CLOCK_DIVIDE_1 = GPTIMER_CLKDIV_RATIO_DIV_BY_1,
  DL_TIMER_CLOCK_DIVIDE_2 = GPTIMER_CLKDIV_RATIO_DIV_BY_2,
  DL_TIMER_CLOCK_DIVIDE_3 = GPTIMER_CLKDIV_RATIO_DIV_BY_3,
  DL_TIMER_CLOCK_DIVIDE_4 = GPTIMER_CLKDIV_RATIO_DIV_BY_4,
  DL_TIMER_CLOCK_DIVIDE_5 = GPTIMER_CLKDIV_RATIO_DIV_BY_5,
  DL_TIMER_CLOCK_DIVIDE_6 = GPTIMER_CLKDIV_RATIO_DIV_BY_6,
  DL_TIMER_CLOCK_DIVIDE_7 = GPTIMER_CLKDIV_RATIO_DIV_BY_7,
  DL_TIMER_CLOCK_DIVIDE_8 = GPTIMER_CLKDIV_RATIO_DIV_BY_8
}
 
enum  DL_TIMER_CCP_DIS_OUT {
  DL_TIMER_CCP_DIS_OUT_LOW = GPTIMER_ODIS_C0CCP0_CCP_OUTPUT_LOW,
  DL_TIMER_CCP_DIS_OUT_SET_BY_OCTL = GPTIMER_ODIS_C0CCP0_CCP_OUTPUT_OCTL
}
 
enum  DL_TIMER_CC_INDEX {
  DL_TIMER_CC_0_INDEX = 0,
  DL_TIMER_CC_1_INDEX = 1,
  DL_TIMER_CC_2_INDEX = 2,
  DL_TIMER_CC_3_INDEX = 3,
  DL_TIMER_CC_4_INDEX = 4,
  DL_TIMER_CC_5_INDEX = 5
}
 
enum  DL_TIMER_EXT_TRIG_SEL {
  DL_TIMER_EXT_TRIG_SEL_TRIG_0 = GPTIMER_TSEL_ETSEL_TRIG0,
  DL_TIMER_EXT_TRIG_SEL_TRIG_1 = GPTIMER_TSEL_ETSEL_TRIG1,
  DL_TIMER_EXT_TRIG_SEL_TRIG_2 = GPTIMER_TSEL_ETSEL_TRIG2,
  DL_TIMER_EXT_TRIG_SEL_TRIG_3 = GPTIMER_TSEL_ETSEL_TRIG3,
  DL_TIMER_EXT_TRIG_SEL_TRIG_4 = GPTIMER_TSEL_ETSEL_TRIG4,
  DL_TIMER_EXT_TRIG_SEL_TRIG_5 = GPTIMER_TSEL_ETSEL_TRIG5,
  DL_TIMER_EXT_TRIG_SEL_TRIG_6 = GPTIMER_TSEL_ETSEL_TRIG6,
  DL_TIMER_EXT_TRIG_SEL_TRIG_7 = GPTIMER_TSEL_ETSEL_TRIG7,
  DL_TIMER_EXT_TRIG_SEL_TRIG_8 = GPTIMER_TSEL_ETSEL_TRIG8,
  DL_TIMER_EXT_TRIG_SEL_TRIG_9 = GPTIMER_TSEL_ETSEL_TRIG9,
  DL_TIMER_EXT_TRIG_SEL_TRIG_10 = GPTIMER_TSEL_ETSEL_TRIG10,
  DL_TIMER_EXT_TRIG_SEL_TRIG_11 = GPTIMER_TSEL_ETSEL_TRIG11,
  DL_TIMER_EXT_TRIG_SEL_TRIG_12 = GPTIMER_TSEL_ETSEL_TRIG12,
  DL_TIMER_EXT_TRIG_SEL_TRIG_13 = GPTIMER_TSEL_ETSEL_TRIG13,
  DL_TIMER_EXT_TRIG_SEL_TRIG_14 = GPTIMER_TSEL_ETSEL_TRIG14,
  DL_TIMER_EXT_TRIG_SEL_TRIG_15 = GPTIMER_TSEL_ETSEL_TRIG15,
  DL_TIMER_EXT_TRIG_SEL_TRIG_SUB_0 = GPTIMER_TSEL_ETSEL_TRIG_SUB0,
  DL_TIMER_EXT_TRIG_SEL_TRIG_SUB_1 = GPTIMER_TSEL_ETSEL_TRIG_SUB1
}
 
enum  DL_TIMER_TIMER_MODE {
  DL_TIMER_TIMER_MODE_ONE_SHOT,
  DL_TIMER_TIMER_MODE_PERIODIC,
  DL_TIMER_TIMER_MODE_ONE_SHOT_UP,
  DL_TIMER_TIMER_MODE_PERIODIC_UP,
  DL_TIMER_TIMER_MODE_ONE_SHOT_UP_DOWN,
  DL_TIMER_TIMER_MODE_PERIODIC_UP_DOWN
}
 
enum  DL_TIMER_CAPTURE_MODE {
  DL_TIMER_CAPTURE_MODE_EDGE_TIME,
  DL_TIMER_CAPTURE_MODE_PERIOD_CAPTURE,
  DL_TIMER_CAPTURE_MODE_PULSE_WIDTH,
  DL_TIMER_CAPTURE_MODE_EDGE_TIME_UP,
  DL_TIMER_CAPTURE_MODE_PERIOD_CAPTURE_UP,
  DL_TIMER_CAPTURE_MODE_PULSE_WIDTH_UP
}
 
enum  DL_TIMER_CAPTURE_COMBINED_MODE {
  DL_TIMER_CAPTURE_COMBINED_MODE_PULSE_WIDTH_AND_PERIOD,
  DL_TIMER_CAPTURE_COMBINED_MODE_PULSE_WIDTH_AND_PERIOD_UP
}
 
enum  DL_TIMER_COMPARE_MODE {
  DL_TIMER_COMPARE_MODE_EDGE_COUNT,
  DL_TIMER_COMPARE_MODE_EDGE_COUNT_UP,
  DL_TIMER_COMPARE_MODE_EDGE_COUNT_UP_DOWN
}
 
enum  DL_TIMER_COUNT_MODE {
  DL_TIMER_COUNT_MODE_DOWN = GPTIMER_CTRCTL_CM_DOWN,
  DL_TIMER_COUNT_MODE_UP_DOWN = GPTIMER_CTRCTL_CM_UP_DOWN,
  DL_TIMER_COUNT_MODE_UP = GPTIMER_CTRCTL_CM_UP
}
 
enum  DL_TIMER {
  DL_TIMER_START = GPTIMER_CTRCTL_EN_ENABLED,
  DL_TIMER_STOP = GPTIMER_CTRCTL_EN_DISABLED
}
 
enum  DL_TIMER_INTERM_INT {
  DL_TIMER_INTERM_INT_ENABLED = GPTIMER_CCCTL_01_COC_COMPARE,
  DL_TIMER_INTERM_INT_DISABLED = GPTIMER_CCCTL_01_COC_CAPTURE
}
 
enum  DL_TIMER_CAPTURE_EDGE_DETECTION_MODE {
  DL_TIMER_CAPTURE_EDGE_DETECTION_MODE_RISING,
  DL_TIMER_CAPTURE_EDGE_DETECTION_MODE_FALLING,
  DL_TIMER_CAPTURE_EDGE_DETECTION_MODE_EDGE
}
 
enum  DL_TIMER_COMPARE_EDGE_DETECTION_MODE {
  DL_TIMER_COMPARE_EDGE_DETECTION_MODE_RISING,
  DL_TIMER_COMPARE_EDGE_DETECTION_MODE_FALLING,
  DL_TIMER_COMPARE_EDGE_DETECTION_MODE_EDGE
}
 
enum  DL_TIMER_PWM_MODE {
  DL_TIMER_PWM_MODE_EDGE_ALIGN = GPTIMER_CTRCTL_CM_DOWN,
  DL_TIMER_PWM_MODE_EDGE_ALIGN_UP = GPTIMER_CTRCTL_CM_UP,
  DL_TIMER_PWM_MODE_CENTER_ALIGN = GPTIMER_CTRCTL_CM_UP_DOWN
}
 
enum  DL_TIMER_DEAD_BAND_MODE {
  DL_TIMER_DEAD_BAND_MODE_0 = GPTIMER_DBCTL_M1_ENABLE_DISABLED,
  DL_TIMER_DEAD_BAND_MODE_1 = GPTIMER_DBCTL_M1_ENABLE_ENABLED
}
 
enum  DL_TIMER_FAULT_ENTRY_CCP {
  DL_TIMER_FAULT_ENTRY_CCP_DISABLED = GPTIMER_CCACT_01_FENACT_DISABLED,
  DL_TIMER_FAULT_ENTRY_CCP_HIGH = GPTIMER_CCACT_01_FENACT_CCP_HIGH,
  DL_TIMER_FAULT_ENTRY_CCP_LOW = GPTIMER_CCACT_01_FENACT_CCP_LOW,
  DL_TIMER_FAULT_ENTRY_CCP_TOGGLE = GPTIMER_CCACT_01_FENACT_CCP_TOGGLE,
  DL_TIMER_FAULT_ENTRY_CCP_HIGHZ = GPTIMER_CCACT_01_FENACT_CCP_HIGHZ
}
 
enum  DL_TIMER_FAULT_EXIT_CCP {
  DL_TIMER_FAULT_EXIT_CCP_DISABLED = GPTIMER_CCACT_01_FEXACT_DISABLED,
  DL_TIMER_FAULT_EXIT_CCP_HIGH = GPTIMER_CCACT_01_FEXACT_CCP_HIGH,
  DL_TIMER_FAULT_EXIT_CCP_LOW = GPTIMER_CCACT_01_FEXACT_CCP_LOW,
  DL_TIMER_FAULT_EXIT_CCP_TOGGLE = GPTIMER_CCACT_01_FEXACT_CCP_TOGGLE,
  DL_TIMER_FAULT_EXIT_CCP_HIGHZ = GPTIMER_CCACT_01_FEXACT_CCP_HIGHZ
}
 
enum  DL_TIMER_FAULT_EXIT_CTR {
  DL_TIMER_FAULT_EXIT_CTR_RESUME = GPTIMER_CTRCTL_FRB_RESUME,
  DL_TIMER_FAULT_EXIT_CTR_CVAE_ACTION = GPTIMER_CTRCTL_FRB_CVAE_ACTION
}
 
enum  DL_TIMER_FAULT_ENTRY_CTR {
  DL_TIMER_FAULT_ENTRY_CTR_CONT_COUNT = GPTIMER_CTRCTL_FB_CONT_COUNT,
  DL_TIMER_FAULT_ENTRY_CTR_SUSP_COUNT = GPTIMER_CTRCTL_FB_SUSP_COUNT
}
 
enum  DL_TIMER_CROSS_TRIG_SRC {
  DL_TIMER_CROSS_TRIG_SRC_FSUB0 = GPTIMER_CTTRIGCTL_EVTCTTRIGSEL_FSUB0,
  DL_TIMER_CROSS_TRIG_SRC_FSUB1 = GPTIMER_CTTRIGCTL_EVTCTTRIGSEL_FSUB1,
  DL_TIMER_CROSS_TRIG_SRC_ZERO = GPTIMER_CTTRIGCTL_EVTCTTRIGSEL_Z,
  DL_TIMER_CROSS_TRIG_SRC_LOAD = GPTIMER_CTTRIGCTL_EVTCTTRIGSEL_L,
  DL_TIMER_CROSS_TRIG_SRC_CCD0 = GPTIMER_CTTRIGCTL_EVTCTTRIGSEL_CCD0,
  DL_TIMER_CROSS_TRIG_SRC_CCD1 = GPTIMER_CTTRIGCTL_EVTCTTRIGSEL_CCD1,
  DL_TIMER_CROSS_TRIG_SRC_CCD2 = GPTIMER_CTTRIGCTL_EVTCTTRIGSEL_CCD2,
  DL_TIMER_CROSS_TRIG_SRC_CCD3 = GPTIMER_CTTRIGCTL_EVTCTTRIGSEL_CCD3,
  DL_TIMER_CROSS_TRIG_SRC_CCU0 = GPTIMER_CTTRIGCTL_EVTCTTRIGSEL_CCU0,
  DL_TIMER_CROSS_TRIG_SRC_CCU1 = GPTIMER_CTTRIGCTL_EVTCTTRIGSEL_CCU1,
  DL_TIMER_CROSS_TRIG_SRC_CCU2 = GPTIMER_CTTRIGCTL_EVTCTTRIGSEL_CCU2,
  DL_TIMER_CROSS_TRIG_SRC_CCU3 = GPTIMER_CTTRIGCTL_EVTCTTRIGSEL_CCU3
}
 
enum  DL_TIMER_CROSS_TRIGGER_INPUT {
  DL_TIMER_CROSS_TRIGGER_INPUT_ENABLED = GPTIMER_CTTRIGCTL_EVTCTEN_ENABLE,
  DL_TIMER_CROSS_TRIGGER_INPUT_DISABLED = GPTIMER_CTTRIGCTL_EVTCTEN_DISABLED
}
 
enum  DL_TIMER_CROSS_TRIGGER_MODE {
  DL_TIMER_CROSS_TRIGGER_MODE_ENABLED = GPTIMER_CTTRIGCTL_CTEN_ENABLE,
  DL_TIMER_CROSS_TRIGGER_MODE_DISABLED = GPTIMER_CTTRIGCTL_CTEN_DISABLED
}
 
enum  DL_TIMER_IIDX {
  DL_TIMER_IIDX_ZERO = GPTIMER_CPU_INT_IIDX_STAT_Z,
  DL_TIMER_IIDX_LOAD = GPTIMER_CPU_INT_IIDX_STAT_L,
  DL_TIMER_IIDX_CC0_DN = GPTIMER_CPU_INT_IIDX_STAT_CCD0,
  DL_TIMER_IIDX_CC1_DN = GPTIMER_CPU_INT_IIDX_STAT_CCD1,
  DL_TIMER_IIDX_CC2_DN = GPTIMER_CPU_INT_IIDX_STAT_CCD2,
  DL_TIMER_IIDX_CC3_DN = GPTIMER_CPU_INT_IIDX_STAT_CCD3,
  DL_TIMER_IIDX_CC0_UP = GPTIMER_CPU_INT_IIDX_STAT_CCU0,
  DL_TIMER_IIDX_CC1_UP = GPTIMER_CPU_INT_IIDX_STAT_CCU1,
  DL_TIMER_IIDX_CC2_UP = GPTIMER_CPU_INT_IIDX_STAT_CCU2,
  DL_TIMER_IIDX_CC3_UP = GPTIMER_CPU_INT_IIDX_STAT_CCU3,
  DL_TIMER_IIDX_CC4_DN = GPTIMER_CPU_INT_IIDX_STAT_CCD4,
  DL_TIMER_IIDX_CC5_DN = GPTIMER_CPU_INT_IIDX_STAT_CCD5,
  DL_TIMER_IIDX_CC4_UP = GPTIMER_CPU_INT_IIDX_STAT_CCU4,
  DL_TIMER_IIDX_CC5_UP = GPTIMER_CPU_INT_IIDX_STAT_CCU5,
  DL_TIMER_IIDX_FAULT = GPTIMER_CPU_INT_IIDX_STAT_F,
  DL_TIMER_IIDX_OVERFLOW = GPTIMER_CPU_INT_IIDX_STAT_TOV,
  DL_TIMER_IIDX_REPEAT_COUNT = GPTIMER_CPU_INT_IIDX_STAT_REPC,
  DL_TIMER_IIDX_DIR_CHANGE = GPTIMER_CPU_INT_IIDX_STAT_DC,
  DL_TIMER_IIDX_QEIERR = GPTIMER_CPU_INT_IIDX_STAT_QEIERR
}
 
enum  DL_TIMER_PUBLISHER_INDEX {
  DL_TIMER_PUBLISHER_INDEX_0 = 0,
  DL_TIMER_PUBLISHER_INDEX_1 = 1
}
 
enum  DL_TIMER_SUBSCRIBER_INDEX {
  DL_TIMER_SUBSCRIBER_INDEX_0 = 0,
  DL_TIMER_SUBSCRIBER_INDEX_1 = 1
}
 
enum  DL_TIMER_EVENT_ROUTE {
  DL_TIMER_EVENT_ROUTE_1 = 0,
  DL_TIMER_EVENT_ROUTE_2 = 12
}
 
enum  DL_TIMER_INPUT_CHAN {
  DL_TIMER_INPUT_CHAN_0,
  DL_TIMER_INPUT_CHAN_1,
  DL_TIMER_INPUT_CHAN_2,
  DL_TIMER_INPUT_CHAN_3
}
 
enum  DL_TIMER_DEBUG_RES {
  DL_TIMER_DEBUG_RES_RESUME = GPTIMER_CTRCTL_DRB_RESUME,
  DL_TIMER_DEBUG_RES_CVAE_ACTION = GPTIMER_CTRCTL_DRB_CVAE_ACTION
}
 
enum  DL_TIMER_CZC {
  DL_TIMER_CZC_CCCTL0_ZCOND = GPTIMER_CTRCTL_CZC_CCCTL0_ZCOND,
  DL_TIMER_CZC_CCCTL1_ZCOND = GPTIMER_CTRCTL_CZC_CCCTL1_ZCOND,
  DL_TIMER_CZC_CCCTL2_ZCOND = GPTIMER_CTRCTL_CZC_CCCTL2_ZCOND,
  DL_TIMER_CZC_CCCTL3_ZCOND = GPTIMER_CTRCTL_CZC_CCCTL3_ZCOND,
  DL_TIMER_CZC_QEI_2INP = GPTIMER_CTRCTL_CZC_QEI_2INP,
  DL_TIMER_CZC_QEI_3INP = GPTIMER_CTRCTL_CZC_QEI_3INP
}
 
enum  DL_TIMER_CAC {
  DL_TIMER_CAC_CCCTL0_ACOND = GPTIMER_CTRCTL_CAC_CCCTL0_ACOND,
  DL_TIMER_CAC_CCCTL1_ACOND = GPTIMER_CTRCTL_CAC_CCCTL1_ACOND,
  DL_TIMER_CAC_CCCTL2_ACOND = GPTIMER_CTRCTL_CAC_CCCTL2_ACOND,
  DL_TIMER_CAC_CCCTL3_ACOND = GPTIMER_CTRCTL_CAC_CCCTL3_ACOND,
  DL_TIMER_CAC_QEI_2INP = GPTIMER_CTRCTL_CAC_QEI_2INP,
  DL_TIMER_CAC_QEI_3INP = GPTIMER_CTRCTL_CAC_QEI_3INP
}
 
enum  DL_TIMER_CLC {
  DL_TIMER_CLC_CCCTL0_LCOND = GPTIMER_CTRCTL_CLC_CCCTL0_LCOND,
  DL_TIMER_CLC_CCCTL1_LCOND = GPTIMER_CTRCTL_CLC_CCCTL1_LCOND,
  DL_TIMER_CLC_CCCTL2_LCOND = GPTIMER_CTRCTL_CLC_CCCTL2_LCOND,
  DL_TIMER_CLC_CCCTL3_LCOND = GPTIMER_CTRCTL_CLC_CCCTL3_LCOND,
  DL_TIMER_CLC_QEI_2INP = GPTIMER_CTRCTL_CLC_QEI_2INP,
  DL_TIMER_CLC_QEI_3INP = GPTIMER_CTRCTL_CLC_QEI_3INP
}
 
enum  DL_TIMER_COUNT_AFTER_EN {
  DL_TIMER_COUNT_AFTER_EN_LOAD_VAL = GPTIMER_CTRCTL_CVAE_LDVAL,
  DL_TIMER_COUNT_AFTER_EN_NO_CHANGE = GPTIMER_CTRCTL_CVAE_NOCHANGE,
  DL_TIMER_COUNT_AFTER_EN_ZERO = GPTIMER_CTRCTL_CVAE_ZEROVAL
}
 
enum  DL_TIMER_REPEAT_MODE {
  DL_TIMER_REPEAT_MODE_DISABLED = GPTIMER_CTRCTL_REPEAT_REPEAT_0,
  DL_TIMER_REPEAT_MODE_ENABLED = GPTIMER_CTRCTL_REPEAT_REPEAT_1,
  DL_TIMER_REPEAT_MODE_ENABLED_DEBUG = GPTIMER_CTRCTL_REPEAT_REPEAT_3
}
 
enum  DL_TIMER_CC_UPDATE_METHOD {
  DL_TIMER_CC_UPDATE_METHOD_IMMEDIATE = (GPTIMER_CCCTL_01_CCUPD_IMMEDIATELY),
  DL_TIMER_CC_UPDATE_METHOD_ZERO_EVT = (GPTIMER_CCCTL_01_CCUPD_ZERO_EVT),
  DL_TIMER_CC_UPDATE_METHOD_COMP_DN_EVT,
  DL_TIMER_CC_UPDATE_METHOD_COMP_UP_EVT,
  DL_TIMER_CC_UPDATE_METHOD_ZERO_OR_LOAD_EVT,
  DL_TIMER_CC_UPDATE_METHOD_ZERO_RC_EVT,
  DL_TIMER_CC_UPDATE_METHOD_TRIG_EVT = (GPTIMER_CCCTL_01_CCUPD_TRIG)
}
 
enum  DL_TIMER_CCACT_UPDATE_METHOD {
  DL_TIMER_CCACT_UPDATE_METHOD_IMMEDIATE,
  DL_TIMER_CCACT_UPDATE_METHOD_ZERO_EVT,
  DL_TIMER_CCACT_UPDATE_METHOD_COMP_DN_EVT,
  DL_TIMER_CCACT_UPDATE_METHOD_COMP_UP_EVT,
  DL_TIMER_CCACT_UPDATE_METHOD_ZERO_OR_LOAD_EVT,
  DL_TIMER_CCACT_UPDATE_METHOD_ZERO_RC_EVT,
  DL_TIMER_CCACT_UPDATE_METHOD_TRIG_EVT = (GPTIMER_CCCTL_01_CCACTUPD_TRIG)
}
 
enum  DL_TIMER_SEC_COMP_DOWN_EVT {
  DL_TIMER_SEC_COMP_DOWN_EVT_SEL_CC0 = (GPTIMER_CCCTL_01_CC2SELD_SEL_CCD0),
  DL_TIMER_SEC_COMP_DOWN_EVT_SEL_CC1 = (GPTIMER_CCCTL_01_CC2SELD_SEL_CCD1),
  DL_TIMER_SEC_COMP_DOWN_EVT_SEL_CC2 = (GPTIMER_CCCTL_01_CC2SELD_SEL_CCD2),
  DL_TIMER_SEC_COMP_DOWN_EVT_SEL_CC3 = (GPTIMER_CCCTL_01_CC2SELD_SEL_CCD3),
  DL_TIMER_SEC_COMP_DOWN_EVT_SEL_CC4 = (GPTIMER_CCCTL_01_CC2SELD_SEL_CCD4),
  DL_TIMER_SEC_COMP_DOWN_EVT_SEL_CC5 = (GPTIMER_CCCTL_01_CC2SELD_SEL_CCD5)
}
 
enum  DL_TIMER_SEC_COMP_UP_EVT {
  DL_TIMER_SEC_COMP_UP_EVT_SEL_CC0 = (GPTIMER_CCCTL_01_CC2SELU_SEL_CCU0),
  DL_TIMER_SEC_COMP_UP_EVT_SEL_CC1 = (GPTIMER_CCCTL_01_CC2SELU_SEL_CCU1),
  DL_TIMER_SEC_COMP_UP_EVT_SEL_CC2 = (GPTIMER_CCCTL_01_CC2SELU_SEL_CCU2),
  DL_TIMER_SEC_COMP_UP_EVT_SEL_CC3 = (GPTIMER_CCCTL_01_CC2SELU_SEL_CCU3),
  DL_TIMER_SEC_COMP_UP_EVT_SEL_CC4 = (GPTIMER_CCCTL_01_CC2SELU_SEL_CCU4),
  DL_TIMER_SEC_COMP_UP_EVT_SEL_CC5 = (GPTIMER_CCCTL_01_CC2SELU_SEL_CCU5)
}
 
enum  DL_TIMER_SEC_COMP_UP_ACT_SEL {
  DL_TIMER_SEC_COMP_UP_ACT_SEL_DISABLE = GPTIMER_CCACT_01_CC2UACT_DISABLED,
  DL_TIMER_SEC_COMP_UP_ACT_SEL_HIGH = GPTIMER_CCACT_01_CC2UACT_CCP_HIGH,
  DL_TIMER_SEC_COMP_UP_ACT_SEL_LOW = GPTIMER_CCACT_01_CC2UACT_CCP_LOW,
  DL_TIMER_SEC_COMP_UP_ACT_SEL_TOGGLE = GPTIMER_CCACT_01_CC2UACT_CCP_TOGGLE
}
 
enum  DL_TIMER_SEC_COMP_DOWN_ACT_SEL {
  DL_TIMER_SEC_COMP_DOWN_ACT_SEL_DISABLE = GPTIMER_CCACT_01_CC2DACT_DISABLED,
  DL_TIMER_SEC_COMP_DOWN_ACT_SEL_HIGH = GPTIMER_CCACT_01_CC2DACT_CCP_HIGH,
  DL_TIMER_SEC_COMP_DOWN_ACT_SEL_LOW = GPTIMER_CCACT_01_CC2DACT_CCP_LOW,
  DL_TIMER_SEC_COMP_DOWN_ACT_SEL_TOGGLE
}
 
enum  DL_TIMER_SUPP_COMP_EVT_RC {
  DL_TIMER_SUPP_COMP_EVT_RC_DISABLED = (GPTIMER_CCCTL_01_SCERCNEZ_DISABLED),
  DL_TIMER_SUPP_COMP_EVT_RC_ENABLED = (GPTIMER_CCCTL_01_SCERCNEZ_ENABLED)
}
 
enum  DL_TIMER_FORCE_OUT {
  DL_TIMER_FORCE_OUT_DISABLED = (GPTIMER_CCACT_01_SWFRCACT_DISABLED),
  DL_TIMER_FORCE_OUT_HIGH = (GPTIMER_CCACT_01_SWFRCACT_CCP_HIGH),
  DL_TIMER_FORCE_OUT_LOW = (GPTIMER_CCACT_01_SWFRCACT_CCP_LOW)
}
 
enum  DL_TIMER_FORCE_CMPL_OUT {
  DL_TIMER_FORCE_CMPL_OUT_DISABLED,
  DL_TIMER_FORCE_CMPL_OUT_HIGH = (GPTIMER_CCACT_01_SWFRCACT_CMPL_CCP_HIGH),
  DL_TIMER_FORCE_CMPL_OUT_LOW = (GPTIMER_CCACT_01_SWFRCACT_CMPL_CCP_LOW)
}
 
enum  DL_TIMER_CORE_HALT {
  DL_TIMER_CORE_HALT_IMMEDIATE,
  DL_TIMER_CORE_HALT_DELAYED,
  DL_TIMER_CORE_HALT_FREE_RUN
}
 
enum  DL_TIMER_QEI_MODE {
  DL_TIMER_QEI_MODE_2_INPUT,
  DL_TIMER_QEI_MODE_3_INPUT
}
 
enum  DL_TIMER_QEI_DIRECTION {
  DL_TIMER_QEI_DIR_DOWN = GPTIMER_QDIR_DIR_DOWN,
  DL_TIMER_QEI_DIR_UP = GPTIMER_QDIR_DIR_UP
}
 

Functions

__STATIC_INLINE void DL_Timer_enablePower (GPTIMER_Regs *gptimer)
 Enables the Peripheral Write Enable (PWREN) register for the timer. More...
 
__STATIC_INLINE void DL_Timer_disablePower (GPTIMER_Regs *gptimer)
 Disables the Peripheral Write Enable (PWREN) register for the timer. More...
 
__STATIC_INLINE bool DL_Timer_isPowerEnabled (const GPTIMER_Regs *gptimer)
 Returns if the Peripheral Write Enable (PWREN) register for the timer is enabled. More...
 
__STATIC_INLINE void DL_Timer_reset (GPTIMER_Regs *gptimer)
 Resets timer peripheral. More...
 
__STATIC_INLINE bool DL_Timer_isReset (const GPTIMER_Regs *gptimer)
 Returns if timer peripheral has been reset. More...
 
__STATIC_INLINE void DL_Timer_setCCPDirection (GPTIMER_Regs *gptimer, uint32_t ccpConfig)
 Sets CCP Direction. More...
 
__STATIC_INLINE uint32_t DL_Timer_getCCPDirection (const GPTIMER_Regs *gptimer)
 Gets CCP Direction. More...
 
__STATIC_INLINE void DL_Timer_setCCPOutputDisabled (GPTIMER_Regs *gptimer, DL_TIMER_CCP_DIS_OUT ccp0Config, DL_TIMER_CCP_DIS_OUT ccp1Config)
 Forces the output of the timer low via the ODIS register. This can be useful during shutdown or configuring the timer. The output pin still passes through the inversion (INV) bit. See figure "Output connection for TIMG" in Technical Reference Manual (TRM) for diagram. DL_Timer_overrideCCPOut() can be used for for similar functionality, where independent overrride settings for the output and complementary output channels can be configured. More...
 
__STATIC_INLINE void DL_Timer_setCCPOutputDisabledAdv (GPTIMER_Regs *gptimer, uint32_t ccpOdisConfig)
 Sets CCP Output configuration for timer instances with more than two CCP channels via the ODIS register. The output pin still passes through the inversion (INV) bit. More...
 
void DL_Timer_setClockConfig (GPTIMER_Regs *gptimer, const DL_Timer_ClockConfig *config)
 Configure timer source clock. More...
 
void DL_Timer_getClockConfig (const GPTIMER_Regs *gptimer, DL_Timer_ClockConfig *config)
 Get timer source clock configuration. More...
 
__STATIC_INLINE void DL_Timer_enableClock (GPTIMER_Regs *gptimer)
 Enable timer clock. More...
 
__STATIC_INLINE void DL_Timer_disableClock (GPTIMER_Regs *gptimer)
 Disable timer clock. More...
 
__STATIC_INLINE bool DL_Timer_isClockEnabled (const GPTIMER_Regs *gptimer)
 Returns if timer clock is disabled. More...
 
__STATIC_INLINE void DL_Timer_configCrossTrigger (GPTIMER_Regs *gptimer, DL_TIMER_CROSS_TRIG_SRC ctSource, DL_TIMER_CROSS_TRIGGER_INPUT enInTrigCond, DL_TIMER_CROSS_TRIGGER_MODE enCrossTrig)
 Configure Cross Timer Trigger. More...
 
__STATIC_INLINE void DL_Timer_configCrossTriggerSrc (GPTIMER_Regs *gptimer, DL_TIMER_CROSS_TRIG_SRC ctSource)
 Configure Cross Timer Trigger source. More...
 
__STATIC_INLINE void DL_Timer_configCrossTriggerInputCond (GPTIMER_Regs *gptimer, DL_TIMER_CROSS_TRIGGER_INPUT enInTrigCond)
 Enables/DIsables Input Trigger condition for Cross Timer Trigger. More...
 
__STATIC_INLINE void DL_Timer_configCrossTriggerEnable (GPTIMER_Regs *gptimer, DL_TIMER_CROSS_TRIGGER_MODE enCrossTrig)
 Enable/Disable Cross Timer Trigger. More...
 
__STATIC_INLINE uint32_t DL_Timer_getCrossTriggerConfig (const GPTIMER_Regs *gptimer)
 Get Cross Timer Trigger configuration. More...
 
__STATIC_INLINE DL_TIMER_CROSS_TRIG_SRC DL_Timer_getCrossTriggerSrc (const GPTIMER_Regs *gptimer)
 Get Cross Timer Trigger source. More...
 
__STATIC_INLINE DL_TIMER_CROSS_TRIGGER_INPUT DL_Timer_getCrossTriggerInputCond (const GPTIMER_Regs *gptimer)
 Get Input Trigger condition for Cross Timer Trigger. More...
 
__STATIC_INLINE DL_TIMER_CROSS_TRIGGER_MODE DL_Timer_getCrossTriggerEnable (const GPTIMER_Regs *gptimer)
 Checks if Cross Timer Trigger is enabled or disabled. More...
 
__STATIC_INLINE void DL_Timer_generateCrossTrigger (GPTIMER_Regs *gptimer)
 Generates a synchronized trigger condition across all trigger enabled Timer instances. More...
 
__STATIC_INLINE void DL_Timer_enableShadowFeatures (GPTIMER_Regs *gptimer)
 Enable shadow to activate load of buffered registers and register fields. More...
 
__STATIC_INLINE void DL_Timer_disableShadowFeatures (GPTIMER_Regs *gptimer)
 Disable shadow to activate load of buffered registers and register fields. More...
 
__STATIC_INLINE void DL_Timer_setLoadValue (GPTIMER_Regs *gptimer, uint32_t value)
 Sets timer LOAD register value. More...
 
__STATIC_INLINE uint32_t DL_Timer_getLoadValue (const GPTIMER_Regs *gptimer)
 Gets the timer LOAD register value. More...
 
__STATIC_INLINE uint32_t DL_Timer_getTimerCount (const GPTIMER_Regs *gptimer)
 Gets the current counter value of the timer. More...
 
__STATIC_INLINE void DL_Timer_setTimerCount (GPTIMER_Regs *gptimer, uint32_t value)
 Set timer counter value. More...
 
__STATIC_INLINE void DL_Timer_enableLZEventSuppression (GPTIMER_Regs *gptimer)
 Enable suppression of load and zero events. More...
 
__STATIC_INLINE void DL_Timer_disableLZEventSuppression (GPTIMER_Regs *gptimer)
 Disable suppression of load and zero events. More...
 
__STATIC_INLINE bool DL_Timer_isLZEventSuppressionEnabled (const GPTIMER_Regs *gptimer)
 Checks if suppression of load and zero events is enabled. More...
 
__STATIC_INLINE void DL_Timer_setDebugReleaseBehavior (GPTIMER_Regs *gptimer, DL_TIMER_DEBUG_RES debResB)
 Configures timer behavior during debug release/exit. More...
 
__STATIC_INLINE DL_TIMER_DEBUG_RES DL_Timer_getDebugReleaseBehavior (const GPTIMER_Regs *gptimer)
 Get timer resume behavior after relase/exit of debug mode. More...
 
__STATIC_INLINE void DL_Timer_setCounterControl (GPTIMER_Regs *gptimer, DL_TIMER_CZC zeroCtl, DL_TIMER_CAC advCtl, DL_TIMER_CLC loadCtl)
 Configure timer counter control operation. More...
 
__STATIC_INLINE DL_TIMER_CZC DL_Timer_getCounterZeroControl (const GPTIMER_Regs *gptimer)
 Get timer counter zero control operation. More...
 
__STATIC_INLINE DL_TIMER_CAC DL_Timer_getCounterAdvanceControl (const GPTIMER_Regs *gptimer)
 Get timer counter advance control operation. More...
 
__STATIC_INLINE DL_TIMER_CLC DL_Timer_getCounterLoadControl (const GPTIMER_Regs *gptimer)
 Get timer counter load control operation. More...
 
__STATIC_INLINE void DL_Timer_setCounterMode (GPTIMER_Regs *gptimer, DL_TIMER_COUNT_MODE countMode)
 Configure timer counter couting mode. More...
 
__STATIC_INLINE DL_TIMER_COUNT_MODE DL_Timer_getCounterMode (const GPTIMER_Regs *gptimer)
 Get timer counter couting mode. More...
 
__STATIC_INLINE void DL_Timer_setCounterValueAfterEnable (GPTIMER_Regs *gptimer, DL_TIMER_COUNT_AFTER_EN cvae)
 Configures counter value after enable. More...
 
__STATIC_INLINE DL_TIMER_COUNT_AFTER_EN DL_Timer_getCounterValueAfterEnable (const GPTIMER_Regs *gptimer)
 Returns counter value after enable cofiguration. More...
 
__STATIC_INLINE void DL_Timer_setCounterRepeatMode (GPTIMER_Regs *gptimer, DL_TIMER_REPEAT_MODE repeatMode)
 Configure timer repeat counter mode. More...
 
__STATIC_INLINE DL_TIMER_REPEAT_MODE DL_Timer_getCounterRepeatMode (const GPTIMER_Regs *gptimer)
 Get timer repeat counter mode. More...
 
void DL_Timer_initTimerMode (GPTIMER_Regs *gptimer, const DL_Timer_TimerConfig *config)
 Configure timer in one shot or periodic timer mode Initializes all the common configurable options for the TIMx peripheral when used in Timer mode. Any other custom configuration can be done after calling this API. More...
 
void DL_Timer_initCaptureMode (GPTIMER_Regs *gptimer, const DL_Timer_CaptureConfig *config)
 Configure timer in edge count, period capture, edge time or pulse-width capture mode Initializes all the common configurable options for the TIMx peripheral when used in Capture mode. Any other custom configuration can be done after calling this API. More...
 
void DL_Timer_initCaptureTriggerMode (GPTIMER_Regs *gptimer, const DL_Timer_CaptureTriggerConfig *config)
 Configure timer in edge count, period capture, edge time or pulse-width capture mode using the trigger as input source Initializes all the common configurable options for the TIMx peripheral when used in Capture mode. Any other custom configuration can be done after calling this API. More...
 
void DL_Timer_initCaptureCombinedMode (GPTIMER_Regs *gptimer, const DL_Timer_CaptureCombinedConfig *config)
 Configure timer in combined pulse-width and period capture Initializes all the common configurable options for the TIMx peripheral when used in Capture mode. Any other custom configuration can be done after calling this API. More...
 
void DL_Timer_initCompareMode (GPTIMER_Regs *gptimer, const DL_Timer_CompareConfig *config)
 Configure timer in edge count compare mode Initializes all the common configurable options for the TIMx peripheral when used in Compare mode. Any other custom configuration can be done after calling this API. More...
 
void DL_Timer_initCompareTriggerMode (GPTIMER_Regs *gptimer, const DL_Timer_CompareTriggerConfig *config)
 Configure timer in edge count compare mode using the trigger as input source Initializes all the common configurable options for the TIMx peripheral when used in Compare mode. Any other custom configuration can be done after calling this API. More...
 
void DL_Timer_initFourCCPWMMode (GPTIMER_Regs *gptimer, const DL_Timer_PWMConfig *config)
 Configure timer in Pulse Width Modulation Mode Initializes all the common configurable options for the TIMx peripheral when used in PWM mode. Any other custom configuration can be done after calling this API. Configures the top two CC blocks and then configures the bottom two CC blocks. More...
 
__STATIC_INLINE void DL_Timer_resetCounterMode (GPTIMER_Regs *gptimer)
 Reset register controlling counter operation. More...
 
void DL_Timer_setCaptureCompareValue (GPTIMER_Regs *gptimer, uint32_t value, DL_TIMER_CC_INDEX ccIndex)
 Sets Timer Capture Compare Value. More...
 
uint32_t DL_Timer_getCaptureCompareValue (GPTIMER_Regs *gptimer, DL_TIMER_CC_INDEX ccIndex)
 Get Timer Capture Compare value. More...
 
void DL_Timer_setCaptureCompareCtl (GPTIMER_Regs *gptimer, uint32_t ccMode, uint32_t ccCondMask, DL_TIMER_CC_INDEX ccIndex)
 Sets Capture Compare Control configuration. More...
 
uint32_t DL_Timer_getCaptureCompareCtl (GPTIMER_Regs *gptimer, DL_TIMER_CC_INDEX ccIndex)
 Gets Capture Compare Control configuration. More...
 
void DL_Timer_setSecondCompSrcDn (GPTIMER_Regs *gptimer, DL_TIMER_SEC_COMP_DOWN_EVT secCompDn, DL_TIMER_CC_INDEX ccIndex)
 Configures source for second capture compare down event. More...
 
DL_TIMER_SEC_COMP_DOWN_EVT DL_Timer_getSecondCompSrcDn (GPTIMER_Regs *gptimer, DL_TIMER_CC_INDEX ccIndex)
 Gets source for second capture compare down event. More...
 
void DL_Timer_setSecondCompSrcUp (GPTIMER_Regs *gptimer, DL_TIMER_SEC_COMP_UP_EVT secCompUp, DL_TIMER_CC_INDEX ccIndex)
 Configures source for second capture compare up event. More...
 
DL_TIMER_SEC_COMP_UP_EVT DL_Timer_getSecondCompSrcUp (GPTIMER_Regs *gptimer, DL_TIMER_CC_INDEX ccIndex)
 Gets source for second capture compare down event. More...
 
void DL_Timer_enableSuppressionOfCompEvent (GPTIMER_Regs *gptimer, DL_TIMER_CC_INDEX ccIndex)
 Enables suppression of compare event if repeat counter is not equal to zero. More...
 
void DL_Timer_disableSuppressionOfCompEvent (GPTIMER_Regs *gptimer, DL_TIMER_CC_INDEX ccIndex)
 Disables suppression of compare event if repeat counter is not equal to zero. More...
 
void DL_Timer_setCaptCompUpdateMethod (GPTIMER_Regs *gptimer, DL_TIMER_CC_UPDATE_METHOD ccUpdtMode, DL_TIMER_CC_INDEX ccIndex)
 Configures capture compare shadow register update method. More...
 
DL_TIMER_CC_UPDATE_METHOD DL_Timer_getCaptCompUpdateMethod (GPTIMER_Regs *gptimer, DL_TIMER_CC_INDEX ccIndex)
 Gets capture compare shadow register update method. More...
 
void DL_Timer_setCaptCompActUpdateMethod (GPTIMER_Regs *gptimer, DL_TIMER_CCACT_UPDATE_METHOD ccUpdtMode, DL_TIMER_CC_INDEX ccIndex)
 Configures capture compare action shadow register update method. More...
 
DL_TIMER_CCACT_UPDATE_METHOD DL_Timer_getCaptCompActUpdateMethod (GPTIMER_Regs *gptimer, DL_TIMER_CC_INDEX ccIndex)
 Gets capture compare action shadow register update method. More...
 
void DL_Timer_setCaptureCompareOutCtl (GPTIMER_Regs *gptimer, uint32_t ccpIV, uint32_t ccpOInv, uint32_t ccpO, DL_TIMER_CC_INDEX ccIndex)
 Sets Capture Compare Output Control. More...
 
uint32_t DL_Timer_getCaptureCompareOutCtl (GPTIMER_Regs *gptimer, DL_TIMER_CC_INDEX ccIndex)
 Gets Capture Compare Output Control. More...
 
void DL_Timer_setCaptureCompareAction (GPTIMER_Regs *gptimer, uint32_t actionsMask, DL_TIMER_CC_INDEX ccIndex)
 Sets actions of the signal generator. More...
 
uint32_t DL_Timer_getCaptureCompareAction (GPTIMER_Regs *gptimer, DL_TIMER_CC_INDEX ccIndex)
 Gets actions of the signal generator. More...
 
void DL_Timer_setSecondCompActionDn (GPTIMER_Regs *gptimer, DL_TIMER_SEC_COMP_DOWN_ACT_SEL secCompDnAct, DL_TIMER_CC_INDEX ccIndex)
 Set second comparator down counting timer channel output action. More...
 
DL_TIMER_SEC_COMP_DOWN_ACT_SEL DL_Timer_getSecondCompActionDn (GPTIMER_Regs *gptimer, DL_TIMER_CC_INDEX ccIndex)
 Gets second comparator down counting timer channel output action. More...
 
void DL_Timer_setSecondCompActionUp (GPTIMER_Regs *gptimer, DL_TIMER_SEC_COMP_UP_ACT_SEL secCompUpAct, DL_TIMER_CC_INDEX ccIndex)
 Sets second comparator up counting timer channel output action. More...
 
DL_TIMER_SEC_COMP_UP_ACT_SEL DL_Timer_getSecondCompActionUp (GPTIMER_Regs *gptimer, DL_TIMER_CC_INDEX ccIndex)
 Gets second comparator up counting timer channel output action. More...
 
void DL_Timer_overrideCCPOut (GPTIMER_Regs *gptimer, DL_TIMER_FORCE_OUT out, DL_TIMER_FORCE_CMPL_OUT outComp, DL_TIMER_CC_INDEX ccIndex)
 Overrides the timer CCP output. More...
 
void DL_Timer_setCaptureCompareInput (GPTIMER_Regs *gptimer, uint32_t inv, uint32_t isel, DL_TIMER_CC_INDEX ccIndex)
 Sets Capture Compare Input. More...
 
uint32_t DL_Timer_getCaptureCompareInput (GPTIMER_Regs *gptimer, DL_TIMER_CC_INDEX ccIndex)
 Gets Capture Compare Input. More...
 
void DL_Timer_setCaptureCompareInputFilter (GPTIMER_Regs *gptimer, uint32_t cpv, uint32_t fp, DL_TIMER_CC_INDEX ccIndex)
 Sets Capture Compare Input Filter. More...
 
uint32_t DL_Timer_getCaptureCompareInputFilter (GPTIMER_Regs *gptimer, DL_TIMER_CC_INDEX ccIndex)
 Gets Capture Compare Input Filter. More...
 
void DL_Timer_enableCaptureCompareInputFilter (GPTIMER_Regs *gptimer, DL_TIMER_CC_INDEX ccIndex)
 Enables the capture compare input filter. More...
 
void DL_Timer_disableCaptureCompareInputFilter (GPTIMER_Regs *gptimer, DL_TIMER_CC_INDEX ccIndex)
 Disables the capture compare input filter. More...
 
bool DL_Timer_isCaptureCompareInputFilterEnabled (GPTIMER_Regs *gptimer, DL_TIMER_CC_INDEX ccIndex)
 Checks if the capture compare input filter is enabled. More...
 
__STATIC_INLINE void DL_Timer_setDeadBand (GPTIMER_Regs *gptimer, uint16_t falldelay, uint16_t risedelay, uint32_t mode)
 Sets dead band fall and raise delay. More...
 
__STATIC_INLINE uint16_t DL_Timer_getDeadBandFallDelay (const GPTIMER_Regs *gptimer)
 Gets dead band fall delay. More...
 
__STATIC_INLINE uint16_t DL_Timer_getDeadBandRiseDelay (const GPTIMER_Regs *gptimer)
 Gets dead band rise delay. More...
 
__STATIC_INLINE void DL_Timer_setExternalTriggerEvent (GPTIMER_Regs *gptimer, DL_TIMER_EXT_TRIG_SEL trigSel)
 Set External Trigger Event. More...
 
__STATIC_INLINE DL_TIMER_EXT_TRIG_SEL DL_Timer_getExternalTriggerEvent (const GPTIMER_Regs *gptimer)
 Gets External Trigger Event. More...
 
__STATIC_INLINE void DL_Timer_enableExternalTrigger (GPTIMER_Regs *gptimer)
 Enables external trigger. More...
 
__STATIC_INLINE void DL_Timer_disableExternalTrigger (GPTIMER_Regs *gptimer)
 Disables external trigger. More...
 
__STATIC_INLINE bool DL_Timer_isExternalTriggerEnabled (const GPTIMER_Regs *gptimer)
 Checks if external trigger is enabled. More...
 
__STATIC_INLINE void DL_Timer_setRepeatCounter (GPTIMER_Regs *gptimer, uint8_t repeatCount)
 Sets repeat counter value. Repeat counter feature is used to reduce interupt overhead. More...
 
__STATIC_INLINE uint8_t DL_Timer_getRepeatCounter (const GPTIMER_Regs *gptimer)
 Gets repeat counter value. More...
 
__STATIC_INLINE void DL_Timer_enablePhaseLoad (GPTIMER_Regs *gptimer)
 Enables phase load. More...
 
__STATIC_INLINE void DL_Timer_disablePhaseLoad (GPTIMER_Regs *gptimer)
 Disables phase load. More...
 
__STATIC_INLINE bool DL_Timer_isPhaseLoadEnabled (const GPTIMER_Regs *gptimer)
 Checks if phase load enabled. More...
 
__STATIC_INLINE void DL_Timer_setPhaseLoadValue (GPTIMER_Regs *gptimer, uint32_t value)
 Sets phase load value. More...
 
__STATIC_INLINE uint32_t DL_Timer_getPhaseLoadValue (const GPTIMER_Regs *gptimer)
 Gets phase load value. More...
 
__STATIC_INLINE void DL_Timer_startCounter (GPTIMER_Regs *gptimer)
 Starts Timer Counter. More...
 
__STATIC_INLINE void DL_Timer_stopCounter (GPTIMER_Regs *gptimer)
 Stops Timer Counter. More...
 
__STATIC_INLINE bool DL_Timer_isRunning (const GPTIMER_Regs *gptimer)
 Check if timer is actively running. More...
 
__STATIC_INLINE void DL_Timer_configQEI (GPTIMER_Regs *gptimer, DL_TIMER_QEI_MODE mode, uint32_t invert, DL_TIMER_CC_INDEX ccIndex)
 Configure Quadrature Encoder Interface (QEI) More...
 
void DL_Timer_configQEIHallInputMode (GPTIMER_Regs *gptimer)
 Configure Hall Input Mode. More...
 
__STATIC_INLINE DL_TIMER_QEI_DIRECTION DL_Timer_getQEIDirection (const GPTIMER_Regs *gptimer)
 Get direction of Quadrature Encoder Interface (QEI) count. More...
 
__STATIC_INLINE void DL_Timer_setFaultConfig (GPTIMER_Regs *gptimer, uint32_t faultConfMask)
 Sets Fault Configuration. More...
 
__STATIC_INLINE uint32_t DL_Timer_getFaultConfig (const GPTIMER_Regs *gptimer)
 Gets Fault Configuration. More...
 
__STATIC_INLINE void DL_Timer_enableFaultInput (GPTIMER_Regs *gptimer)
 Enables fault input detection. More...
 
__STATIC_INLINE void DL_Timer_disableFaultInput (GPTIMER_Regs *gptimer)
 Disables fault input detection. More...
 
__STATIC_INLINE bool DL_Timer_isFaultInputEnabled (const GPTIMER_Regs *gptimer)
 Specifies if fault input is enabled. More...
 
__STATIC_INLINE void DL_Timer_enableClockFaultDetection (GPTIMER_Regs *gptimer)
 Enables source clock fault detection. More...
 
__STATIC_INLINE void DL_Timer_disableClockFaultDetection (GPTIMER_Regs *gptimer)
 Disables source clock fault detection. More...
 
__STATIC_INLINE bool DL_Timer_isClockFaultDetectionEnabled (const GPTIMER_Regs *gptimer)
 Specifies if source clock fault detection is enabled. More...
 
void DL_Timer_setFaultSourceConfig (GPTIMER_Regs *gptimer, uint32_t source)
 Configures the fault source and and fault input mode. More...
 
uint32_t DL_Timer_getFaultSourceConfig (const GPTIMER_Regs *gptimer)
 
__STATIC_INLINE void DL_Timer_setFaultInputFilterConfig (GPTIMER_Regs *gptimer, uint32_t filten, uint32_t cpv, uint32_t fp)
 Set Fault Input Filtering Configuration. More...
 
__STATIC_INLINE uint32_t DL_Timer_getFaultInputFilterConfig (const GPTIMER_Regs *gptimer)
 Get Fault Input Filtering Configuration. More...
 
__STATIC_INLINE void DL_Timer_configFaultOutputAction (GPTIMER_Regs *gptimer, DL_TIMER_FAULT_ENTRY_CCP faultEntry, DL_TIMER_FAULT_EXIT_CCP faultExit, DL_TIMER_CC_INDEX ccIndex)
 Configures output behavior upon fault entry and exit. More...
 
__STATIC_INLINE void DL_Timer_configFaultCounter (GPTIMER_Regs *gptimer, DL_TIMER_FAULT_ENTRY_CTR faultEntry, DL_TIMER_FAULT_EXIT_CTR faultExit)
 Configures timer counter behavior upon fault entry and exit. More...
 
__STATIC_INLINE void DL_Timer_enableInterrupt (GPTIMER_Regs *gptimer, uint32_t interruptMask)
 Enable timer interrupts. More...
 
__STATIC_INLINE void DL_Timer_disableInterrupt (GPTIMER_Regs *gptimer, uint32_t interruptMask)
 Disable timer interrupts. More...
 
__STATIC_INLINE uint32_t DL_Timer_getEnabledInterrupts (const GPTIMER_Regs *gptimer, uint32_t interruptMask)
 Check which timer interrupts are enabled. More...
 
__STATIC_INLINE uint32_t DL_Timer_getEnabledInterruptStatus (const GPTIMER_Regs *gptimer, uint32_t interruptMask)
 Check interrupt flag of enabled timer interrupts. More...
 
__STATIC_INLINE uint32_t DL_Timer_getRawInterruptStatus (const GPTIMER_Regs *gptimer, uint32_t interruptMask)
 Check interrupt flag of any timer interrupt. More...
 
__STATIC_INLINE DL_TIMER_IIDX DL_Timer_getPendingInterrupt (const GPTIMER_Regs *gptimer)
 Get highest priority pending timer interrupt. More...
 
__STATIC_INLINE void DL_Timer_clearInterruptStatus (GPTIMER_Regs *gptimer, uint32_t interruptMask)
 Clear pending timer interrupts. More...
 
__STATIC_INLINE void DL_Timer_setPublisherChanID (GPTIMER_Regs *gptimer, DL_TIMER_PUBLISHER_INDEX index, uint8_t chanID)
 Sets the event publisher channel id. More...
 
__STATIC_INLINE uint8_t DL_Timer_getPublisherChanID (GPTIMER_Regs *gptimer, DL_TIMER_PUBLISHER_INDEX index)
 Gets the event publisher channel id. More...
 
__STATIC_INLINE void DL_Timer_setSubscriberChanID (GPTIMER_Regs *gptimer, DL_TIMER_SUBSCRIBER_INDEX index, uint8_t chanID)
 Sets the event subscriber channel id. More...
 
__STATIC_INLINE uint8_t DL_Timer_getSubscriberChanID (GPTIMER_Regs *gptimer, DL_TIMER_SUBSCRIBER_INDEX index)
 Gets the event subscriber channel id. More...
 
__STATIC_INLINE void DL_Timer_enableEvent (GPTIMER_Regs *gptimer, DL_TIMER_EVENT_ROUTE index, uint32_t eventMask)
 Enable timer event. More...
 
__STATIC_INLINE void DL_Timer_disableEvent (GPTIMER_Regs *gptimer, DL_TIMER_EVENT_ROUTE index, uint32_t eventMask)
 Disable timer event. More...
 
__STATIC_INLINE uint32_t DL_Timer_getEnabledEvents (GPTIMER_Regs *gptimer, DL_TIMER_EVENT_ROUTE index, uint32_t eventMask)
 Check which timer events are enabled. More...
 
__STATIC_INLINE uint32_t DL_Timer_getEnabledEventStatus (const GPTIMER_Regs *gptimer, DL_TIMER_EVENT_ROUTE index, uint32_t eventMask)
 Check event flag of enabled timer event. More...
 
__STATIC_INLINE uint32_t DL_Timer_getRawEventsStatus (const GPTIMER_Regs *gptimer, DL_TIMER_EVENT_ROUTE index, uint32_t eventMask)
 Check interrupt flag of any timer event. More...
 
__STATIC_INLINE void DL_Timer_clearEventsStatus (GPTIMER_Regs *gptimer, DL_TIMER_EVENT_ROUTE index, uint32_t eventMask)
 Clear pending timer events. More...
 
bool DL_Timer_saveConfiguration (const GPTIMER_Regs *gptimer, DL_Timer_backupConfig *ptr)
 Saves Timer configuration before entering STOP or STANDBY mode. Timer must be in IDLE state before calling this API. Timer can be put IDLE state by calling DL_TimerG_stopCounter or DL_Timer_stopCounter. More...
 
bool DL_Timer_restoreConfiguration (GPTIMER_Regs *gptimer, DL_Timer_backupConfig *ptr, bool restoreCounter)
 Restore Timer configuration after leaving STOP or STANDBY mode. More...
 
__STATIC_INLINE void DL_Timer_setCoreHaltBehavior (GPTIMER_Regs *gptimer, DL_TIMER_CORE_HALT haltMode)
 Configures timer behavior when the core is halted. More...
 
__STATIC_INLINE DL_TIMER_CORE_HALT DL_Timer_getCoreHaltBehavior (const GPTIMER_Regs *gptimer)
 Get timer behavior when the core is halted. More...
 
© Copyright 1995-2025, Texas Instruments Incorporated. All rights reserved.
Trademarks | Privacy policy | Terms of use | Terms of sale