TinyUSB User Guide

Introduction

TinyUSB is a cross-platform open-source USB Host/Device stack for embedded systems, designed to be memory-efficient, portable, and flexible.

The MSPM0 port of TinyUSB enables developers to easily implement various USB device and host classes on MSPM0 microcontrollers. This integration leverages the built-in USB peripheral of the MSPM0 devices.

Key features of the TinyUSB implementation for MSPM0 include:

1. USB Supported Classes

The MSPM0 port of TinyUSB implements a comprehensive suite of USB classes, enabling diverse application development. The current implementation supports:

Device Mode

Host Mode

2. USB Descriptor Tool

The USB Descriptor tool available in Sysconfig allows users to easily configure the stack and descriptors utilized during the enumeration process. As of this release, these classes are supported within the Descriptor tool.

Basic USB Configuration

The USB Descriptor tool begins with providing users fundamental USB device parameters that defines how the device will identify itself to a host.

Each supported USB class in the SysConfig Descriptor Tool features dedicated configuration panels that enable precise customization of class behavior. These specialized interfaces allow developers to:

Beyond USB-specific settings, the USB Descriptor tool also provides configuration options to other peripherals that the TinyUSB stack utilizes:

As of this release, these classes are supported within the USB Descriptor tool.

Device Mode

Host Mode

Billboard and Audio device class support will be added to the descriptor tool in future releases.

3. TinyUSB Example Usage

This software library contains examples that demonstrate the USB peripheral in both host and device mode with different classes:

Each example contains source code which can be compiled and loaded onto a supported device as-is.

3.1 TinyUSB Examples Supported Hardware

4. TinyUSB Example Memory Usage

This section section shows the Flash and SRAM usage of various TinyUSB examples when compiled for MSPM0G5187 using these compilers:

device_audio_test

Compiler Optimization Level Memory Usage
GCC -O0 No LTO 32.7 KB (Flash) 1.33 KB (SRAM)
GCC -O2 No LTO 14.9 KB (Flash) 1.33 KB (SRAM)
Ticlang -O0 No LTO 28.8 KB (Flash) 1.45 KB (SRAM)
Ticlang -O2 No LTO 15.9 KB (Flash) 1.45 KB (SRAM)

device_cdc_dual_ports

Compiler Optimization Level Memory Usage
GCC -O0 No LTO 27.9 KB (Flash) 1.3 KB (SRAM)
GCC -O2 No LTO 13.1 KB (Flash) 1.3 KB (SRAM)
Ticlang -O0 No LTO 23.5 KB (Flash) 1.3 KB (SRAM)
Ticlang -O2 No LTO 13.8 KB (Flash) 1.3 KB (SRAM)

device_billboard

Compiler Optimization Level Memory Usage
GCC -O0 No LTO 21.3 KB (Flash) 0.99 KB (SRAM)
GCC -O2 No LTO 10.6 KB (Flash) 0.98 KB (SRAM)
Ticlang -O0 No LTO 17.9 KB (Flash) 0.94 KB (SRAM)
Ticlang -O2 No LTO 10.8 KB (Flash) 0.93 KB (SRAM)

device_msc_dual_lun

Compiler Optimization Level Memory Usage
GCC -O0 No LTO 45.3 KB (Flash) 17.3 KB (SRAM)
GCC -O2 No LTO 30.1 KB (Flash) 17.4 KB (SRAM)
Ticlang -O0 No LTO 24.9 KB (Flash) 17.3 KB (SRAM)
Ticlang -O2 No LTO 14.3 KB (Flash) 17.3 KB (SRAM)

device_hid_cdc_composite_ti

Compiler Optimization Level Memory Usage
GCC -O0 No LTO 32.3 KB (Flash) 1.6 KB (SRAM)
GCC -O2 No LTO 15.4 KB (Flash) 1.6 KB (SRAM)
Ticlang -O0 No LTO 27.8 KB (Flash) 1.6 KB (SRAM)
Ticlang -O2 No LTO 18.9 KB (Flash) 1.6 KB (SRAM)

host_msc_file_explorer

Compiler Optimization Level Memory Usage
GCC -O0 No LTO 66.9 KB (Flash) 5.1 KB (SRAM)
GCC -O2 No LTO 41.6 KB (Flash) 5.1 KB (SRAM)
Ticlang -O0 No LTO 56.6 KB (Flash) 7.9 KB (SRAM)
Ticlang -O2 No LTO 47.4 KB (Flash) 7.9 KB (SRAM)

5. TinyUSB Class Benchmarking

This section provides benchmarking that was performed using TI ARM Clang compiler 4.0.3.

CDC-ACM Performance

Direction Speed (MB/s) MCU CPU Frequency (MHz)
RX 0.32 32 MHz
RX 0.36 80 MHz
TX 0.39 32 MHz
TX 0.4 80 MHz

Tests were conducted at two different CPU frequencies (32 MHz and 80 MHz) to evaluate how different frequencies will affect transfer speeds. In the respective test, the device_cdc_dual_ports example was modified to have a single CDC port and be either fully transmit or receive only.

MSC Performance

Operation Speed (MB/s) MCU CPU Frequency (MHz)
Read/Write 0.36 32 MHz
Read/Write 0.42 80 MHz

Tests were conducted using DiskSpd utility, a storage performance benchmarking tool. The test evaluated the configuration in which the logical unit exists within SRAM.