drv8706-q1.h

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/*
 * Copyright (c) 2023, Texas Instruments Incorporated
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/*!****************************************************************************
 *  @file       drv8706-q1.h
 *  @brief      Brushed Motor Driver Library DRV8706-Q1 Motor Driver Module
 *  @defgroup   BSM__MSPM0L_DRV8706Q1 DRV8706-Q1 - Motor Driver Module
 *
 *  @anchor bsm_motor_driver_drv8706q1_Overview
 *  # Overview
 * 
 *  The DRV8706-Q1 motor driver module utilizes the HAL's apis to control the
 *  drv8706-q1 brushed motor driver.
 *
 *  <hr>
 ******************************************************************************/
#ifndef bsm_motor_driver_drv8706q1_h
#define bsm_motor_driver_drv8706q1_h

#include "hal.h"

#ifdef __cplusplus
extern "C" {
#endif

typedef enum
{
    DRV8706Q1_H_BRIDGE = 0,
    DRV8706Q1_PH_EN,
    DRV8706Q1_HALF_BRIDGE,
    DRV8706Q1_SPLIT_SOLENOID,
} DRV8706Q1_MODES;

typedef enum {
    DRV8706Q1_H_BRIDGE_COAST = 0,
    DRV8706Q1_H_BRIDGE_REVERSE,
    DRV8706Q1_H_BRIDGE_FORWARD,
    DRV8706Q1_H_BRIDGE_ACTIVE_FREEWHEEL,
} DRV8706Q1_H_BRIDGE_DRIVES;

typedef enum {
    DRV8706Q1_PHASE_REVERSE = 0,
    DRV8706Q1_PHASE_FORWARD,
    DRV8706Q1_PHASE_ACTIVE_FREEWHEEL,
} DRV8706Q1_PHASE_DRIVES;

typedef enum {
    DRV8706Q1_SOLENOID_DISABLE = 0,
    DRV8706Q1_SOLENOID_PWM,
} DRV8706Q1_SOLENOID_DRIVES;

typedef enum {
    DRV8706Q1_HALF_BRIDGE_HI_Z = 0,
    DRV8706Q1_HALF_BRIDGE_PWM,
} DRV8706Q1_HALF_BRIDGE_DRIVES;

typedef enum {
    DRV8706Q1_PWM_CHANNEL_0 = 0,
    DRV8706Q1_PWM_CHANNEL_1,
} DRV8706Q1_PWM_CHANNELS;

typedef enum {
    DRV8706Q1_SPI_ADDR_IC_STAT_1 = 0,
    DRV8706Q1_SPI_ADDR_VGS_VDS_STAT,
    DRV8706Q1_SPI_ADDR_IC_STAT_2,
    DRV8706Q1_SPI_ADDR_RSVD_STAT,
    DRV8706Q1_SPI_ADDR_IC_CTRL,
    DRV8706Q1_SPI_ADDR_BRG_CTRL,
    DRV8706Q1_SPI_ADDR_DRV_CTRL_1,
    DRV8706Q1_SPI_ADDR_DRV_CTRL_2,
    DRV8706Q1_SPI_ADDR_DRV_CTRL_3,
    DRV8706Q1_SPI_ADDR_VDS_CTRL_1,
    DRV8706Q1_SPI_ADDR_VDS_CTRL_2,
    DRV8706Q1_SPI_ADDR_OLSC_CTRL,
    DRV8706Q1_SPI_ADDR_UVOV_CTRL,
    DRV8706Q1_SPI_ADDR_CSA_CTRL
} DRV8706Q1_SPI_ADDR;

typedef enum {
    DRV8706Q1_CSA_GAIN_10 = 10,
    DRV8706Q1_CSA_GAIN_20 = 20,
    DRV8706Q1_CSA_GAIN_40 = 40,
    DRV8706Q1_CSA_GAIN_80 = 80,
} DRV8706Q1_CSA_GAINS;

typedef enum {
    DRV8706Q1_CSA_DIV_2 = 2,
    DRV8706Q1_CSA_DIV_8 = 8,
} DRV8706Q1_CSA_DIV;

#ifndef DOXYGEN_SHOULD_SKIP_THIS

typedef enum {
    DRV8706Q1_SPI_W0_WRITE = 0,
    DRV8706Q1_SPI_W0_READ = 1,
} DRV8706Q1_SPI_W0_BIT;
#endif /* DOXYGEN_SHOULD_SKIP_THIS */

typedef struct {
    ADC_CHANS adcChan;
    _iq20 csaSF;
    GPIO_OUTPUT_PINS    nSleep;
    GPIO_OUTPUT_PINS    drvOff;
    GPIO_INPUT_PINS     nFault;
    GPIO_OUTPUT_PINS    nHiz1;
    GPIO_OUTPUT_PINS    nHiz2;
    PWM_CHANNELS        in1En;
    PWM_CHANNELS        in2Ph;
    SPI_CHANNELS        spiChan;
    SPI_CS              spiCS;

    _iq20               aRef_V;

    DRV8706Q1_CSA_GAINS csaGain;

    DRV8706Q1_CSA_DIV csaDiv;

    _iq20               shuntRes;

    DRV8706Q1_MODES     driveMode;
} DRV8706Q1_INSTANCE;


void DRV8706Q1_init(DRV8706Q1_INSTANCE* drv);

uint16_t DRV8706Q1_switchToHBridgeDrive(DRV8706Q1_INSTANCE* drv,
                                        DRV8706Q1_H_BRIDGE_DRIVES drive);

void DRV8706Q1_changeHBridgeDrive(DRV8706Q1_INSTANCE drv,
                                  DRV8706Q1_H_BRIDGE_DRIVES drive);

uint16_t DRV8706Q1_switchToPhaseDrive(DRV8706Q1_INSTANCE* drv,
                                      DRV8706Q1_PHASE_DRIVES drive);

void DRV8706Q1_changePhaseDrive(DRV8706Q1_INSTANCE drv,
                                DRV8706Q1_PHASE_DRIVES drive);

void DRV8706Q1_changeSolenoidDrive(DRV8706Q1_INSTANCE drv,
                                   DRV8706Q1_SOLENOID_DRIVES drive);

void DRV8706Q1_changeHalfBridgeDrive(DRV8706Q1_INSTANCE drv,
                             DRV8706Q1_PWM_CHANNELS drvChan,
                             DRV8706Q1_HALF_BRIDGE_DRIVES drive);

uint16_t DRV8706Q1_switchToHalfBridgeDrive(DRV8706Q1_INSTANCE* drv,
                                    DRV8706Q1_HALF_BRIDGE_DRIVES driveChan0,
                                    DRV8706Q1_HALF_BRIDGE_DRIVES driveChan1);

uint16_t DRV8706Q1_switchToSolenoidDrive(DRV8706Q1_INSTANCE* drv,
                                         DRV8706Q1_SOLENOID_DRIVES drive);

#ifndef DOXYGEN_SHOULD_SKIP_THIS
uint16_t DRV8706Q1_spiCmd(SPI_CHANNELS spiChan,
                          SPI_CS spiCS,
                          DRV8706Q1_SPI_W0_BIT wo_bit,
                          DRV8706Q1_SPI_ADDR addr,
                          uint8_t data);
#endif /* DOXYGEN_SHOULD_SKIP_THIS */

uint16_t DRV8706Q1_spiUpdateRegister(DRV8706Q1_INSTANCE drv,
                                     DRV8706Q1_SPI_ADDR addr,
                                     uint8_t mask,
                                     uint8_t value);


__STATIC_INLINE uint16_t DRV8706Q1_spiWriteCmd(DRV8706Q1_INSTANCE drv,
                                      DRV8706Q1_SPI_ADDR addr,
                                      uint8_t data) {
    return DRV8706Q1_spiCmd(drv.spiChan,drv.spiCS, DRV8706Q1_SPI_W0_WRITE,addr,data);
}

__STATIC_INLINE  uint16_t DRV8706Q1_spiReadCmd(DRV8706Q1_INSTANCE drv,
                                     DRV8706Q1_SPI_ADDR addr) {
    return DRV8706Q1_spiCmd(drv.spiChan,drv.spiCS, DRV8706Q1_SPI_W0_READ,addr,0x0);
}


_iq20 DRV8706Q1_getCurrent(DRV8706Q1_INSTANCE drv);

#ifndef DOXYGEN_SHOULD_SKIP_THIS

void DRV8706Q1_setPWMFreq(DRV8706Q1_INSTANCE drv,
                          DRV8706Q1_PWM_CHANNELS drvChan,
                          uint32_t value);

void DRV8706Q1_setDutyCycle(DRV8706Q1_INSTANCE drv,
                            DRV8706Q1_PWM_CHANNELS drvChan,
                            uint8_t value);
#endif /* DOXYGEN_SHOULD_SKIP_THIS */

void DRV8706Q1_setDrivePWMFreq(DRV8706Q1_INSTANCE drv,
                               DRV8706Q1_PWM_CHANNELS drvPwmChan,
                               uint32_t value);


void DRV8706Q1_setDriveDutyCycle(DRV8706Q1_INSTANCE drv,
                                 DRV8706Q1_PWM_CHANNELS drvPwmChan,
                                 uint8_t value);

void DRV8706Q1_reset(DRV8706Q1_INSTANCE* drv);

void DRV8706Q1_powerOnResetVal(DRV8706Q1_INSTANCE* drv);

__STATIC_INLINE void DRV8706Q1_setNSleep(DRV8706Q1_INSTANCE drv,bool value) {
    HAL_setGPIOOutput(drv.nSleep,value);
    /* tWake - Turnon time = 1ms
     * tSleep - Turnoff time = 1ms
     * So not matter what you set sleep pin to just wait 1 ms
     */
    HAL_delayMilliSeconds(1);
}

__STATIC_INLINE void DRV8706Q1_setDrvOff(DRV8706Q1_INSTANCE drv,bool value) {
    HAL_setGPIOOutput(drv.drvOff,value);
}

__STATIC_INLINE void DRV8706Q1_setNHiZ1(DRV8706Q1_INSTANCE drv,bool value) {
    HAL_setGPIOOutput(drv.nHiz1,value);
}

__STATIC_INLINE void DRV8706Q1_setNHiZ2(DRV8706Q1_INSTANCE drv,bool value) {
    HAL_setGPIOOutput(drv.nHiz2,value);
}

void DRV8706Q1_setAnalogReference(DRV8706Q1_INSTANCE *drv, _iq20 aRef_V);

uint16_t DRV8706Q1_setAnalogReferenceDivider(DRV8706Q1_INSTANCE *drv,
                                            DRV8706Q1_CSA_DIV csaDiv);

uint16_t DRV8706Q1_setCurrentSenseGain(DRV8706Q1_INSTANCE *drv,
                                       DRV8706Q1_CSA_GAINS gcsa);

void DRV8706Q1_setCurrentShuntResistor(DRV8706Q1_INSTANCE *drv,
                                       _iq20 rShunt);

#ifdef __cplusplus
}
#endif

#endif