MSPM0 SDK Examples Guide

1. Introduction

The MSPM0 SDK is packaged with a wide selection of code examples to enable engineers to develop applications on Texas Instruments’ MSPM0 family of microcontrollers.

The examples folder is divided into RTOS and non-RTOS subfolders (currently only non-RTOS is supported). These folders contain examples for each LaunchPad and are organized based on function with lower-level Driverlib examples, higher-level TI Drivers examples, and examples for middleware such as GUI Composer, LIN, IQMath, and others.

Some examples support SysConfig to simplify the device configuration and accelerate software development. Refer to the SDK QuickStart guide for more details on how to get started using SysConfig, and look for the SysConfig symbol image0 in the sections below.

2. MSPM0 SDK Examples

2.1 Demos

The MSPM0 SDK includes several demos to showcase the functionalities of various devices.

Each demo is packaged with its own documentation, full source code, and project files for different supported IDEs and compilers, making the demos easy to use.

Stay tuned for more examples and functionality.

2.1.1 Out of box experience

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

out_of_box

Out of Box experience for MSPM0 LaunchPads

N

Y

2.2 DriverLib

DriverLib is a set of low level drivers providing an API for accessing MSPM0 registers and full device functionality.

The examples below use the Driverlib API to demonstrate the device functionality and range from simple use cases such as toggling a GPIO output pin to more complex use cases where multiple device peripherals are used.

Each example is packaged with its own documentation, full source code, and project files for different supported IDEs and compilers, making the examples easy to use.

2.2.1 AES Accelerator (AES)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

aes_cbc_256_enc_dec

AES256 CBC encryption and decryption example

image1

N

aes_cfb_256_decrypt

AES CFB 256 bit decryption example

image2

N

aes_ofb_128_encrypt

AES OFB 128 bit encryption example

image3

N

2.2.2 Analog-to-Digital Converter (ADC)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

adc12_14bit_resolution

ADC12 conversion at maximum frequency using DMA with hardware averaging enabled

image4

image5

adc12_max_freq_dma

ADC12 conversion at maximum frequency using DMA

image6

image7

adc12_max_freq_dma_8bit

ADC12 conversion at maximum frequency using DMA in 8 bit resolution

image8

image9

adc12_monitor_supply

ADC12 monitors voltage supply channel

image10

image11

adc12_simultaneous_trigger_event

Dual ADC12 conversion triggered by a Timer event

image12

N

adc12_simultaneous_trigger_event_stop

Dual ADC12 conversion triggered by a Timer event while in STOP mode

image13

N

adc12_single_conversion

ADC12 simple single conversion triggered by software

image14

image15

adc12_single_conversion_vref_external

ADC12 single conversion triggered by software using external reference

image16

image17

adc12_single_conversion_vref_internal

ADC12 single conversion triggered by software using internal VREF

image18

image19

adc12_triggered_by_timer_event

ADC12 conversion triggered by a Timer event

image20

image21

adc12_triggered_by_timer_event_stop

ADC12 conversion triggered by a Timer event while in STOP mode

image22

image23

adc12_window_comparator

ADC12 single conversion in repeat mode using window comparator feature

image24

image25

2.2.3 Comparator (COMP)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

comp_analog_filter

Comparator using external inputs with hysteresis and output analog filter

image26

image27

comp_dac_to_timer_event

Comparator output using 8-bit DAC triggers a timer event to measure timing

image28

image29

comp_hs_dac_vref_external

Comparator in high-speed mode using 8-bit DAC with external VREF

image30

image31

comp_hs_tima_pwm_fault

Comparator in high-speed mode triggers a TIMA fault

image32

N

comp_lp_dac_vref_internal

Comparator in low-power mode using 8-bit DAC with internal VREF

image33

N

2.2.4 Controller Area Network (CAN)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

mcan_loopback

MCAN transmits and receives messages using loopback mode

image34

N

mcan_message_rx

Example configured to receive CAN and CAN-FD frames

image35

N

mcan_message_rx_tcan114x

Example configured to receive CAN and CAN-FD frames using BOOSTXL-TCAN1145 boosterpack.

image36

N

mcan_multi_message_tx

CAN-FD transmits two messages with unique ID on GPIO interrupt

image37

N

mcan_multi_message_tx_tcan114x

CAN-FD transmits two messages with unique ID on GPIO interrupt using BOOSTXL-TCAN1145 boosterpack.

image38

N

mcan_single_message_tx

CAN-FD transmits a single message on GPIO interrupt

image39

N

2.2.5 Cyclic Redundancy Check (CRC)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

crc_calculate_checksum

CRC32 checksum calculation of a memory block

image40

image41

crc_calculate_checksum_dma

CRC32 checksum calculation of a memory block using DMA block transfer

image42

image43

2.2.6 Digital-to-Analog Converter (DAC)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

dac12_dma_sampletimegen

DAC12 using DMA with sample time generator to generate sine wave

image44

N

dac12_fifo_sampletimegen

DAC12 sending repetitive signal using FIFO and sample timer generator

image45

N

dac12_fifo_timer_event

DAC12 sending a sawtooth signal using FIFO and triggered by a Timer event

image46

N

dac12_fixed_voltage_vref_internal

DAC12 setting a fixed voltage output

image47

N

2.2.7 Direct Memory Access (DMA)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

dma_block_transfer

DMA copies from Flash main memory to SRAM memory

image48

image49

dma_fill_data

DMA memory fill of SRAM using DMA

image50

image51

dma_table_transfer

DMA using Table mode with DMA

image52

image53

2.2.8 Events Manager

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

event_input_triggers_output

Event configuration to toggle LED when switch is pressed

image54

image55

2.2.9 GPIO

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

gpio_input_capture

GPIO triggers interrupt by input capture pin

image56

image57

gpio_simultaneous_interrupts

Demonstrates how to simultaneously service three GPIO interrupts

image58

N

gpio_software_poll

GPIO output is set based on polled input

image59

image60

gpio_toggle_output

GPIO toggling an output pin

image61

image62

gpio_toggle_output_hiz

GPIO toggling an ouputput pin configured as Hi-Z

image63

image64

2.2.10 General-Purpose Amplifier (GPAMP)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

gpamp_buffer_to_adc

GPAmp configured in buffer mode with output to ADC

image65

image66

gpamp_general_purpose_rri

GPAmp configured in general purpose Rail-to-Rail mode

image67

image68

2.2.11 Inter-Integrated Circuit (I2C)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

i2c_controller_rw_multibyte_fifo_interrupts

I2C Controller reading and writing multiple bytes using interrupts with FIFO

image69

image70

i2c_controller_rw_multibyte_fifo_poll

I2C Controller reading and writing multiple bytes polling FIFO

image71

image72

i2c_controller_target_dynamic_switching

I2C dynamic switching between Controller and Target modes

image73

image74

i2c_multicontroller_arbitration

I2C Controller detecting arbitration error

image75

image76

i2c_target_rw_multibyte_fifo_interrupts

I2C Target reading and writing multiple bytes using interrupts

image77

image78

i2c_target_rw_multibyte_fifo_interrupts_stop

I2C Target reading and writing multiple bytes using interrupts while in STOP mode

image79

image80

i2c_target_rw_multibyte_fifo_poll

I2C Target reading and writing multiple bytes polling FIFO

image81

image82

2.2.12 Math Accelerator (MATHACL)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

mathacl_mpy_div_op

MATHACL multiply and divide using fixed point

image83

N

mathacl_trig_op

MATHACL implementation of trigonometric functions

image84

N

2.2.13 Non-Volatile Memory (FLASHCTL)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

flashctl_blank_verify

Implementation of Flash Blank Verify command

image85

image86

flashctl_dynamic_memory_protection

Flash configured with dynamic protection

image87

image88

flashctl_ecc_error_injection

Flash ECC testing and SEC and DED error detection

image89

N

flashctl_multiple_size_read_verify

Implementation of Flash read verify commands on multiple data sizes, with and without ECC

image90

image91

flashctl_multiple_size_write

Flash writing of different size data

image92

image93

flashctl_nonmain_memory_write

Read-write of Non-Main Flash memory

image94

image95

flashctl_program_with_ecc

Flash programming with ECC

image96

N

2.2.14 Operational Amplifier (OPA)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

opa_burnout_current_source_to_adc

OPA in buffer mode enabling burnout current source to ADC

image97

image98

opa_dac8_output_buffer

OPA in output buffer mode using 8-bit DAC

image99

image100

opa_general_purpose_rri

OPA in general purpose mode with Rail-to-Rail configuration

image101

image102

opa_inverting_pga_with_dac

OPA in inverting PGA configuration using DAC12 as bias

image103

N

opa_non_inverting_pga

OPA in non-inverting PGA configuration

image104

image105

opa_signal_chain_to_adc

Two OPAs configured in TIA and PGA, connected to ADC

image106

N

2.2.15 Other

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

cinit_bypass

Bypass CINIT skipping variable initialization

image107

image108

empty

Empty start-up project using DriverLib

image109

image110

empty_driverlib_src

Empty start-up project using DriverLib

image111

image112

empty_library

Empty start-up library project using DriverLib

Y

Y

nvic_interrupt_disable

NVIC used to demonstrate best approach to disable interrupts

image113

image114

nvic_interrupt_grouping

NVIC configuration and use of interrupt grouping

image115

image116

sram_parity

Initializes and uses Parity SRAM

image117

N

systick_periodic_timer

SysTick generates periodic interrupt

image118

image119

2.2.16 Real-Time Clock (RTC)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

rtc_calendar_alarm_standby

RTC sets calendar alarm and toggles GPIO when alarm is triggered

image120

N

rtc_offset_calibration_lfxt

RTC offset correction of crystal

image121

N

rtc_periodic_alarm_lfosc_standby

RTC implementation of periodic alarm in STANDBY using LFOSC

image122

N

rtc_periodic_alarm_lfxt_standby

RTC implementation of periodic alarm in STANDBY using LFXT

image123

N

2.2.17 Serial Peripheral Interface (SPI)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

spi_controller_command_data_control

SPI Controller transmit using command data (CD) control

image124

image125

spi_controller_echo_interrupts

SPI Controller transmits data using Motorola format

image126

image127

spi_controller_internal_loopback_poll

SPI Controller with internal loopback using polling

image128

image129

spi_controller_multibyte_fifo_dma_interrupts

SPI Controller reading and writing multiple bytes using FIFO and DMA

image130

image131

spi_controller_multibyte_fifo_poll

SPI Controller reading and writing multiple bytes polling FIFO

image132

image133

spi_controller_register_format

SPI Controller transmit and read data using register format

image134

image135

spi_controller_repeated_multibyte_fifo_dma_interrupts

SPI Controller reading and writing multiple bytes using FIFO and DMA every second

image136

image137

spi_peripheral_echo_interrupts

SPI Peripheral echoes data using Motorola format

image138

image139

spi_peripheral_multibyte_fifo_dma_interrupts

SPI Peripheral reading and writing multiple bytes using FIFO and DMA

image140

image141

spi_peripheral_multibyte_fifo_poll

SPI Peripheral reading and writing multiple bytes polling FIFO

image142

image143

spi_peripheral_register_format

SPI Peripheral transmit and read data using register format

image144

image145

spi_peripheral_repeated_multibyte_fifo_dma_interrupts

SPI Peripheral reading and writing multiple bytes using FIFO and DMA

image146

image147

2.2.18 System Controller (SYSCTL)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

sysctl_frequency_clock_counter

Monitor SYSOSC via Frequency Clock Counter (FCC)

image148

N

sysctl_hfxt_run

Sets external HFXT as source to HSCLK and MCLK (48MHz)

image149

N

sysctl_lfxt_standby

Sets LFXT as source to LFCLK (32kHz) and power policy in STANDBY0

image150

N

sysctl_mclk_syspll

Sets MCLK to run from SYSPLL (80MHz)

image151

N

sysctl_power_policy_sleep_to_standby

SYSCTL switches between SLEEP mode and STANDBY modes

image152

image153

sysctl_power_policy_sleep_to_stop

SYSCTL switches between SLEEP mode and STOP modes

image154

image155

sysctl_shutdown

Show correct wake-up mechanism after SHUTDOWN vs STOP, STANDBY and SLEEP

image156

image157

2.2.19 Timer - Advanced (TIMA)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

tima_timer_mode_periodic_repeat_count

TimerA in periodic mode using repeat-count feature

image158

N

tima_timer_mode_pwm_dead_band

TimerA outputs PWM signals with dead band insertion

image159

N

tima_trigger_fail_mechanism

TimerA demonstrating fault detection

image160

N

2.2.20 Timer - General Purpose (TIMG)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

timg_qei_mode

TimerG uses QEI to decode relative position output of a quadrature encoder

image161

N

2.2.21 Timer - Generic (TIMx)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

timx_timer_mode_capture_duty_and_period

Timer calculates period and duty cycle

image162

image163

timx_timer_mode_capture_edge_capture

Timer edge time detection using Timer capture mode

image164

image165

timx_timer_mode_compare_edge_count

Timer edge counting capability using compare mode

image166

image167

timx_timer_mode_one_shot_standby

Timer in one-shot mode while device is in STANDBY mode

image168

image169

timx_timer_mode_periodic_sleep

Timer in periodic mode while device is in SLEEP mode

image170

image171

timx_timer_mode_periodic_standby

Timer in periodic mode while device is in STANDBY mode

image172

image173

timx_timer_mode_periodic_stop

Timer in periodic mode while device is in STOP mode

image174

image175

timx_timer_mode_pwm_center_stop

Timer in PWM center aligned mode while device is in STOP mode

image176

image177

timx_timer_mode_pwm_cross_trigger_stop_restore

Timer in PWM mode after coming out of STOP with retention in SW

image178

N

timx_timer_mode_pwm_edge_sleep

Timer in PWM edge aligned mode while device is in SLEEP mode

image179

image180

timx_timer_mode_pwm_edge_sleep_shadow

Timer updating PWM duty cycle using shadow load feature

image181

image182

2.2.22 True Random Number Generator (TRNG)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

trng_sample

TRNG sampling to fill a buffer with random data

image183

N

trng_sample_stop_restore

TRNG sample random data after coming out of STOP with retention in SW

image184

N

2.2.23 Universal Asynchronous Receiver-Transmitter (UART)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

uart_echo_interrupts_standby

UART RX/TX echo using interrupts while device is in STANDBY mode

image185

image186

uart_extend_manchester_echo

UART Extend using Manchester encoding, echo received packet

image187

image188

uart_extend_manchester_send_packet

UART Extend using Manchester encoding and decoding, send a packet

image189

image190

uart_external_loopback_interrupt

UART RX/TX external loopback using interrupts

image191

image192

uart_internal_loopback_standby_restore

UART internal loopback after coming out of STANDBY with retention in SW

image193

N

uart_rw_multibyte_fifo_poll

UART RX/TX using FIFOs with polling

image194

image195

uart_rx_hw_flow_control

UART RX using HW flow control

image196

image197

uart_rx_multibyte_fifo_dma_interrupts

UART RX using a DMA trigger

image198

image199

uart_tx_console_multibyte_repeated_fifo_dma

UART TX to console using a continuous DMA Triggers

image200

image201

uart_tx_hw_flow_control

UART TX using hardware flow control

image202

image203

uart_tx_multibyte_fifo_dma_interrupts

UART TX using a DMA trigger

image204

image205

2.2.24 Window Watchdog Timer (WWDT)

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

wwdt_interval_timer_lfosc_standby

WWDT interval timer mode using LFOSC while device is in STANDBY mode

image206

image207

wwdt_interval_timer_lfxt_standby

WWDT interval timer mode using LFXT while device is in STANDBY mode

image208

N

wwdt_window_mode_periodic_reset

WWDT Window watchdog mode with periodic reset

image209

image210

2.3 TI-Drivers

TI Drivers provide a robust set of intuitive, functional APIs that offer portable, feature-rich access to peripherals.

TI-Drivers for MSPM0 are under development, but the examples below provide a glimpse of expected functionality.

2.3.1 FreeRTOS

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

uart_callback/freertos

UART simple echo using callback

N

Y

uart_echo/freertos

UART simple echo

Y

Y

2.3.2 No RTOS

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

uart_echo/nortos

UART simple echo

Y

N

watchdog_interval

Watchdog driver in interval mode

Y

N

watchdog_reset

Watchdog driver in reset mode

Y

N

2.4 Boot Image Manager (BIM)

The MSPM0 SDK includes a boot image manager implementation to demonstrate how a user can verify integrity and authenticity of images loaded onto their device.

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

bim_sample_image

Sample GPIO toggle image for BIM

N

image211

boot_application

Boot Image Manager Using MCUBoot

N

image212

2.5 Bootstrap Loader (BSL)

The bootstrap loader (BSL) provides a method to program and/or verify the device memory through a standard UART or I2C serial interface. Among its features, the BSL supports MAIN flash plug-ins to enable additional interfaces and functionality.

The MSPM0 SDK includes examples showing how to implement plug-ins and other BSL functionality in MAIN Flash.

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

bsl_host_mcu_i2c

Shows an implementation of BSL I2C Flash interface

Y

N

bsl_host_mcu_uart

Shows an implementation of BSL uart Flash interface

Y

N

bsl_i2c_flash_interface

Shows an implementation of BSL I2C Flash interface

image213

image214

bsl_software_invoke

Jump to ROM bootloader on application request

image215

image216

bsl_uart_flash_interface

Shows an implementation of a BSL UART Flash interface

image217

image218

secondary_bsl

Implements a secondary bootloader in Main overriding the ROM BSL

image219

image220

2.6 Cookbook

The MSPM0 SDK Cookbook contains examples showing more complex functionality implemented with multiple peripherals.

The examples use DriverLib APIs, and includes full source code and documentation with detailed usage instructions.

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

adc_dma_ping_pong

Capture ADC data into 2 (ping-pong) buffers

N

image221

adc_to_spi_controller

Read ADC data from a connected target device over SPI

image222

image223

adc_to_spi_peripheral

Sample ADC and respond to SPI commands sentby a controller

image224

image225

adc_to_uart

Sample ADC value and transmit over UART

image226

image227

programmable_gain_amplifier_1

Use programmable gain amplifier to dynamically adjust gain

N

image228

programmable_gain_amplifier_2

Use programmable gain amplifier to dynamically adjust gain and capture values with integrated ADC

N

image229

pwm_led_driver

Create a pulsating LED effect using timers

image230

image231

temp_sense_thermistor

Sample LaunchPad thermistor using integrated Op-Amp and ADC

N

image232

transimpedance_amplifier

Configure Op-amp in transimpedance amplifier topology

N

image233

2.7 EEPROM

MSPM0 supports EEPROM emulation through its internal Flash. Compared to using an external serial EEPROM, EEPROM emulation using the internal Flash saves pin usage and cost.

The MSPM0 SDK includes a library and examples showing the implementation of supported solutions.

2.7.1 Type-A

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

eeprom_emulation_type_a

Demonstrates Type A EEPROM emulation to store non-volatile data

Y

Y

eeprom_emulation_type_a_test

Demonstrates a more detailed use case of Type A EEPROM emulation to store blocks of non-volatile data

Y

Y

2.7.2 Type-B

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

eeprom_emulation_type_b

Demonstrates Type B EEPROM emulation to store user data

Y

Y

eeprom_emulation_type_b_test

Demonstrates a more detailed use case of Type B EEPROM emulation to store user data

Y

Y

2.8 GUI Composer

GUI Composer is a browser-based tool for developing PC-side HTML-based GUIs that can complement your embedded project or application.

The MSPM0 SDK includes a library and various examples showing the implementation of supported protocols.

2.8.1 Streaming Protocols

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

gc_simple_json

Demonstrates basic usage of GUI Composer communication using JSON-formatted strings

image234

image235

gc_simple_messagepack

Demonstrates basic usage of GUI Composer communication using MessagePack protocol

image236

image237

2.9 IQMath

IQMath is a collection of highly optimized and high-precision fixed-point mathematical functions.

The MSPM0 SDK includes IQMath support using simple C runtime-system (RTS) functions, and leveraging the MathAcl hardware accelerator.

2.9.1 Compiler RTS library

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

iqmath_rts_ops_test

Implements various fixed-point operations leveraging the RTS implementation of IQMath

image238

image239

2.9.2 MathACL

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

iqmath_mathacl_ops_test

Implements various fixed-point operations leveraging the MathACL implementation of IQMath

image240

N

2.10 RTOS Kernel

The MSPM0 SDK includes a collection of examples to test kernel functionality.

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

blink_led

Simple FreeRTOS LED blinky demo using two tasks

image241

image242

posix_demo

Simple Posix FreeRTOS blinky LED demo

image243

image244

2.11 LIN

The Local Interconnect Network (LIN) is a multipoint, low-cost, easily-implemented communication bus commonly used in automobiles.

The MSPM0 SDK includes easy-to-use examples for Commander and Responder.

2.11.1 Commander

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

lin_commander

Demonstrates basic implementation of LIN commander to transmit and receive LIN 2.0 packets using UART

image245

image246

2.11.2 Responder

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

lin_responder

Demonstrates basic implementation of LIN responder to transmit and receive LIN 2.0 packets using UART

image247

image248

2.12 Brushed Motor Control

The MSPM0 SDK includes an example to evaluate the brushed motor control library with the DRV8706-Q1 EVM. This firmware was designed for a GUI to make testing and evaluation quick for the user.

Stay tuned for more examples and functionality coming soon.

2.12.1 DRV8706-Q1

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

drv8706s-q1evm-gui-firmware

Firmware for LP_MSPM0L1306 and DRV8706S-Q1 EVM GUI

N

image249

2.13 Stepper Motor Control

The MSPM0 SDK includes examples to evaluate the stepper motor control library with the DRV8411A and DRV8889-q1 EVM. These firmwares were designed for a GUI to make testing and evaluation quick for the user.

Stay tuned for more examples and functionality coming soon.

2.13.1 DRV8411A

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

drv8411aevm-gui-firmware

Firmware for LP_MSPM0L1306 and DRV8411AEVM GUI

N

image250

2.13.2 DRV8889-Q1

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

drv8889-q1evm-gui-firmware

Firmware for LP_MSPM0L1306 and DRV8889-Q1 EVM GUI

N

image251

2.14 SMBus

The System Management Bus (SMBus) is a single-ended simple two-wire bus for lightweight communication.

The MSPM0 SDK includes easy-to-use examples for Controller and Target.

2.14.1 Controller

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

smbus_controller

Demonstrates basic implementation of SMBus Controller testing all SMBus 2.0 protocols using I2C

N

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2.14.2 Target

Project Name

Description

EVM

LP_MSPM0G3507

LP_MSPM0L1306

smbus_target

Demonstrates basic implementation of SMBus Target testing all SMBus 2.0 protocols using I2C

N

image253