Cdd Dma User Guide

Table of Contents

• Introduction
• Cdd Dma Driver Architecture
• Features Supported and Not Supported
• Driver Objects
  • Cdd_Dma_DrvObject (Driver Object)
  • Cdd_Dma_ChObject (Channel Object)
  • Cdd_Dma_EventObject (Event Object)
  • Cdd_Dma_RingObject (Ring Object)
  • Cdd_Dma_FlowObject (Flow Object)
• Functional Description
  • Initialization
  • States
  • Main Functions
• File Structure
• Memory Mapping
• Services used by DMA Driver
  • Cdd_Dma Callback Functions
  • Dependencies on SW modules
    • DET
    • SchM (Optional)
    • Sciclient
• Sciclient Dependency
  • Callback Architecture
  • EB Tresos Configuration
  • Callback Implementation Requirements
  • Reference Implementation
• API Definition
  • API Parameter Definitions
    • Cdd_Dma_Init
    • Cdd_Dma_DeInit
    • Cdd_Dma_ChOpen
    • Cdd_Dma_ChClose
    • Cdd_Dma_ChEnable
    • Cdd_Dma_ChDisable
    • Cdd_Dma_SetChaining
    • Cdd_Dma_BreakChaining
    • Cdd_Dma_StartTransfer
    • Cdd_Dma_GetTransferStatus
    • Cdd_Dma_GetVersionInfo
    • Cdd_Dma_ValidatePeriphConfig
    • Cdd_Dma_RingFlushRaw
    • Cdd_Dma_RegisterReadback
  • Interrupt Service Routines
  • Error Handling
    • DET Error Codes
• EB Configuration Parameters
  • • Cdd_Dma_Config -> Cdd_Dma_ChConfig (Channel Configuration)
    • Cdd_Dma_General (General Configuration)
    • Cdd_Dma_General -> Cdd_Dma_SciclientCallbacks
    • Cdd_Dma_PublishedInformation
    • EB Configuration Value Combinations
      • Block Copy Mode
      • Peripheral TX Mode
      • Peripheral RX Mode
    • Peripheral Configuration
• Steps to Build Applications
  • AM275X
    • Cdd Dma Memcpy Polling App
    • Cdd Dma Memcpy Interrupt App
    • Cdd Dma Chaining App
    • Cdd Uart Dma Echo App
    • Fls Dma App
• Example Logs
  • Cdd Dma Memcpy Polling App Log
  • Cdd Dma Memcpy Interrupt App Log
  • Cdd Dma Chaining App Log

Introduction

This document details AUTOSAR CDD DMA module implementation

• Supported AUTOSAR Release : 4.3.1
• Supported Configuration Variants : Pre-Compile
• Vendor ID : CDD_DMA_VENDOR_ID (44)
• Module ID : CDD_DMA_MODULE_ID (255)

The DMA Complex Device Driver provides a centralized AUTOSAR-compliant interface for Direct Memory Access (DMA) operations across Texas Instruments SoCs (SMPU devices). The driver abstracts the underlying UDMA (Unified DMA) hardware, supporting both Block Copy DMA (BCDMA) and Packet DMA (PKTDMA) instances.

The CDD DMA Driver provides services for:

1. Memory-to-memory block copy transfers (BCDMA)
2. Peripheral DMA transfers for TX and RX operations (PKTDMA)
3. DMA channel chaining for multi-stage transfers without CPU intervention

The driver supports two operational modes:

• Polling Mode - Application polls for transfer completion using Cdd_Dma_GetTransferStatus()
• Interrupt Mode - Hardware-triggered ISR with application callback on transfer completion

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Cdd Dma Driver Architecture

The CDD DMA driver follows a three-layer architecture:

1. CDD DMA API Layer (Cdd_Dma.c, Cdd_Dma.h) - Public AUTOSAR-compliant API with parameter validation and DET error reporting
2. CDD DMA Private Layer (Cdd_Dma_Priv.c, Cdd_Dma_Priv.h) - Internal operations including descriptor initialization (TRPD/HPD), configuration mapping, event registration, and PDMA configuration
3. Low-Level UDMA Driver (v0/src/) - Hardware abstraction for UDMA channel, ring, flow, and event management with register-level access

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Features Supported and Not Supported

Supported	Not Supported
Block Copy (memory-to-memory) DMA transfers	UTC (External) channel mode
Peripheral TX and RX DMA transfers	DRU (Data Routing Unit) direct TR submission
Transfer Modes: Polling, Interrupt	High-capacity and ultra-high-capacity channel types
DMA channel chaining (trigger-based)
Multi-instance DMA support (BCDMA + PKTDMA)

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Driver Objects

The CDD DMA driver internally manages DMA resources through a set of runtime objects. These objects are allocated and initialized during Cdd_Dma_Init() and Cdd_Dma_ChOpen() and hold the hardware state and configuration for each DMA resource.

Cdd_Dma_DrvObject (Driver Object)

A per-instance driver object that holds the global state for a DMA instance (BCDMA or PKTDMA). There is one driver object per DMA instance. It contains:

• DMA instance type and register configurations (BCDMA/PKTDMA registers, Interrupt Aggregator registers, Ring Accelerator registers)
• TISCI RM device IDs for ring, UDMA, PSI-L, IA, and IR resources
• Resource management allocation flags (bitwise flags tracking allocation state of channels, rings, flows, global events, VINTRs, and IR interrupts)
• Sciclient and OSAL callback function pointers
• Ring local API function pointers for ring operations
• Global event object for shared event mode

Cdd_Dma_ChObject (Channel Object)

A per-channel object created for each Cdd_Dma_ChConfig entry. It holds the runtime state of a DMA channel and contains:

• EB Tresos channel configuration parameters (transfer type, DMA mode, peripheral used, etc.)
• Allocated TX/RX channel numbers
• Peer thread ID for PSI-L pairing in peripheral mode
• Ring objects — Free queue ring (fqRing), Completion queue ring (cqRing),
• Default flow object for RX channel flow management
• BCDMA/PKTDMA register overlay pointers for direct hardware access
• Channel trigger value used for chaining channels
• Initialization and OES allocation status flags

Cdd_Dma_EventObject (Event Object)

An event object that manages interrupt/event registration for a DMA channel. It contains:

• Allocated IA global event, VINTR number, and VINTR bit number
• Allocated IR interrupt number and core interrupt number
• Event parameters passed during event registration
• Linked list pointers (nextEvent, prevEvent) for traversing shared events in ISR context
• VINTR bit allocation flag (64-bit) — used by master events to track which bits are allocated to slave events
• IA global event and VINTR register overlay pointers

In shared event mode, a master event object owns the VINTR register and core interrupt, while slave event objects are linked to the master and each occupies a unique VINTR bit within the same 64-bit VINTR register.

Cdd_Dma_RingObject (Ring Object)

A ring object manages a UDMA ring used for descriptor queuing/dequeuing. Each channel allocates up to two rings (free queue, completion queue). It contains:

• Allocated ring number and ring configuration parameters
• Physical base address of ring memory
• LCDMA Ring Accelerator register overlay pointers

Cdd_Dma_FlowObject (Flow Object)

A flow object manages RX flow resources for packet DMA channels. Each RX channel has a default flow object. It contains:

• Flow ID start number and count

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Functional Description

Initialization

Cdd_Dma_Init() is the function responsible for initializing all DMA instances. It configures the UDMA hardware, allocates system resources through Sciclient, and prepares the driver for channel operations.

States

DMA driver maintains these below states as per the driver source condition:

1. CDD_DMA_UNINIT - Driver is not initialized
2. CDD_DMA_INIT - Driver is initialized and ready for operation

Main Functions

1. Cdd_Dma_ChOpen() - Opens and allocates a DMA channel with specified parameters. For peripheral mode, it validates the peripheral configuration against the DMA configuration.
2. Cdd_Dma_ChEnable() - Enables allocated DMA channel for transfer operations after all the channel configurations (such as burst size, dma priority, etc.) have been done.

3. Cdd_Dma_StartTransfer() - Initializes the descriptor (TRPD for block copy or HPD for peripheral mode) and submits it to the free queue ring to start the DMA transfer

   Note: In block copy mode, the descriptor memory (descMem) and descriptor size (descSize) must be initialized and passed by the application. In peripheral mode, the descriptor initialization is handled internally by the driver.

4. Cdd_Dma_GetTransferStatus() - Dequeues descriptor from completion ring and checks transfer completion status with pre-defined UDMA timeout.
5. Cdd_Dma_ChDisable() - Disables a DMA channel by resetting channel configuration registers and stops transfer operations
6. Cdd_Dma_ChClose() - Closes a DMA channel and releases associated hardware resources
7. Cdd_Dma_SetChaining() - Establishes a chaining relationship between multiple DMA channels (trigger channel and a chained channel). When the trigger channel completes its transfer, it automatically triggers the chained channel for transfer without CPU intervention.
8. Cdd_Dma_BreakChaining() - Removes an existing chaining relationship between configured multiple DMA channels, restoring them to independent operation.

Note: Two software triggers are available for BCDMA triggers — MCAL_CSL_UDMAP_TR_FLAGS_TRIGGER_GLOBAL0 (1U) and MCAL_CSL_UDMAP_TR_FLAGS_TRIGGER_GLOBAL1 (2U). Currently, channel chaining is supported and tested with MCAL_CSL_UDMAP_TR_FLAGS_TRIGGER_GLOBAL0 only.

Typical Block Copy Transfer Flow: Refer cdd_dma_memcpy_polling_app and cdd_dma_memcpy_interrupt_app for reference implementation.

1. Cdd_Dma_Init() → Initialize driver
2. Cdd_Dma_ChOpen() → Open channel with ring memory, number of elements to be submitted in ring
3. Cdd_Dma_ChEnable() → Enable the channel
4. Cdd_Dma_StartTransfer() → Submit transfer (source address, destination address, bytes to transfer). Additionally descriptor memory, descriptor size to be initialized and sent from application only in bcdma mode.
5. Cdd_Dma_GetTransferStatus() → Poll/wait for completion
6. Cdd_Dma_ChDisable() → Disable the channel
7. Cdd_Dma_ChClose() → Release channel resources

Channel Chaining Flow: Refer cdd_dma_chaining_app for reference implementation.

1. Cdd_Dma_Init() → Initialize driver
2. Cdd_Dma_ChOpen(triggerChConfigID, &triggerPrms) → Open trigger channel with ring memory, descriptor memory, and transfer parameters
3. Cdd_Dma_ChOpen(chainedChConfigID, &chainedPrms) → Open chained channel with ring memory, descriptor memory, and transfer parameters
4. Cdd_Dma_ChEnable(triggerChConfigID) → Enable the trigger channel
5. Cdd_Dma_ChEnable(chainedChConfigID) → Enable the chained channel
6. Cdd_Dma_SetChaining(triggerChConfigID, chainedChConfigID) → Establish chaining relationship between trigger and chained channels. When the trigger channel completes, it automatically triggers the chained channel.
7. Cdd_Dma_StartTransfer(chainedChConfigID, &chainedPrms) → Submit transfer on chained channel first (source, destination, bytes to transfer, descriptor memory, descriptor size)
8. Cdd_Dma_StartTransfer(triggerChConfigID, &triggerPrms) → Submit transfer on trigger channel (source, destination, bytes to transfer, descriptor memory, descriptor size). On completion, this automatically triggers the chained channel transfer.
9. Cdd_Dma_GetTransferStatus(triggerChConfigID, ...) → Poll/wait for trigger channel completion
10. Cdd_Dma_GetTransferStatus(chainedChConfigID, ...) → Poll/wait for chained channel completion
11. Cdd_Dma_BreakChaining(triggerChConfigID, chainedChConfigID) → Remove chaining relationship
12. Cdd_Dma_ChDisable(triggerChConfigID) → Disable the trigger channel
13. Cdd_Dma_ChDisable(chainedChConfigID) → Disable the chained channel
14. Cdd_Dma_ChClose(triggerChConfigID) → Release trigger channel resources
15. Cdd_Dma_ChClose(chainedChConfigID) → Release chained channel resources

Peripheral Mode Transfer Flow (TX and RX): For peripheral DMA transmit and receive operations (e.g., UART via PKTDMA, FLS via BCDMA), refer cdd_uart_dma_echo_app, fls_dma_app for reference implementation.

Application Usage — APIs called by the customer application:

1. Cdd_Dma_Init() → Initialize DMA driver (called once before peripheral initialization)
2. Cdd_Uart_Init() → Initialize UART driver
3. CacheP_wb() → Perform cache writeback on TX data buffer before initiating write
4. Cdd_Uart_Write() → Transmit data (internally triggers DMA TX transfer)
5. CacheP_wbInv() → Perform cache writeback and invalidate on RX data buffer before initiating read
6. Cdd_Uart_Read() → Receive data (internally triggers DMA RX transfer)
7. Cdd_Uart_DeInit() → Deinitialize UART driver
8. Cdd_Dma_DeInit() → Deinitialize DMA driver

What Happens Internally — DMA channel APIs called by the UART driver on behalf of the application (not to be called directly by the customer):

TX:

1. Cdd_Dma_ChOpen() → Open TX channel with HPD memory, ring memory, peer channel number (PSI-L thread), and event callback. Internally calls Cdd_Dma_ValidatePeriphConfig() to validate and map the peripheral HW unit ID to the DMA channel ID.
2. Cdd_Dma_ChEnable() → Enable the TX channel
3. Cdd_Dma_StartTransfer() → Initialize HPD (Host Packet Descriptor) with source buffer and length, and submit to the free queue ring. DMA hardware transfers data from source buffer to peripheral FIFO.
4. Cdd_Dma_GetTransferStatus() → Dequeue completed HPD from completion ring and check transfer status. Called from ISR callback or in polling mode.
5. Cdd_Dma_ChDisable() → Disable the TX channel
6. Cdd_Dma_ChClose() → Release TX channel resources

RX:

1. Cdd_Dma_ChOpen() → Open RX channel with HPD memory, ring memory, RX PSI-L peer thread, and RX event callback. Internally calls Cdd_Dma_ValidatePeriphConfig() to validate RX direction.
2. Cdd_Dma_ChEnable() → Enable the RX channel
3. Cdd_Dma_StartTransfer() → Initialize HPD with destination buffer and length. DMA hardware transfers data from peripheral FIFO to destination buffer.
4. Cdd_Dma_GetTransferStatus() → Dequeue completed HPD and extract received byte count from HPD descriptor info field. Called from ISR callback or in polling mode.
5. Cdd_Dma_ChDisable() → Disable the RX channel
6. Cdd_Dma_ChClose() → Release RX channel resources

Note: The DMA channel-level APIs listed under What Happens Internally above are invoked by the peripheral driver (e.g., CDD UART) and must not be called directly by the customer application. In peripheral mode, the ChConfigID passed to Cdd_Dma_ChOpen() is the peripheral hardware unit ID (e.g., 0-6 for UART0-UART6, 7 for OSPI), not the EB Tresos configuration index. The driver internally maps this to the correct DMA ConfigID (channel configured on the DMA configuration side) via Cdd_Dma_ValidatePeriphConfig(). Refer (EB Configuration Parameters) Peripheral Configuration for DMA side channel configuration details. The descriptor type used is HPD (Host Packet Descriptor), unlike block copy mode which uses TRPD (TR Packet Descriptor).

Important: All DMA APIs invoked internally by the peripheral driver (Cdd_Dma_ChOpen, Cdd_Dma_ChEnable, Cdd_Dma_StartTransfer, Cdd_Dma_GetTransferStatus, Cdd_Dma_ChDisable, Cdd_Dma_ChClose) must be enabled (set to STD_ON) in Cdd_Dma_Cfg.h for proper functionality in peripheral mode. Disabling any of these APIs will cause peripheral DMA operations to fail.

Note: For peripheral mode, the EB Tresos configuration parameter Cdd_Dma_PeriphValidateApi must be set to STD_ON to enable Cdd_Dma_ValidatePeriphConfig(). If this is disabled, Cdd_Dma_ChOpen() will not be able to validate and map the peripheral HW unit ID to the DMA channel ID.

DMA API expects Channel Config ID which depends on the transfer mode:

• Block Copy Mode: The ChConfigID is the EB Tresos configuration index (Cdd_Dma_ChConfig array index)
• Peripheral Mode: The ChConfigID is the peripheral hardware unit ID (e.g., 0-6 for UART0-UART6, 7 for OSPI) which is passed by the peripheral driver and proper channel/ring/event object mapping is done by DMA driver.

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File Structure

The file structure for the DMA driver is organized into API, private, and low-level layers.

• Cdd_Dma.h : Shall specify the interface provided by the driver including all public API declarations, data types, and macros.
• Cdd_Dma.c : Shall implement the public API functions with parameter validation and DET error reporting.
• Cdd_Dma_Irq.h, Cdd_Dma_Irq.c : Contain interrupt service routines for per-channel DMA completion events.
• Cdd_Dma_Priv.h, Cdd_Dma_Priv.c : Contain private/internal functions for descriptor initialization, configuration mapping, event management, and PDMA configuration.
• v0/src/dma.c : Low-level UDMA core driver initialization and configuration.
• v0/src/dma_ch.c : Low-level UDMA channel management (open, close, enable, disable).
• v0/src/dma_ring.c, dma_ring_lcdma.c : Ring accelerator management for descriptor queuing.
• v0/src/dma_event.c : Event and virtual interrupt management.
• v0/src/dma_rm.c : Resource manager for channel, ring, flow, and event allocation.
• v0/soc/ : SoC-specific definitions and resource mappings for respective SOCs.

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Memory Mapping

Memory Mapping Sections	CDD_DMA_CODE	CDD_DMA_ISR_CODE	CDD_DMA_VAR_INIT	CDD_DMA_VAR_NO_INIT	CDD_DMA_CONST	CDD_DMA_CONFIG_DATA
CDD_DMA_START_SEC_CODE(.text) CDD_DMA_STOP_SEC_CODE	X
CDD_DMA_START_SEC_ISR_CODE(.text) CDD_DMA_STOP_SEC_ISR_CODE		X
CDD_DMA_START_SEC_VAR_INIT_UNSPECIFIED(.data) CDD_DMA_STOP_SEC_VAR_INIT_UNSPECIFIED			X
CDD_DMA_START_SEC_VAR_INIT_32(.data) CDD_DMA_STOP_SEC_VAR_INIT_32			X
CDD_DMA_START_SEC_VAR_NO_INIT_UNSPECIFIED(.bss) CDD_DMA_STOP_SEC_VAR_NO_INIT_UNSPECIFIED				X
CDD_DMA_START_SEC_CONST_UNSPECIFIED(.const) CDD_DMA_STOP_SEC_CONST_UNSPECIFIED					X
CDD_DMA_START_SEC_CONFIG_DATA(.const) CDD_DMA_STOP_SEC_CONFIG_DATA						X

Note: All memory allocated by the application — including ring memory (ringMem), descriptor memory (TRPD/HPD), and source/destination data buffers — must be 128-byte cache line aligned (CDD_DMA_CACHELINE_ALIGNMENT = 128U). Misaligned memory may cause data corruption or unexpected DMA behavior.

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Services used by DMA Driver

Cdd_Dma Callback Functions

The DMA driver provides event callback functions for interrupt mode operation. When a channel is configured in interrupt mode, the registered event callback from application is passed to eventCb in Cdd_Dma_ParamsType and is invoked upon DMA transfer completion.

Dependencies on SW modules

DET

The module DMA depends on the DET in order to report development errors. Detection and reporting of development errors, DET shall be enabled or disabled by the switch CDD_DMA_DEV_ERROR_DETECT = STD_ON in Cdd_Dma_Cfg.h, generated by using appropriate option check within the configurator plugin. The DET can be replaced optionally by an equivalent component which is responsible to recognize development errors, if no DET component is available.

SchM (Optional)

Besides the OS, the BSW Scheduler provides functions that module DMA calls at beginning and end of critical sections.

There is only one kind of critical sections in this driver. Within these sections all read / modify / write accesses to internal DMA status variables must be performed. This is defined in the application and used to handle in the DMA driver by invoking SchM_Enter_Cdd_Dma_DMA_EXCLUSIVE_AREA_0() and SchM_Exit_Cdd_Dma_DMA_EXCLUSIVE_AREA_0() functions

Sciclient

The CDD DMA driver depends on the System Controller Client (Sciclient) for hardware resource management. The Sciclient callbacks are used for:

• Resource range queries (channel, ring, flow, event allocation)
• Interrupt router configuration
• PSIL thread pairing for peripheral DMA

Refer (Sciclient Dependency) for detailed information on Sciclient callback configuration and implementation.

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Sciclient Dependency

The CDD DMA driver uses Sciclient (System Controller Client) for all hardware resource management operations. Instead of directly linking to Sciclient APIs, the driver uses a callback-based architecture where the application provides Sciclient implementations via function pointers configured through EB Tresos.

Important: All Sciclient callback APIs listed below must be defined and implemented in the user application. The CDD DMA driver does not include Sciclient library dependencies directly — it invokes these operations only through the function pointers provided by the application. The user application is responsible for including the Sciclient headers (sciclient.h) from the MCU+SDK and implementing each callback to call the corresponding Sciclient RM API.

Callback Architecture

The driver defines a callback structure (MCAL_Udma_SciclientCallbacks) in dma_sciclient_callbacks.h that holds function pointers for all required Sciclient operations. The application implements these callbacks in app_utils_cdd_dma.c (or equivalent), where it:

1. Includes sciclient.h from the MCU+SDK
2. Accesses driver, channel, and event objects via extern declarations: (Driver Objects )
   • extern Cdd_Dma_DrvObjectType Cdd_Dma_DrvObjects[];
   • extern Cdd_Dma_ChObjectType Cdd_Dma_ChannelObjects[];
   • extern Cdd_Dma_EventObjectType Cdd_Dma_EventObjects[];
3. Initializes TISCI message structures from driver/channel object data
4. Calls the appropriate Sciclient RM API configured as function pointer
5. Writes responses back to driver/channel objects

EB Tresos Configuration

The Sciclient callback function names are configured in EB Tresos under: Cdd_Dma_General -> Cdd_Dma_SciclientCallbacks

The following callbacks are configurable:

EB Tresos Parameter	Default Callback Function	Sciclient API	Purpose
Cdd_Dma_SciclientGetResourceRange	App_UtilsSciclientGetResourceRange	Sciclient_rmGetResourceRange	Query available DMA resource ranges (channels, rings, flows, events) from DMSC during driver initialization
Cdd_Dma_SciclientRingCfg	App_SciclientRingCfg	Sciclient_rmRingCfg	Configure DMA ring buffers (FQ/CQ rings) during channel open
Cdd_Dma_SciclientUdmapTxChCfg	App_SciclientUdmapTxChCfg	Sciclient_rmUdmapTxChCfg	Configure UDMA TX channel parameters during channel open
Cdd_Dma_SciclientUdmapRxChCfg	App_SciclientUdmapRxChCfg	Sciclient_rmUdmapRxChCfg	Configure UDMA RX channel parameters during channel open
Cdd_Dma_SciclientPsilPair	App_SciclientPsilPair	Sciclient_rmPsilPair	Pair PSI-L threads to connect DMA to peripherals during channel enable
Cdd_Dma_SciclientPsilUnpair	App_SciclientPsilUnpair	Sciclient_rmPsilUnpair	Unpair PSI-L threads during channel disable
Cdd_Dma_SciclientIrqSet	App_SciclientIrqSet	Sciclient_rmIrqSet	Configure interrupt routing (IA+IR) for event registration and OES for event chaining
Cdd_Dma_SciclientIrqRelease	App_SciclientIrqRelease	Sciclient_rmIrqRelease	Release interrupt routing for event unregistration and OES release for event chaining
Cdd_Dma_SciclientIrqTranslateIaOutput	App_SciclientIrqTranslateIaOutput	Sciclient_rmIrqTranslateIaOutput	Translate IA virtual interrupt number to IR output interrupt number during RM initialization
Cdd_Dma_SciclientGetCoreSciDevId	App_GetCoreSciDevId	Sciclient_getSelfDevIdCore	Get current core's TISCI device ID for interrupt routing during RM initialization

Callback Implementation Requirements

All callback implementations must:

1. Access driver/channel objects via extern declarations (Cdd_Dma_DrvObjects[], Cdd_Dma_ChannelObjects[])
2. Build TISCI message structures from driver/channel object data
3. Call the appropriate Sciclient RM API
4. Return 0 (E_OK) on success, negative error code on failure
5. Support the timeout parameter (DMA_SCICLIENT_TIMEOUT = 0xFFFFFFFFU)

Note: For getResourceRange callback, the application should handle fallback with TISCI_HOST_ID_ALL if the initial query fails.

Note: For irqSet and irqRelease callbacks, the isChaining parameter determines the behavior:

• isChaining = TRUE: Configure/release basic OES (Output Event Steering) for DMA channel chaining
• isChaining = FALSE: Configure/release full interrupt routing (IA + IR) for event registration

Reference Implementation

A reference implementation of all Sciclient callbacks is provided in the example application:

• Source file: examples/utils/src/app_utils_cdd_dma.c
• This file demonstrates how to implement each callback by accessing driver/channel objects, building TISCI requests, and calling Sciclient APIs.

For more information on callback typedefs, MCAL TISCI macros, and detailed parameter descriptions, refer CddDma/v0/include/dma_sciclient_callbacks.h

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API Definition

API Parameter Definitions

Cdd_Dma_Init

Attribute	Value
Syntax	void Cdd_Dma_Init(const Cdd_Dma_ConfigType* ConfigPtr)
Service ID	0x01
Sync/Async	Synchronous
Reentrancy	Non-Reentrant
Return value	None
Parameter	Direction	Type	Description
ConfigPtr	In	const Cdd_Dma_ConfigType*	Pointer to DMA driver configuration set. Uses pre-compile configuration (CDD_DMA_INIT_CONFIG_PC).

Cdd_Dma_DeInit

Attribute	Value
Syntax	void Cdd_Dma_DeInit(void)
Service ID	0x02
Sync/Async	Synchronous
Reentrancy	Non-Reentrant
Return value	None
Parameter	Direction	Type	Description
None	-	-	No parameters. Deinitializes CDD DMA, closes all channels and releases hardware resources. Enabled by CDD_DMA_DEINIT_API.

Cdd_Dma_ChOpen

Attribute	Value
Syntax	Std_ReturnType Cdd_Dma_ChOpen(uint8 ChConfigID, Cdd_Dma_ParamsType* dmaParams)
Service ID	0x10
Sync/Async	Synchronous
Reentrancy	Reentrant for different channels
Return value	Std_ReturnType (E_OK / E_NOT_OK)
Parameter	Direction	Type	Description
ChConfigID	In	uint8	BCDMA: EB Tresos config ID (Cdd_Dma_ChConfig array index), passed by application. Refer cdd_dma_memcpy_polling_app / cdd_dma_memcpy_interrupt_app. Peripheral: Peripheral HW unit ID (e.g., 0-6 for UART0-6), passed by peripheral driver. Refer cdd_uart_dma_echo_app.
dmaParams->ringMem	In	void*	Pointer to ring memory (must be 128-byte cache line aligned). BCDMA: Allocated and passed by application. Refer cdd_dma_memcpy_polling_app. Peripheral: Allocated and passed by peripheral driver. Refer cdd_uart_dma_echo_app.
dmaParams->ringMemSize	In	uint32	Size of ring memory in bytes. BCDMA: Passed by application. Peripheral: Passed by peripheral driver.
dmaParams->ringElemCnt	In	uint32	Number of elements in ring. Configured via EB Tresos (Cdd_Dma_RingElemCount). The driver reads this from the EB configuration internally.
dmaParams->peerChNum	In	uint32	PSI-L peer channel number. BCDMA: Not applicable, set to MCAL_UDMA_DMA_CH_INVALID (0xFFFF0000U). Refer cdd_dma_memcpy_polling_app. Peripheral: Calculated and passed by peripheral driver (PSIL thread offset + channel ID). Refer cdd_uart_dma_echo_app.
dmaParams->channelType	In	uint32	DMA channel transfer direction. BCDMA: Set to CDD_DMA_BC_MODE. Refer cdd_dma_memcpy_polling_app. Peripheral: Set to CDD_DMA_PERIPH_TX_MODE or CDD_DMA_PERIPH_RX_MODE by peripheral driver. Refer cdd_uart_dma_echo_app.
dmaParams->bcChanMode	In	boolean	Block copy channel mode flag. TRUE: To Open a TR block-copy (BCDMA) channel when channelType is PERIPH_TX_MODE. Required for peripherals (e.g., OSPI) that are driven by BCDMA rather than PDMA — PDMA requires a valid peerChNum (PSIL thread) which BCDMA channels do not have. FALSE: Use default channel type based on channelType parameter. Typically used for standard peripherals and BCDMA block copy operations.
dmaParams->eventCb	In	MCAL_Udma_EventCallback	Event callback function pointer for interrupt mode operation. BCDMA: Passed by application. Refer cdd_dma_memcpy_interrupt_app. Peripheral: Passed by peripheral driver. Refer cdd_uart_dma_echo_app.
dmaParams->appData	In	void*	Application data pointer passed to event callback. BCDMA: Passed by application. Refer cdd_dma_memcpy_interrupt_app. Peripheral: Passed by peripheral driver. Refer cdd_uart_dma_echo_app.
dmaParams->dmaChannelId	Inout	uint8	Stores the validated DMA channel ID on success. Initialize to 0xFF before calling ChOpen. BCDMA: Set by driver from EB Tresos config index. Refer cdd_dma_memcpy_polling_app. Peripheral: Set by driver after Cdd_Dma_ValidatePeriphConfig() maps peripheral HW unit ID to DMA channel ID. Refer cdd_uart_dma_echo_app.

Cdd_Dma_ChClose

Attribute	Value
Syntax	Std_ReturnType Cdd_Dma_ChClose(uint8 ChConfigID)
Service ID	0x11
Sync/Async	Synchronous
Reentrancy	Reentrant for different channels
Return value	Std_ReturnType (E_OK / E_NOT_OK)
Parameter	Direction	Type	Description
ChConfigID	In	uint8	For peripheral mode: Peripheral HW unit ID (e.g., 0-6 for UART0-6). For block copy mode: EB Tresos config ID (Cdd_Dma_ChConfig index).

Cdd_Dma_ChEnable

Attribute	Value
Syntax	Std_ReturnType Cdd_Dma_ChEnable(uint8 ChConfigID)
Service ID	0x12
Sync/Async	Synchronous
Reentrancy	Reentrant for different channels
Return value	Std_ReturnType (E_OK / E_NOT_OK)
Parameter	Direction	Type	Description
ChConfigID	In	uint8	For peripheral mode: Peripheral HW unit ID (e.g., 0-6 for UART0-6). For block copy mode: EB Tresos config ID (Cdd_Dma_ChConfig index).

Cdd_Dma_ChDisable

Attribute	Value
Syntax	Std_ReturnType Cdd_Dma_ChDisable(uint8 ChConfigID)
Service ID	0x13
Sync/Async	Synchronous
Reentrancy	Reentrant for different channels
Return value	Std_ReturnType (E_OK / E_NOT_OK)
Parameter	Direction	Type	Description
ChConfigID	In	uint8	For peripheral mode: Peripheral HW unit ID (e.g., 0-6 for UART0-6). For block copy mode: EB Tresos config ID (Cdd_Dma_ChConfig index).

Cdd_Dma_SetChaining

Attribute	Value
Syntax	Std_ReturnType Cdd_Dma_SetChaining(uint8 TriggerChConfigID, uint8 ChainedChConfigID)
Service ID	0x14
Sync/Async	Synchronous
Reentrancy	Reentrant for different channel pairs
Return value	Std_ReturnType (E_OK / E_NOT_OK)
Parameter	Direction	Type	Description
TriggerChConfigID	In	uint8	EB Tresos config ID (Cdd_Dma_ChConfig index) of the channel that triggers the chained transfer.
ChainedChConfigID	In	uint8	EB Tresos config ID (Cdd_Dma_ChConfig index) of the channel that is triggered.

Cdd_Dma_BreakChaining

Attribute	Value
Syntax	Std_ReturnType Cdd_Dma_BreakChaining(uint8 TriggerChConfigID, uint8 ChainedChConfigID)
Service ID	0x15
Sync/Async	Synchronous
Reentrancy	Reentrant for different channel pairs
Return value	Std_ReturnType (E_OK / E_NOT_OK)
Parameter	Direction	Type	Description
TriggerChConfigID	In	uint8	EB Tresos config ID (Cdd_Dma_ChConfig index) of the channel that was triggering.
ChainedChConfigID	In	uint8	EB Tresos config ID (Cdd_Dma_ChConfig index) of the channel that was being triggered.

Cdd_Dma_StartTransfer

Attribute	Value
Syntax	Std_ReturnType Cdd_Dma_StartTransfer(uint8 ChConfigID, Cdd_Dma_ParamsType* dmaParams)
Service ID	0x16
Sync/Async	Synchronous
Reentrancy	Reentrant for different channels
Return value	Std_ReturnType (E_OK / E_NOT_OK)
Parameter	Direction	Type	Description
ChConfigID	In	uint8	BCDMA: EB Tresos config ID (Cdd_Dma_ChConfig array index), passed by application. Refer cdd_dma_memcpy_polling_app / cdd_dma_memcpy_interrupt_app. Peripheral: Peripheral HW unit ID (e.g., 0-6 for UART0-6), passed by peripheral driver. Refer cdd_uart_dma_echo_app.
dmaParams->srcBuf	In	Cdd_Dma_BufferType*	Source buffer pointer. BCDMA: Allocated and passed by application (source data buffer). Refer cdd_dma_memcpy_polling_app. Peripheral TX: Allocated and passed by application(TX data buffer) from cdd_uart_write(). Refer cdd_uart_dma_echo_app. Peripheral RX: Not applicable (set to NULL_PTR).
dmaParams->destBuf	In	Cdd_Dma_BufferType*	Destination buffer pointer. BCDMA: Allocated and passed by application (destination data buffer). Refer cdd_dma_memcpy_polling_app. Peripheral RX: Allocated and passed by application (RX data buffer) from cdd_uart_read(). Refer cdd_uart_dma_echo_app. Peripheral TX: Not applicable (set to NULL_PTR).
dmaParams->length	In	uint32	Transfer length in bytes. BCDMA: Passed by application. Refer cdd_dma_memcpy_polling_app. Peripheral: Passed by peripheral driver (e.g., UART read/write count). Refer cdd_uart_dma_echo_app.
dmaParams->trpdMem	In	Cdd_Dma_BufferType*	Pointer to TRPD descriptor memory (128-byte cache line aligned). BCDMA: Allocated and passed by application. Must be initialized before StartTransfer. Refer cdd_dma_memcpy_polling_app. Peripheral: Not applicable, set to NULL_PTR. Peripheral mode uses HPD instead.
dmaParams->hpdMem	In	Cdd_Dma_BufferType*	Pointer to HPD descriptor memory (128-byte cache line aligned). BCDMA: Not applicable, set to NULL_PTR. Block copy mode uses TRPD instead. Peripheral: Allocated and passed by peripheral driver. Refer cdd_uart_dma_echo_app.
dmaParams->trigger0Type	In	uint32	Trigger type for TRIGGER0. BCDMA (chaining): Set to MCAL_CSL_UDMAP_TR_FLAGS_TRIGGER_GLOBAL0 by application. Refer cdd_dma_chaining_app. BCDMA (non-chaining): Set to MCAL_CSL_UDMAP_TR_FLAGS_TRIGGER_NONE. Peripheral: Not applicable (set to MCAL_CSL_UDMAP_TR_FLAGS_TRIGGER_NONE).
dmaParams->trigger1Type	In	uint32	Trigger type for TRIGGER1. BCDMA: Set to MCAL_CSL_UDMAP_TR_FLAGS_TRIGGER_NONE. Refer cdd_dma_memcpy_polling_app / cdd_dma_chaining_app. Peripheral: Not applicable, set to MCAL_CSL_UDMAP_TR_FLAGS_TRIGGER_NONE.

Cdd_Dma_GetTransferStatus

Attribute	Value
Syntax	Std_ReturnType Cdd_Dma_GetTransferStatus(uint8 ChConfigID, void* descMem, uint32 descSize, uint64* pDesc, uint32 timeout)
Service ID	0x17
Sync/Async	Synchronous
Reentrancy	Reentrant for different channels
Return value	Std_ReturnType (E_OK / E_NOT_OK)
Parameter	Direction	Type	Description
ChConfigID	In	uint8	BCDMA: EB Tresos config ID (Cdd_Dma_ChConfig array index), passed by application. Refer cdd_dma_memcpy_polling_app / cdd_dma_memcpy_interrupt_app. Peripheral: Peripheral HW unit ID (e.g., 0-6 for UART0-6), passed by peripheral driver. Refer cdd_uart_dma_echo_app.
descMem	In	void*	Descriptor virtual memory pointer for cache invalidation. BCDMA: Pointer to TRPD descriptor memory, passed by application. Refer cdd_dma_memcpy_polling_app. Peripheral: Pointer to HPD descriptor memory, passed by peripheral driver. Refer cdd_uart_dma_echo_app.
descSize	In	uint32	Descriptor memory size in bytes. BCDMA: TRPD descriptor size, passed by application. Refer cdd_dma_memcpy_polling_app. Peripheral: HPD descriptor size, passed by peripheral driver. Refer cdd_uart_dma_echo_app.
pDesc	Out	uint64*	Pointer to 64-bit variable for dequeued descriptor from completion ring. BCDMA: Application uses this to verify transfer completion. Refer cdd_dma_memcpy_polling_app. Peripheral: Peripheral driver uses this to extract transfer status and byte count from the HPD descriptor info field. Refer cdd_uart_dma_echo_app.
timeout	In	uint32	Timeout counter. 1 = check once and return, >1 = number of wait iterations before timeout. BCDMA (polling): Application passes a suitable timeout value. Refer cdd_dma_memcpy_polling_app. BCDMA (interrupt): Called from ISR callback with timeout=1. Refer cdd_dma_memcpy_interrupt_app. Peripheral: Called from ISR callback with timeout=1. Refer cdd_uart_dma_echo_app.

Cdd_Dma_GetVersionInfo

Attribute	Value
Syntax	void Cdd_Dma_GetVersionInfo(Std_VersionInfoType* VersionInfoPtr)
Service ID	0x18
Sync/Async	Synchronous
Reentrancy	Reentrant
Return value	None
Parameter	Direction	Type	Description
VersionInfoPtr	Out	Std_VersionInfoType*	Pointer to Std_VersionInfoType structure where the version information is stored.

Cdd_Dma_ValidatePeriphConfig

Attribute	Value
Syntax	Std_ReturnType Cdd_Dma_ValidatePeriphConfig(uint32 periphHwUnitID, uint32 periphTransDir, uint8* pDmaChannelID)
Service ID	0x24
Sync/Async	Synchronous
Reentrancy	Reentrant
Return value	Std_ReturnType (E_OK / E_NOT_OK)
Parameter	Direction	Type	Description
periphHwUnitID	In	uint32	Peripheral hardware unit ID (e.g., 0-6 for UART0-UART6, 7 for OSPI) passed by driver.
periphTransDir	In	uint32	Peripheral transfer direction (TX=0, RX=1, TX_RX=2) passed by driver.
pDmaChannelID	Out	uint8*	Pointer to store the matching DMA channel ID (populated by driver). Set to CDD_DMA_PERIPH_NOT_USED (0xFF) on failure/BCDMA mode.

Cdd_Dma_RingFlushRaw

Attribute	Value
Syntax	Std_ReturnType Cdd_Dma_RingFlushRaw(uint8 ChConfigID)
Service ID	0x19
Sync/Async	Synchronous
Reentrancy	Reentrant for different channels
Return value	Std_ReturnType (E_OK / E_NOT_OK)
Parameter	Direction	Type	Description
ChConfigID	In	uint8	EB Tresos config ID (Cdd_Dma_ChConfig index) for the channel whose free queue ring is to be flushed.

Cdd_Dma_RegisterReadback

Attribute	Value
Syntax	Std_ReturnType Cdd_Dma_RegisterReadback(uint8 ChannelID, Cdd_Dma_RegisterReadbackType* RegisterSetPtr)
Service ID	0x1A
Sync/Async	Synchronous
Reentrancy	Reentrant for different channels
Return value	Std_ReturnType (E_OK / E_NOT_OK)
Parameter	Direction	Type	Description
ChannelID	In	uint8	DMA channel ID (0 to CDD_DMA_NUM_CHANNELS-1) for which register readback is requested.
RegisterSetPtr	Out	Cdd_Dma_RegisterReadbackType*	Pointer to structure where hardware register values are stored. Populated fields depend on the channel type: BCDMA BC_MODE fills bcdmaBc_* fields; PKTDMA PERIPH_TX_MODE fills pktdmaTx_* fields; PKTDMA PERIPH_RX_MODE fills pktdmaRx_* fields. Other fields are zeroed. Enabled by CDD_DMA_REGISTER_READBACK_API.

Interrupt Service Routines

Following Interrupt Service Routines are present in CDD DMA:

1. Cdd_Dma_ChannelIsr - The master event-based Interrupt Subroutine that dispatches to per-channel slave-handlers.
2. Cdd_Dma_Channel0Isr to Cdd_Dma_Channel9Isr - Per-channel ISRs that are conditionally compiled based on CDD_DMA_CHANNEL_x_ACTIVE macros. Supports CAT1, CAT2, and VOID ISR types.

The user must configure the core interrupt numbers allocated for DMA in the application. The interrupt numbers are SoC-specific and differ based on the DMA mode. The following table lists the valid core interrupt number ranges:

SoC	DMA Mode	DMA Instance	Core Interrupt Range	Number of Interrupts
AM275X	Block Copy (BCDMA)	CDD_DMA_ID_0	68 - 74	7
AM275X	Peripheral (PKTDMA)	CDD_DMA_ID_1	75 - 81	7
AM62PX	Block Copy (BCDMA)	CDD_DMA_ID_0	64 - 67	4
AM62PX	Peripheral (PKTDMA)	CDD_DMA_ID_1	68 - 71	4
AM62AX	Block Copy (BCDMA)	CDD_DMA_ID_0	64 - 67	4
AM62AX	Peripheral (PKTDMA)	CDD_DMA_ID_1	68 - 71	4
AM62DX	Block Copy (BCDMA)	CDD_DMA_ID_0	64 - 67	4
AM62DX	Peripheral (PKTDMA)	CDD_DMA_ID_1	68 - 71	4
AM62X	Block Copy (BCDMA)	CDD_DMA_ID_0	68 - 85	18
AM62X	Peripheral (PKTDMA)	CDD_DMA_ID_1	86 - 102	17

Points to be taken care in event/interrupt registration:

1. The user must ensure that the core interrupt number configured for each DMA channel is unique and falls within the valid range for the respective SoC and DMA mode. Each interrupt-based DMA application must use a distinct core interrupt number to avoid conflicts.
2. When a global master event is registered with a core interrupt, multiple DMA channels can register their completion events as slave events in shared event mode (CDD_DMA_EVENT_MODE_SHARED). A single 64-bit VINTR (Virtual Interrupt) is allocated for the master event, and each slave event (e.g., UART0 TX completion, UART0 RX completion) is mapped to a corresponding VINTR status bit. When any slave event fires, it sets its respective bit in the VINTR register and routes to the single core interrupt. This allows a single core interrupt registration to handle up to 64 DMA channels, avoiding the need for separate core interrupt numbers per channel.
3. When freeing up DMA event resources, stale or spurious interrupts may occur which can lead to multiple unexpected ISR hits. It is suggested to disable the core interrupt before freeing up events to avoid such stale interrupts.

Error Handling

Development error reporting. The Cdd_Dma Driver will report development errors on enabling CDD_DMA_DEV_ERROR_DETECT == STD_ON in Cdd_Dma_Cfg.h

DET Error Codes

Error Code	Value	Description
CDD_DMA_E_UNINIT	0x01	API called before driver initialization
CDD_DMA_E_ALREADY_INITIALIZED	0x02	Cdd_Dma_Init called when driver is already initialized
CDD_DMA_E_PARAM_POINTER	0x03	NULL pointer passed as parameter
CDD_DMA_E_PARAM_VALUE	0x04	Invalid parameter value
CDD_DMA_E_INVALID_CHANNEL	0x05	Invalid DMA channel ID specified

As per AUTOSAR specification, all API functions shall validate their input parameters before processing. These checks are performed internally by each API function and are intended for development error reporting. Parameter validation can be enabled or disabled via the configuration parameter CDD_DMA_DEV_ERROR_DETECT. Refer to the EB Configuration Parameters section for details.

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EB Configuration Parameters

CDD DMA driver supports Pre-Compile variant.

Cdd_Dma_TI_AM275X/Cdd_Dma_TI_AM62PX/Cdd_Dma_TI_AM62X/Cdd_Dma_TI_AM62AX/Cdd_Dma_TI_AM62DX configurator plugin for the driver supports below configurable parameters:

Cdd_Dma_Config -> Cdd_Dma_ChConfig (Channel Configuration)

Up to 15 individual channel configurations can be added for AM275X, 8 individual channels for AM62PX/AM62DX/AM62AX and 12 individual channels for AM62X devices respectively. Each channel has the following parameters:

EB Parameter	Type	Default	Range	Description
Cdd_Dma_TransType	Enum	CDD_DMA_BC_MODE	CDD_DMA_BC_MODE, CDD_DMA_PERIPH_TX_MODE, CDD_DMA_PERIPH_RX_MODE	Specifies the DMA transfer type. BC Mode for Block Copy DMA, Periph TX Mode for Peripheral Transmit, Periph RX Mode for Peripheral Receive.
Cdd_Dma_InstID	Enum	CDD_DMA_ID_0	CDD_DMA_ID_0, CDD_DMA_ID_1	DMA Instance ID. Instance 0 is for Block-copy DMA (BCDMA), Instance 1 is for Packet DMA (PKTDMA). Both instances are available in main domain.
Cdd_Dma_Mode	Enum	CDD_DMA_MODE_POLLING	CDD_DMA_MODE_POLLING, CDD_DMA_MODE_INTERRUPT	Operational mode for the DMA channel. Polling mode requires application to poll for completion, Interrupt mode triggers ISR callback on completion.
Cdd_Dma_PeriphUsed	Enum	CDD_DMA_BC_CHANNEL	CDD_DMA_BC_CHANNEL, CDD_DMA_PERIPH_UART0 - UART6, CDD_DMA_PERIPH_OSPI	Specifies which peripheral is used with DMA. Select CDD_DMA_BC_CHANNEL for Block Copy mode, or select a UART peripheral for peripheral mode. The TX/RX direction is determined by Cdd_Dma_TransType.
Cdd_Dma_RingElemCount	Integer	1	1 to 10	Number of ring elements for descriptor queuing in FQ/CQ rings.
Cdd_Dma_TrIcnt0	Integer	128	128 to 32768	Number of bytes to transfer in each DMA operation (innermost TR loop count). Only applicable for Block Copy mode.
Cdd_Dma_TrIcnt1	Integer	1	1 to 512	Number of times to repeat the ICNT0 transfer (second loop count). Only applicable for Block Copy mode.
Cdd_Dma_TrIcnt2	Integer	1	1 to 512	Number of times to repeat the ICNT1 block of transfers (third loop count). Used for 2D transfers. Only applicable for Block Copy mode.
Cdd_Dma_TrIcnt3	Integer	1	1 to 512	Number of times to repeat the ICNT2 block of transfers (fourth loop count). Used for 3D transfers. Only applicable for Block Copy mode.

Cdd_Dma_General (General Configuration)

EB Parameter	Type	Default	Description
Cdd_Dma_DevErrorDetect	Boolean	true	Switches Development Error Detection and Notification ON or OFF.
Cdd_Dma_DeinitApi	Boolean	true	Switches the Cdd_Dma_DeInit() function ON or OFF.
Cdd_Dma_ChOpenApi	Boolean	true	Switches the Cdd_Dma_ChOpen() function ON or OFF.
Cdd_Dma_ChCloseApi	Boolean	true	Switches the Cdd_Dma_ChClose() function ON or OFF.
Cdd_Dma_ChEnableApi	Boolean	true	Switches the Cdd_Dma_ChEnable() function ON or OFF.
Cdd_Dma_ChDisableApi	Boolean	true	Switches the Cdd_Dma_ChDisable() function ON or OFF.
Cdd_Dma_StartTransferApi	Boolean	true	Switches the Cdd_Dma_StartTransfer() and Cdd_Dma_GetTransferStatus() functions ON or OFF.
Cdd_Dma_ChainingAPI	Boolean	false	Switches the Cdd_Dma_SetChaining() and Cdd_Dma_BreakChaining() functions ON or OFF.
CddVersionInfoApi	Boolean	true	Switches the Cdd_Dma_GetVersionInfo() function ON or OFF.
Cdd_Dma_PeriphValidateApi	Boolean	true	Switches the Cdd_Dma_ValidatePeriphConfig() function ON or OFF. This is to be kept on when validating peripheral side EB configuration with DMA side configuration to allocate proper DMA channel/ring/event objects.
Cdd_Dma_IrqType	Enum	CDD_DMA_ISR_CAT2	Specifies the category of Interrupt Request for ISR callbacks. Supported values: CDD_DMA_ISR_VOID, CDD_DMA_ISR_CAT1, CDD_DMA_ISR_CAT2.
Cdd_Dma_RegisterReadbackApi	Boolean	false	Switches the Cdd_Dma_RegisterReadback() function ON or OFF. When enabled, allows reading back TX/RX channel configuration registers from hardware.

Cdd_Dma_General -> Cdd_Dma_SciclientCallbacks

Sciclient callback function names are configured in this container. Refer (Sciclient Dependency) for detailed information on each callback.

Cdd_Dma_PublishedInformation

EB Parameter	Type	Default	Description
Cdd_Dma_DeviceVariant	Enum	AM275X / AM62PX/ AM62AX/ AM62DX/ AM62X	Device variant for which the driver is configured. Set automatically based on the configurator plugin used.

EB Configuration Value Combinations

Block Copy Mode

For Block Copy DMA channels, the following configuration values must be used:

• Cdd_Dma_TransType: CDD_DMA_BC_MODE
• Cdd_Dma_InstID: CDD_DMA_ID_0 (BCDMA instance)
• Cdd_Dma_Mode: CDD_DMA_MODE_POLLING or CDD_DMA_MODE_INTERRUPT
• Cdd_Dma_PeriphUsed: CDD_DMA_PERIPH_NOT_USED (no peripheral associated in block copy mode)
• Cdd_Dma_RingElemCnt: Number of ring elements. Values from 1 to 10 are supported and validated.

The TR descriptor parameters (trIcnt0, trIcnt1, trIcnt2, trIcnt3) define the transfer dimensions. The maximum transfer size per descriptor submission is 64KB. The product of icnt0 x icnt1 x icnt2 x icnt3 must not exceed 65536 bytes (64K).

Example valid TR descriptor configurations for 64KB transfer:

icnt0	icnt1	icnt2	icnt3	Total
128	1	1	512	64K
128	8	8	8	64K
128	4	4	32	64K
128	2	16	16	64K

Note: In block copy mode, the application must initialize and pass the following parameters via Cdd_Dma_ParamsType:

• ringMem — Pointer to ring memory (must be 128-byte cache line aligned)
• ringMemSize — Size of ring memory in bytes
• ringElemCnt — Number of elements in ring
• eventCb — Event callback function pointer (for interrupt mode)
• appData — Application data pointer passed to event callback
• bcChanMode - False for Block-copy DMA transfers (No peripherals involved)

Additionally, for Cdd_Dma_StartTransfer(), the application must pass:

• srcBuf — Source buffer pointer
• destBuf — Destination buffer pointer
• length — Transfer length in bytes
• trpdMem — Pointer to TRPD descriptor memory (128-byte cache line aligned, allocated by application)
• trpdMemSize — TRPD descriptor memory size in bytes
• trigger0Type / trigger1Type — Trigger types (for channel chaining)

Peripheral TX Mode

For Peripheral Transmit DMA channels, the following configuration values must be used:

• Cdd_Dma_TransType: CDD_DMA_PERIPH_TX_MODE
• Cdd_Dma_InstID: CDD_DMA_ID_1 (PKTDMA instance)
• Cdd_Dma_Mode: CDD_DMA_MODE_POLLING or CDD_DMA_MODE_INTERRUPT
• Cdd_Dma_PeriphUsed: Select the appropriate peripheral (e.g., CDD_DMA_PERIPH_UART0)
• Cdd_Dma_RingElemCnt: Number of ring elements. Value of 1 is supported and tested.
• TR Descriptor Parameters (trIcnt0-3): Set to 0. Peripheral mode uses Host Packet Descriptors (HPD) instead of TR descriptors, so these parameters are not applicable.

Peripheral RX Mode

For Peripheral Receive DMA channels, the following configuration values must be used:

• Cdd_Dma_TransType: CDD_DMA_PERIPH_RX_MODE
• Cdd_Dma_InstID: CDD_DMA_ID_1 (PKTDMA instance)
• Cdd_Dma_Mode: CDD_DMA_MODE_POLLING or CDD_DMA_MODE_INTERRUPT
• Cdd_Dma_PeriphUsed: Select the appropriate peripheral (e.g., CDD_DMA_PERIPH_UART0)
• Cdd_Dma_RingElemCnt: Number of ring elements. Value of 1 is supported and tested.
• TR Descriptor Parameters (trIcnt0-3): Set to 0. Peripheral mode uses Host Packet Descriptors (HPD) instead of TR descriptors, so these parameters are not applicable.

Note: In peripheral mode, the DMA driver and EB Tresos configuration handle most of the parameter setup internally. The application does not need to pass trpdMem or TR descriptor parameters — peripheral mode uses HPD (Host Packet Descriptor) instead of TRPD. The hpdMem is allocated and passed by the peripheral driver (e.g., CDD UART). The ringElemCnt is read from EB Tresos configuration. The peripheral driver passes the following parameters via Cdd_Dma_ParamsType:

• peerChNum — PSI-L peer thread number (calculated from peripheral's PSIL thread offset + channel ID)
• channelType — Peripheral transfer direction (CDD_DMA_PERIPH_TX_MODE or CDD_DMA_PERIPH_RX_MODE)
• hpdMem — Pointer to HPD descriptor memory (allocated by peripheral driver)
• ringMem — Pointer to ring memory (allocated by peripheral driver)
• ringMemSize — Size of ring memory in bytes
• eventCb — Event callback function pointer (for interrupt mode)
• appData — Application data pointer passed to event callback
• bcChanMode - TRUE for Block-copy DMA transfers (when peripherals involved eg:OSPI), False for PKTDMA(eg:UART).

Note: For a peripheral requiring both TX and RX operations, two separate Cdd_Dma_ChConfig entries must be configured — one with CDD_DMA_PERIPH_TX_MODE and one with CDD_DMA_PERIPH_RX_MODE — to allocate separate DMA channel, ring, and event objects for each direction.

Peripheral Configuration

When a peripheral (e.g., SPI, UART) needs to operate in DMA mode, configuration is required on both the peripheral side and the DMA side:

• Peripheral side: The peripheral driver must be configured to use DMA mode of operation in its EB Tresos configuration.
• DMA side: A corresponding Cdd_Dma_ChConfig entry must be created in the CDD DMA EB Tresos configuration with the transfer type (CDD_DMA_PERIPH_TX_MODE or CDD_DMA_PERIPH_RX_MODE), DMA instance ID (CDD_DMA_ID_1 for PKTDMA), operational mode, peripheral used (e.g., CDD_DMA_PERIPH_UART0), and ring element count.

Note: For peripherals that require both TX and RX DMA operations (e.g., full-duplex SPI), two separate Cdd_Dma_ChConfig entries are required — one for TX (CDD_DMA_PERIPH_TX_MODE) and one for RX (CDD_DMA_PERIPH_RX_MODE). Each entry allocates its own DMA channel, ring, and event objects independently.

Note: There is one more parameter named bcChanMode that needs to be TRUE when Peripherals operate on block-copy mode (eg:OSPI - set internally by driver). As OSPI is the only peripheral that operates on block-copy mode rather than UART that operates on PKTDMA mode. To differentiate Peripheral + (PKTDMA/BCDMA), this flag is introduced.

The Cdd_Dma_ValidatePeriphConfig() API should be used to validate that the peripheral-side and DMA-side configurations are consistent. This API is enabled when the Cdd_Dma_PeriphValidateApi parameter is set to true in EB Tresos configuration.

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Steps to Build Applications

There are four example apps for cdd dma. The MCAL example application could be built with the command

Note: Please replace the following BOARD/SOC as per your requirement from the list provided, The build command below is shown as an example for AM275x alone.

Device Used	BOARD Value	SOC Value
AM275X	am275x_evm	am275x
AM62PX	am62px_evm	am62px
AM62X	am62x_evm	am62x
AM62AX	am62ax_evm	am62ax
AM62DX	am62dx_evm	am62dx

AM275X

Cdd Dma Memcpy Polling App

$ cd (SDK Install Directory)/mcusw.xx.yy.zz.bb/build
$ gmake -s cdd_dma_memcpy_polling_app BOARD=am275x_evm SOC=am275x BUILD_PROFILE=release CORE=mcu0_0 BUILD_OS_TYPE=baremetal
$ OR
$ gmake -s cdd_dma_memcpy_polling_app BOARD=am275x_evm SOC=am275x BUILD_PROFILE=debug CORE=mcu0_0 BUILD_OS_TYPE=baremetal

• The generated executable is available at
  • (SDK Install Directory)/mcusw.xx.yy.zz.bb/binary/cdd_dma_memcpy_polling_app/bin/(SoC)_evm/cdd_dma_memcpy_polling_app_mcu0_0_(BUILD_PROFILE).xer5f
  • e.g. (SDK Install Directory)/mcusw.xx.yy.zz.bb/binary/cdd_dma_memcpy_polling_app/bin/am275x_evm/cdd_dma_memcpy_polling_app_mcu0_0_release.xer5f

Cdd Dma Memcpy Interrupt App

$ cd (SDK Install Directory)/mcusw.xx.yy.zz.bb/build
$ gmake -s cdd_dma_memcpy_interrupt_app BOARD=am275x_evm SOC=am275x BUILD_PROFILE=release CORE=mcu0_0 BUILD_OS_TYPE=baremetal
$ OR
$ gmake -s cdd_dma_memcpy_interrupt_app BOARD=am275x_evm SOC=am275x BUILD_PROFILE=debug CORE=mcu0_0 BUILD_OS_TYPE=baremetal

• The generated executable is available at
  • (SDK Install Directory)/mcusw.xx.yy.zz.bb/binary/cdd_dma_memcpy_interrupt_app/bin/(SoC)_evm/cdd_dma_memcpy_interrupt_app_mcu0_0_(BUILD_PROFILE).xer5f
  • e.g. (SDK Install Directory)/mcusw.xx.yy.zz.bb/binary/cdd_dma_memcpy_interrupt_app/bin/am275x_evm/cdd_dma_memcpy_interrupt_app_mcu0_0_release.xer5f

Cdd Dma Chaining App

$ cd (SDK Install Directory)/mcusw.xx.yy.zz.bb/build
$ gmake -s cdd_dma_chaining_app BOARD=am275x_evm SOC=am275x BUILD_PROFILE=release CORE=mcu0_0 BUILD_OS_TYPE=baremetal
$ OR
$ gmake -s cdd_dma_chaining_app BOARD=am275x_evm SOC=am275x BUILD_PROFILE=debug CORE=mcu0_0 BUILD_OS_TYPE=baremetal

• The generated executable is available at
  • (SDK Install Directory)/mcusw.xx.yy.zz.bb/binary/cdd_dma_chaining_app/bin/(SoC)_evm/cdd_dma_chaining_app_mcu0_0_(BUILD_PROFILE).xer5f
  • e.g. (SDK Install Directory)/mcusw.xx.yy.zz.bb/binary/cdd_dma_chaining_app/bin/am275x_evm/cdd_dma_chaining_app_mcu0_0_release.xer5f

Cdd Uart Dma Echo App

$ cd (SDK Install Directory)/mcusw.xx.yy.zz.bb/build
$ gmake -s cdd_uart_dma_echo_app BOARD=am275x_evm SOC=am275x BUILD_PROFILE=release CORE=mcu0_0 BUILD_OS_TYPE=baremetal
$ OR
$ gmake -s cdd_uart_dma_echo_app BOARD=am275x_evm SOC=am275x BUILD_PROFILE=debug CORE=mcu0_0 BUILD_OS_TYPE=baremetal

• The generated executable is available at
  • (SDK Install Directory)/mcusw.xx.yy.zz.bb/binary/cdd_uart_dma_echo_app/bin/(SoC)_evm/cdd_uart_dma_echo_app_mcu0_0_(BUILD_PROFILE).xer5f
  • e.g. (SDK Install Directory)/mcusw.xx.yy.zz.bb/binary/cdd_uart_dma_echo_app/bin/am275x_evm/cdd_uart_dma_echo_app_mcu0_0_release.xer5f

Fls Dma App

$ cd (SDK Install Directory)/mcusw.xx.yy.zz.bb/build
$ gmake -s fls_app_dma BOARD=am275x_evm SOC=am275x BUILD_PROFILE=release CORE=mcu0_0 BUILD_OS_TYPE=baremetal
$ OR
$ gmake -s fls_app_dma BOARD=am275x_evm SOC=am275x BUILD_PROFILE=debug CORE=mcu0_0 BUILD_OS_TYPE=baremetal

• The generated executable is available at
  • (SDK Install Directory)/mcusw.xx.yy.zz.bb/binary/fls_app_dma/bin/(SoC)_evm/fls_app_dma_mcu0_0_(BUILD_PROFILE).xer5f
  • e.g. (SDK Install Directory)/mcusw.xx.yy.zz.bb/binary/fls_app_dma/bin/am275x_evm/fls_app_dma_mcu0_0_release.xer5f

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Example Logs

Cdd Dma Memcpy Polling App Log

    CDD DMA Memcpy Test in Polling Mode
    DMA initialization successful.
    Channel open successful.
    Channel enable successful.
    DMA transfer started.
    Transfer complete. Verifying data...
    Data verification passed.

    All tests have passed!

Cdd Dma Memcpy Interrupt App Log

    CDD DMA Memcpy Test in Interrupt Mode
    DMA initialization successful.
    Channel open successful.
    Channel enable successful.
    DMA transfer started.
    Transfer complete callback received.
    Data verification passed.

    All tests have passed!

Cdd Dma Chaining App Log

    CDD DMA Chaining Test
    DMA initialization successful.
    Channel 0 and Channel 1 open successful.
    Channel chaining set successful.
    Transfers submitted.
    Chained transfer complete.
    Data verification passed.

    All tests have passed!

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