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Cdd_Uart.h
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1/* ======================================================================
2 * Copyright (C) 2024 Texas Instruments Incorporated
3 *
4 * All rights reserved. Property of Texas Instruments Incorporated.
5 * Restricted rights to use, duplicate or disclose this code are
6 * granted through contract.
7 *
8 * The program may not be used without the written permission
9 * of Texas Instruments Incorporated or against the terms and conditions
10 * stipulated in the agreement under which this program has been
11 * supplied.
12 * ==================================================================== */
13
32/* ------------------------------------------------------------------------------------------------------------------
33 * FILE DESCRIPTION
34 * ------------------------------------------------------------------------------------------------------------------
35 * File: Cdd_Uart.h
36 * Project: Complex Device Driver
37 * Module: CddUartDriver
38 *
39 * Description: This module implements a driver in ANSI C programming language to centralize the
40 * configuration of ports and pins which are used by more than one driver module.
41 * With this driver you can:
42 * - Configure the UART config registers
43 * - Initialize the UART configuration
44 * - Read and write data over the UART
45 **************************************************************************************************/
46
47#ifndef CDD_UART_H_
48#define CDD_UART_H_
49
50/* ========================================================================== */
51/* Include Files */
52/* ========================================================================== */
53
54#include "Std_Types.h"
55#include "lldr.h"
56#include "hw_types.h"
57#include "Std_Types.h"
58#include "Cdd_Uart_Cfg.h"
59#include <Uart.h>
60#include "Cdd_Uart_Priv.h"
61#include "SchM_Cdd_Uart.h"
62
63#ifdef __cplusplus
64extern "C"
65{
66#endif
67
68/* ========================================================================== */
69/* Forward Declarations */
70/* ========================================================================== */
71
72/* None */
73
74/* ========================================================================== */
75/* Macros & Typedefs */
76/* ========================================================================== */
77
79#define UART_FIFO_SIZE (64U)
80
86#define UART_TRANSMITEMPTY_TRIALCOUNT (5000U)
87
96#define UART_TX_FIFO_DRAIN_TRIALCOUNT (30000000U)
97
102/*
103 * Design: MCAL-22636
104 */
110#define CDD_UART_MODULE_ID 255U
112#define CDD_UART_VENDOR_ID 44U
114#define CDD_UART_INSTANCE_ID 0U
115/* @} */
116
124#define CDD_UART_SW_MAJOR_VERSION CDD_UART_MAJOR_VERSION
126#define CDD_UART_SW_MINOR_VERSION CDD_UART_MINOR_VERSION
128#define CDD_UART_SW_PATCH_VERSION CDD_UART_CFG_PATCH_VERSION
129/* @} */
137#define CDD_UART_AR_RELEASE_MAJOR_VERSION 4U
139#define CDD_UART_AR_RELEASE_MINOR_VERSION 3U
141#define CDD_UART_AR_RELEASE_REVISION_VERSION 1U
142/* @} */
143
148/*
149 * Design: MCAL-22583,MCAL-22584,MCAL-22585,MCAL-22586,MCAL-22587,MCAL-22588,MCAL-22589,MCAL-22636,MCAL-22671
150 */
152#define CDD_UART_INIT_SERVICE_ID 0x01U
154#define CDD_UART_GETVERSIONINFO_SERVICE_ID 0x02U
156#define CDD_UART_REGISTERREADBACK_SERVICE_ID 0x0DU
158#define CDD_UART_READDATA_SERVICE_ID 0x03U
160#define CDD_UART_WRITEDATA_SERVICE_ID 0x04U
162#define CDD_UART_ERROR_SERVICE_ID 0x05U
164#define CDD_UART_CANCEL_SERVICE_ID 0x06U
166#define CDD_UART_GETREMAININGWORDS_SERVICE_ID 0x07U
168#define CDD_UART_READNOTIF_SERVICE_ID 0x08U
170#define CDD_UART_WRITENOTIF_SERVICE_ID 0x09U
172#define CDD_UART_ERRORNOTIF_SERVICE_ID 0x0AU
174#define CDD_UART_DEINIT_SERVICE_ID 0x0BU
176#define CDD_UART_INTERNAL_ISR_ID 0x0CU
177/* @} */
178
183/*
184 * Design: MCAL-22572
185 */
187#define CDD_UART_E_UNINIT 0x01U
188
190#define CDD_UART_E_INVALID_EVENT 0x02U
191
193#define CDD_UART_E_READ_LOCKED 0x03U
194
196#define CDD_UART_E_WRITE_LOCKED 0x04U
197
199#define CDD_UART_E_PARAM_POINTER 0x05U
200
202#define CDD_UART_E_ALREADY_INITIALIZED 0x06U
203
205#define CDD_UART_E_PARAM_VALUE 0x07U
206
208#define CDD_UART_E_PARAM_LENGTH 0x08U
209
211#define CDD_UART_E_INVALID_CHANNEL 0x09U
212
214#define CDD_UART_E_INVALID_CONFIG 0x0AU
215
217#define CDD_UART_E_DMA_NOT_INIT 0x0BU
218
220#define CDD_UART_E_DMA_TIMEOUT 0x0CU
221
223#define CDD_UART_E_DMA_ALIGNMENT 0x0DU
224/* @} */
234#define UART_TX_FIFO_NOT_FULL ( \
235 UART_SSR_TX_FIFO_FULL_TX_FIFO_FULL_VALUE_0)
236#define UART_TX_FIFO_FULL ( \
237 UART_SSR_TX_FIFO_FULL_TX_FIFO_FULL_VALUE_1)
248#define UART_INTID_MODEM_STAT (UART_IIR_IT_TYPE_IT_TYPE_VALUE_0 \
249 << \
250 UART_IIR_IT_TYPE_SHIFT)
251#define UART_INTID_TX_THRES_REACH (UART_IIR_IT_TYPE_IT_TYPE_VALUE_1 \
252 << \
253 UART_IIR_IT_TYPE_SHIFT)
254#define UART_INTID_RX_THRES_REACH (UART_IIR_IT_TYPE_IT_TYPE_VALUE_2 \
255 << \
256 UART_IIR_IT_TYPE_SHIFT)
257#define UART_INTID_RX_LINE_STAT_ERROR (UART_IIR_IT_TYPE_IT_TYPE_VALUE_3 \
258 << \
259 UART_IIR_IT_TYPE_SHIFT)
260#define UART_INTID_CHAR_TIMEOUT (UART_IIR_IT_TYPE_IT_TYPE_VALUE_6 \
261 << \
262 UART_IIR_IT_TYPE_SHIFT)
263#define UART_INTID_XOFF_SPEC_CHAR_DETECT (UART_IIR_IT_TYPE_IT_TYPE_VALUE_8 \
264 << \
265 UART_IIR_IT_TYPE_SHIFT)
266#define UART_INTID_MODEM_SIG_STATE_CHANGE (UART_IIR_IT_TYPE_IT_TYPE_VALUE_10 \
267 << \
268 UART_IIR_IT_TYPE_SHIFT)
269
271#define UART_INTR_PENDING (0U)
272#define UART_NO_INTR_PENDING (1U)
282#define UART_INTR_CTS (UART_IER_CTS_IT_MASK)
283#define UART_INTR_RTS (UART_IER_RTS_IT_MASK)
284#define UART_INTR_XOFF (UART_IER_XOFF_IT_MASK)
285#define UART_INTR_SLEEPMODE (UART_IER_SLEEP_MODE_MASK)
286#define UART_INTR_MODEM_STAT (UART_IER_MODEM_STS_IT_MASK)
287#define UART_INTR_LINE_STAT (UART_IER_LINE_STS_IT_MASK)
288#define UART_INTR_THR (UART_IER_THR_IT_MASK)
289#define UART_INTR_RHR_CTI (UART_IER_RHR_IT_MASK)
290
291#define UART_INTR2_RX_EMPTY (UART_IER2_EN_RXFIFO_EMPTY_MASK)
292#define UART_INTR2_TX_EMPTY (UART_IER2_EN_TXFIFO_EMPTY_MASK)
302#define UART_FIFO_PE_FE_BI_DETECTED (UART_LSR_RX_FIFO_STS_MASK)
303#define UART_BREAK_DETECTED_ERROR (UART_LSR_RX_BI_MASK)
304#define UART_FRAMING_ERROR (UART_LSR_RX_FE_MASK)
305#define UART_PARITY_ERROR (UART_LSR_RX_PE_MASK)
306#define UART_OVERRUN_ERROR (UART_LSR_RX_OE_MASK)
309#define UART_STATE_RX_DISABLED (0x0U)
310#define UART_STATE_RX_ENABLED (0x1U)
311
313#define IS_DATA_LENGTH_VALID(dataLength) ((dataLength == CDD_UART_WORD_LENGTH_5) || \
314 (dataLength == CDD_UART_WORD_LENGTH_6) || \
315 (dataLength == CDD_UART_WORD_LENGTH_7) || \
316 (dataLength == CDD_UART_WORD_LENGTH_8))
317
319#define IS_STOP_BITS_VALID(stopBits) ((stopBits == CDD_UART_STOP_BIT_1) || \
320 (stopBits == CDD_UART_STOP_BITS_2))
321
323#define IS_PARITY_TYPE_VALID(parityType) ((parityType == CDD_UART_PARITY_NONE) || \
324 (parityType == CDD_UART_PARITY_ODD) || \
325 (parityType == CDD_UART_PARITY_EVEN))
326
328#define IS_OPER_MODE_VALID(operMode) ((operMode == CDD_UART_16x_OPER) || \
329 (operMode == CDD_UART_16x_AUTO_OPER) || \
330 (operMode == CDD_UART_13x_OPER))
331
333#define IS_RXTRIG_LVL_VALID(rxTrigLvl) ((rxTrigLvl == CDD_UART_TRIGGER_LEVEL_1) || \
334 (rxTrigLvl == CDD_UART_TRIGGER_LEVEL_8) || \
335 (rxTrigLvl == CDD_UART_TRIGGER_LEVEL_16) || \
336 (rxTrigLvl == CDD_UART_TRIGGER_LEVEL_56) || \
337 (rxTrigLvl == CDD_UART_TRIGGER_LEVEL_60))
338
340#define IS_TXTRIG_LVL_VALID(txTrigLvl) ((txTrigLvl == CDD_UART_TRIGGER_LEVEL_1) || \
341 (txTrigLvl == CDD_UART_TRIGGER_LEVEL_8) || \
342 (txTrigLvl == CDD_UART_TRIGGER_LEVEL_16) || \
343 (txTrigLvl == CDD_UART_TRIGGER_LEVEL_32) || \
344 (txTrigLvl == CDD_UART_TRIGGER_LEVEL_56))
345
349#define MCAL_STATE_RESET (0U)
350#define MCAL_STATE_READY (1U)
351#define MCAL_STATE_BUSY (2U)
352#define MCAL_STATE_ERROR (3U)
353/* @} */
355typedef uint8 CddUartDataBufferType;
356
358typedef uint8_least CddUartDataDirectionType;
359
360/* ================================================================ */
361/* Structures and Enums */
362/* ================================================================ */
363
366/* ========================================================================== */
367/* Function Declarations */
368/* ========================================================================== */
369
370/*
371 * Design: MCAL-22636
372 */
389#if (STD_ON == CDD_UART_VERSION_INFO_API)
390FUNC(void, CDD_UART_APPL_DATA) Cdd_Uart_GetVersionInfo(
391 P2VAR(Std_VersionInfoType, AUTOMATIC, CDD_UART_APPL_DATA) VersionInfoPtr);
392#endif
393
394/*
395 * Design: MCAL-22671
396 */
413#if (STD_ON == CDD_UART_REGISTER_READBACK_API)
414FUNC(Std_ReturnType, CDD_UART_CODE) Cdd_Uart_RegisterReadback(uint8 ChannelID, P2VAR(CddUart_RegisterReadbackType, AUTOMATIC, CDD_UART_CFG) RegisterSetPtr);
415#endif
416
417/*
418 * Design: MCAL-22584
419 */
436FUNC(void, CDD_UART_CODE) Cdd_Uart_Init(P2CONST(Cdd_Uart_CfgType, AUTOMATIC, CDD_UART_CFG) ConfigurationPtr);
437
438/*
439 * Design: MCAL-22585
440 */
457#if (STD_ON == CDD_UART_DEINIT_API)
458FUNC(void, CDD_UART_CODE) Cdd_Uart_DeInit(void);
459#endif
460
461/*
462 * Design: MCAL-22587
463 */
487#if (STD_ON == CDD_UART_WRITE_API)
488FUNC(Std_ReturnType, CDD_UART_CODE) Cdd_Uart_Write(uint8 ChannelID,
489 P2VAR(CddUartDataBufferType, AUTOMATIC, CDD_UART_APPL_DATA) SrcBufferPtr, uint32 Count, uint32 Timeout);
490#endif
491
492/*
493 * Design: MCAL-22586
494 */
517#if (STD_ON == CDD_UART_READ_API)
518FUNC(Std_ReturnType, CDD_UART_CODE) Cdd_Uart_Read(uint8 ChannelID,
519 P2VAR(CddUartDataBufferType, AUTOMATIC, CDD_UART_APPL_DATA) DestBufferPtr, uint32 Count, uint32 Timeout);
520#endif
521
522/*
523 * Design: MCAL-22589
524 */
544#if (STD_ON == CDD_UART_CANCEL_API)
545FUNC(boolean, CDD_UART_CODE) Cdd_Uart_Cancel(uint8 ChannelID, CddUartDataDirectionType TransferType);
546#endif
547
548/*
549 * Design: MCAL-22588
550 */
570#if (STD_ON == CDD_UART_GETREMAININGWORDS_API)
571FUNC(uint32, CDD_UART_CODE) Cdd_Uart_GetRemainingWords(uint8 ChannelID, CddUartDataDirectionType TransferType);
572#endif
573
582#if (STD_ON == CDD_UART_WRITE_API)
583FUNC(boolean, CDD_UART_CODE) Cdd_Uart_IsTxComplete(uint8 ChannelID);
584#endif
585
586#ifdef __cplusplus
587}
588#endif
589
590#endif /* #ifndef CDD_UART_H_ */
591
592
593/* @} */
Cdd_Uart_Cfg.h
This file contains generated configuration file for UART Complex Device Driver.
Cdd_Uart_Cancel
boolean Cdd_Uart_Cancel(uint8 ChannelID, CddUartDataDirectionType TransferType)
Service to cancel an ongoing transaction with UART.
Cdd_Uart_Init
void Cdd_Uart_Init(const Cdd_Uart_CfgType *ConfigurationPtr)
Service for CDD UART Initialization.
CddUartDataBufferType
uint8 CddUartDataBufferType
Typedef for the data buffer elements.
Definition Cdd_Uart.h:355
Cdd_Uart_Read
Std_ReturnType Cdd_Uart_Read(uint8 ChannelID, CddUartDataBufferType *DestBufferPtr, uint32 Count, uint32 Timeout)
Service to read message or command from the UART.
CddUartDataDirectionType
uint8_least CddUartDataDirectionType
Type for defining the direction of data transfer, i.e., sending or receival.
Definition Cdd_Uart.h:358
Cdd_Uart_IsTxComplete
boolean Cdd_Uart_IsTxComplete(uint8 ChannelID)
Check if UART TX FIFO and Shift Register are both empty.
Cdd_Uart_GetRemainingWords
uint32 Cdd_Uart_GetRemainingWords(uint8 ChannelID, CddUartDataDirectionType TransferType)
Service to get remaining words to be transmitted from the UART for any ongoing transaction.
Cdd_Uart_GetVersionInfo
void Cdd_Uart_GetVersionInfo(Std_VersionInfoType *VersionInfoPtr)
Service for getting CDD UART version.
Cdd_Uart_RegisterReadback
Std_ReturnType Cdd_Uart_RegisterReadback(uint8 ChannelID, CddUart_RegisterReadbackType *RegisterSetPtr)
Service for reading HW IP registers of a CDD UART instance.
Cdd_Uart_DeInit
void Cdd_Uart_DeInit(void)
Service for deinitializing CDD UART.
Cdd_Uart_Write
Std_ReturnType Cdd_Uart_Write(uint8 ChannelID, CddUartDataBufferType *SrcBufferPtr, uint32 Count, uint32 Timeout)
Service to transmit message using UART.
Cdd_Uart_CfgType
Definition Cdd_Uart_Cfg.h:336