118#define GPT_CH_GPTIMER1 (0U)
120#define GPT_CH_GPTIMER2 (1U)
122#define GPT_CH_GPTIMER3 (2U)
124#define GPT_CH_GPTIMER4 (3U)
126#define GPT_CH_GPTIMER5 (4U)
128#define GPT_CH_GPTIMER6 (5U)
130#define GPT_CH_GPTIMER7 (6U)
132#define GPT_CH_GPTIMER8 (7U)
134#define GPT_CH_GPTIMER9 (8U)
136#define GPT_CH_GPTIMER10 (9U)
138#define GPT_CH_GPTIMER11 (10U)
140#define GPT_CH_GPTIMER12 (11U)
142#define GPT_CH_GPTIMER13 (12U)
144#define GPT_CH_GPTIMER14 (13U)
146#define GPT_CH_GPTIMER15 (14U)
148#define GPT_CH_GPTIMER16 (15U)
150#define GPT_CH_GPTIMER17 (16U)
152#define GPT_CH_GPTIMER18 (17U)
154#define GPT_CH_GPTIMER19 (18U)
156#define GPT_CH_GPTIMER20 (19U)
158#define GPT_CH_GPTIMER21 (20U)
160#define GPT_CH_GPTIMER22 (21U)
162#define GPT_CH_GPTIMER23 (22U)
164#define GPT_CH_GPTIMER24 (23U)
166#define GPT_CH_GPTIMER25 (24U)
168#define GPT_CH_GPTIMER26 (25U)
170#define GPT_CH_GPTIMER27 (26U)
172#define GPT_CH_GPTIMER28 (27U)
174#define GPT_CH_GPTIMER29 (28U)
176#define GPT_CH_GPTIMER30 (29U)
179#define GPT_CH_GPTIMER_MAX (30U)
188#define GPT_PRE_COMPILE_VARIANT (STD_OFF)
197#define GPT_ISR_VOID (0x00U)
199#define GPT_ISR_CAT1 (0x01U)
201#define GPT_ISR_CAT2 (0x02U)
208#define GPT_DEV_ERROR_DETECT (STD_ON)
210#define GPT_ISR_TYPE (GPT_ISR_CAT1)
213#define GPT_REPORT_WAKEUP_SOURCE (STD_ON)
219#define GPT_VERSION_INFO_API (STD_ON)
224#define GPT_DEINIT_API (STD_ON)
229 #define GPT_TIME_ELAPSED_API (STD_ON)
234#define GPT_TIME_REMAINING_API (STD_ON)
239#define GPT_ENABLE_DISABLE_NOTIFICATION_API (STD_ON)
244#define GPT_WAKEUP_FUNCTIONALITY_API (STD_ON)
251#define GPT_MAX_CHANNELS (5U)
257#define GPT_PREDEF_TIMER_TYPE (GPT_PREDEF_TIMER_DISABLED)
261#define GPT_PREDEF_TIMER_1US_ENABLING_GRADE (GPT_PREDEF_TIMER_1US_DISABLED)
265#define GPT_OS_COUNTER_ID ((CounterType)OsCounter_0)
272#define GPT_TIMEOUT_DURATION (32000U)
281#ifndef GPT_E_HARDWARE_ERROR
283#define GPT_E_HARDWARE_ERROR \
285 DemConf_DemEventParameter_GPT_E_HARDWARE_ERROR \
294#define GPT_REGISTER_READBACK_API (STD_ON)
300#define GptConf_GptChannelConfiguration_TIMER1 (11U)
302#define GptConf_GptChannelConfiguration_MCU_TIMER6 (6U)
304#define GptConf_GptChannelConfiguration_MCU_TIMER9 (9U)
306#define GptConf_GptChannelConfiguration_TIMER5 (15U)
308#define GptConf_GptChannelConfiguration_TIMER19 (29U)
void Gpt_Ch12Isr(void)
GPT Channel ISR.
#define GPT_CH_GPTIMER_MAX
maximum GP timer channels available
Definition Gpt_Cfg.h:179
const struct Gpt_ConfigType_s GptChannelConfigSet
GPT Configuration.
const uint32 Gpt_TimerBaseAddr[GPT_CH_GPTIMER_MAX]
Base Address of the timer peripherals.