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Eth_Irq.h
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1/*
2*
3* Copyright (c) 2024 Texas Instruments Incorporated
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62
75#ifndef ETH_IRQ_H_
76#define ETH_IRQ_H_
77
78/* ========================================================================== */
79/* Include Files */
80/* ========================================================================== */
81/* None */
82
83#ifdef __cplusplus
84extern "C" {
85#endif
86
87/* ========================================================================== */
88/* Macros & Typedefs */
89/* ========================================================================== */
90
98#define ETH_ISR_VOID (0x00U)
100#define ETH_ISR_CAT1 (0x01U)
102#define ETH_ISR_CAT2 (0x02U)
105/* ========================================================================== */
106/* Structures and Enums */
107/* ========================================================================== */
108
109/* None */
110
111/* ========================================================================== */
112/* Function Declarations */
113/* ========================================================================== */
114
115#define ETH_START_SEC_ISR_CODE
116#include "Eth_MemMap.h"
117
137#if (ETH_ISR_TYPE == ETH_ISR_CAT1 || ETH_ISR_TYPE == ETH_ISR_VOID)
138FUNC(void, ETH_CODE_FAST) Eth_RxIrqHdlr_0(void);
139#elif (ETH_ISR_TYPE == ETH_ISR_CAT2)
141#endif
142
162#if (ETH_ISR_TYPE == ETH_ISR_CAT1 || ETH_ISR_TYPE == ETH_ISR_VOID)
163FUNC(void, ETH_CODE_FAST) Eth_TxIrqHdlr_0(void);
164#elif (ETH_ISR_TYPE == ETH_ISR_CAT2)
166#endif
167
187#if (ETH_ISR_TYPE == ETH_ISR_CAT1 || ETH_ISR_TYPE == ETH_ISR_VOID)
188FUNC(void, ETH_CODE_FAST) Eth_RxIrqPacingHdlr_0(void);
189#else
191#endif
192
212#if (ETH_ISR_TYPE == ETH_ISR_CAT1 || ETH_ISR_TYPE == ETH_ISR_VOID)
213FUNC(void, ETH_CODE_FAST) Eth_TxIrqPacingHdlr_0(void);
214#else
216#endif
217
218#if (ETH_CTRL_ID_MAX > 0)
238#if (ETH_ISR_TYPE == ETH_ISR_CAT1 || ETH_ISR_TYPE == ETH_ISR_VOID)
239FUNC(void, ETH_CODE_FAST) Eth_RxIrqHdlr_1(void);
240#else
242#endif
243
264#if (ETH_ISR_TYPE == ETH_ISR_CAT1 || ETH_ISR_TYPE == ETH_ISR_VOID)
265FUNC(void, ETH_CODE_FAST) Eth_TxIrqHdlr_1(void);
266#else
268#endif
269
289#if (ETH_ISR_TYPE == ETH_ISR_CAT1 || ETH_ISR_TYPE == ETH_ISR_VOID)
290FUNC(void, ETH_CODE_FAST) Eth_RxIrqPacingHdlr_1(void);
291#else
293#endif
294
314#if (ETH_ISR_TYPE == ETH_ISR_CAT1 || ETH_ISR_TYPE == ETH_ISR_VOID)
315FUNC(void, ETH_CODE_FAST) Eth_TxIrqPacingHdlr_1(void);
316#else
318#endif
319#endif /* (ETH_CTRL_ID_MAX > 0) */
320
339#if (STD_ON == ETH_ENABLE_MII_API)
340#if (ETH_ISR_TYPE == ETH_ISR_CAT1 || ETH_ISR_TYPE == ETH_ISR_VOID)
341FUNC(void, ETH_CODE_FAST) Eth_MdioIrqHdlr(void);
342#elif (ETH_ISR_TYPE == ETH_ISR_CAT2)
344#endif
345#endif
346
347#define ETH_STOP_SEC_ISR_CODE
348#include "Eth_MemMap.h"
349
350#ifdef __cplusplus
351}
352#endif
353
354#endif /* ETH_IRQ_H_ */
355
ISR(Adc_IrqUnit0)
void Eth_TxIrqPacingHdlr_1(void)
ISR for RX pacing interrupts of the indexed controller 1.
void Eth_RxIrqHdlr_1(void)
ISR for frame reception interrupts of the indexed controller 1.
void Eth_TxIrqHdlr_1(void)
ISR for frame transmission interrupts of the indexed controller 1.
void Eth_RxIrqPacingHdlr_1(void)
ISR for RX pacing interrupts of the indexed controller 1.
void Eth_MdioIrqHdlr(void)
ISR for MDIO interrupts of all controllers.
void Eth_RxIrqPacingHdlr_0(void)
ISR for RX pacing interrupts of the indexed controller 0.
void Eth_TxIrqPacingHdlr_0(void)
ISR for TX pacing interrupts of the indexed controller 0.
void Eth_TxIrqHdlr_0(void)
ISR for frame transmission interrupts of the indexed controller 0.
void Eth_RxIrqHdlr_0(void)
ISR for frame reception interrupts of the indexed controller 0.