MCUSW
Spi.h
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62 
116 /*
117  * Below are the global design requirements which are met by this SPI handler
118  * driver which can't be mapped to a particular source ID
119  */
120 /*
121  * Design: MCAL-6422,MCAL-6412,MCAL-6690,MCAL-6487,MCAL-6429,MCAL-6683,MCAL-6384,MCAL-6478,MCAL-6383,MCAL-6593,MCAL-6573,MCAL-6381,MCAL-6492,MCAL-6610,MCAL-6658,MCAL-6451,MCAL-6449,MCAL-6448,MCAL-6581,MCAL-6710,MCAL-6527,MCAL-6642,MCAL-6458,MCAL-6544
122  */
123 
124 /*
125  * Below are the SPI's module environment design requirements which can't be mapped
126  * to this driver.
127  */
128 /*
129  * Design: MCAL-6719,MCAL-6486,MCAL-6415,MCAL-6685,MCAL-6421,MCAL-6390,MCAL-6608,MCAL-6670,MCAL-6643
130  */
131 
132 #ifndef SPI_H_
133 #define SPI_H_
134 
135 /* ========================================================================== */
136 /* Include Files */
137 /* ========================================================================== */
138 #include "Std_Types.h"
139 #include "Spi_Cfg.h"
140 #if defined (SOC_J721E) || defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
141 #include <ti/drv/udma/udma.h>
142 #endif
143 #include "Spi/mcspi_hw/V0/mcspi.h"
144 
145 #ifdef __cplusplus
146 extern "C"
147 {
148 #endif
149 
150 /* ========================================================================== */
151 /* Macros & Typedefs */
152 /* ========================================================================== */
153 
161 #define SPI_SW_MAJOR_VERSION (9U)
162 
163 #define SPI_SW_MINOR_VERSION (0U)
164 
165 #define SPI_SW_PATCH_VERSION (1U)
166 /* @} */
167 
175 #define SPI_AR_RELEASE_MAJOR_VERSION (4U)
176 
177 #define SPI_AR_RELEASE_MINOR_VERSION (3U)
178 
179 #define SPI_AR_RELEASE_REVISION_VERSION (1U)
180 /* @} */
181 
187 #define SPI_VENDOR_ID ((uint16) 44U)
188 
189 #define SPI_MODULE_ID ((uint16) 83U)
190 
191 #define SPI_INSTANCE_ID ((uint8) 0U)
192 /* @} */
193 
199 #define SPI_IB (0U)
200 
201 #define SPI_EB (1U)
202 
203 #define SPI_IB_EB (2U)
204 /* @} */
205 
206 
208 /*
209  * Design: MCAL-6691,MCAL-6394,MCAL-6615
210  */
211 typedef uint8 Spi_DataBufferType;
216 /*
217  * Design: MCAL-6625,MCAL-6669
218  */
219 typedef uint16 Spi_NumberOfDataType;
221 /*
222  * Design: MCAL-6528,MCAL-6493,MCAL-6687
223  */
224 typedef uint8 Spi_ChannelType;
226 /*
227  * Design: MCAL-6457,MCAL-6689,MCAL-6728
228  */
229 typedef uint16 Spi_JobType;
231 /*
232  * Design: MCAL-6639,MCAL-6505,MCAL-6729
233  */
234 typedef uint8 Spi_SequenceType;
239 /*
240  * Design: MCAL-6655,MCAL-6682,MCAL-6707
241  */
242 typedef uint8 Spi_HWUnitType;
243 
250 #ifndef SPI_E_PARAM_CHANNEL
251 
252 #define SPI_E_PARAM_CHANNEL ((uint8) 0x0AU)
253 #endif
254 #ifndef SPI_E_PARAM_JOB
255 
256 #define SPI_E_PARAM_JOB ((uint8) 0x0BU)
257 #endif
258 #ifndef SPI_E_PARAM_SEQ
259 
260 #define SPI_E_PARAM_SEQ ((uint8) 0x0CU)
261 #endif
262 #ifndef SPI_E_PARAM_LENGTH
263 
264 #define SPI_E_PARAM_LENGTH ((uint8) 0x0DU)
265 #endif
266 #ifndef SPI_E_PARAM_UNIT
267 
268 #define SPI_E_PARAM_UNIT ((uint8) 0x0EU)
269 #endif
270 #ifndef SPI_E_PARAM_POINTER
271 
272 #define SPI_E_PARAM_POINTER ((uint8) 0x10U)
273 #endif
274 #ifndef SPI_E_UNINIT
275 
276 #define SPI_E_UNINIT ((uint8) 0x1AU)
277 #endif
278 #ifndef SPI_E_SEQ_PENDING
279 
280 #define SPI_E_SEQ_PENDING ((uint8) 0x2AU)
281 #endif
282 #ifndef SPI_E_SEQ_IN_PROCESS
283 
284 #define SPI_E_SEQ_IN_PROCESS ((uint8) 0x3AU)
285 #endif
286 #ifndef SPI_E_ALREADY_INITIALIZED
287 
291 #define SPI_E_ALREADY_INITIALIZED ((uint8) 0x4AU)
292 #endif
293 #ifndef SPI_E_SEQUENCE_NOT_OK
294 
295 #define SPI_E_SEQUENCE_NOT_OK ((uint8) 0x5AU)
296 #endif
297 
298 /* @} */
299 
308 #define SPI_SID_INIT ((uint8) 0x00U)
309 
310 #define SPI_SID_DEINIT ((uint8) 0x01U)
311 
312 #define SPI_SID_WRITE_IB ((uint8) 0x02U)
313 
314 #define SPI_SID_ASYNC_TRANSMIT ((uint8) 0x03U)
315 
316 #define SPI_SID_READ_IB ((uint8) 0x04U)
317 
318 #define SPI_SID_SETUP_EB ((uint8) 0x05U)
319 
320 #define SPI_SID_GET_STATUS ((uint8) 0x06U)
321 
322 #define SPI_SID_GET_JOB_RESULT ((uint8) 0x07U)
323 
324 #define SPI_SID_GET_SEQ_RESULT ((uint8) 0x08U)
325 
326 #define SPI_SID_GET_VERSION_INFO ((uint8) 0x09U)
327 
328 #define SPI_SID_SYNC_TRANSMIT ((uint8) 0x0AU)
329 
330 #define SPI_SID_GET_HW_UNIT_STATUS ((uint8) 0x0BU)
331 
332 #define SPI_SID_CANCEL ((uint8) 0x0CU)
333 
334 #define SPI_SID_SET_ASYNC_MODE ((uint8) 0x0DU)
335 
336 #define SPI_SID_MAINFUNCTION_HANDLING ((uint8) 0x10U)
337 /* @} */
338 
345 /*
346  * Design: MCAL-6699
347  */
348 #define SPI_MCSPI_FCLK (48000000U)
349 
358 #define SPI_CFG_ID_0 (0x01U)
359 
361 #define SPI_CFG_ID_1 (0x02U)
362 
363 #define SPI_CFG_ID_2 (0x04U)
364 
365 #define SPI_CFG_ID_3 (0x08U)
366 
367 #define SPI_CFG_ID_4 (0x10U)
368 
369 #define SPI_CFG_ID_5 (0x20U)
370 
371 #define SPI_CFG_ID_6 (0x40U)
372 
373 #define SPI_CFG_ID_7 (0x80U)
374 /* @} */
375 
376 /* ========================================================================== */
377 /* Structures and Enums */
378 /* ========================================================================== */
379 
388 /*
389  * Design: MCAL-6531,MCAL-6648,MCAL-6537,MCAL-6574
390  */
391 typedef enum
392 {
395  SPI_IDLE = 1U,
397  SPI_BUSY = 2U
400 
405 /*
406  * Design: MCAL-6703,MCAL-6425,MCAL-6430
407  */
408 typedef enum
409 {
421 
426 /*
427  * Design: MCAL-6512,MCAL-6607,MCAL-6686
428  */
429 typedef enum
430 {
441 
446 typedef enum
447 {
455 
460 /*
461  * Design: MCAL-6502,MCAL-6659,MCAL-6420,MCAL-6475,MCAL-6419,MCAL-6517,MCAL-6641
462  */
463 typedef enum
464 {
473 
477 typedef enum
478 {
479  SPI_MSB = 0U,
481  SPI_LSB = 1U
484 
488 typedef enum
489 {
490  SPI_LOW = STD_LOW,
494 } Spi_LevelType;
495 
499 typedef enum
500 {
501  SPI_CS0 = 0U,
509 } Spi_CsPinType;
510 
515 typedef enum
516 {
517  SPI_CLK_MODE_0 = 0x00U,
519  SPI_CLK_MODE_1 = 0x01U,
521  SPI_CLK_MODE_2 = 0x02U,
523  SPI_CLK_MODE_3 = 0x03U,
525 } Spi_ClkMode;
526 
539 typedef enum
540 {
545 } Spi_TxRxMode;
546 
550 /*
551  * Design: MCAL-6597
552  */
553 typedef enum
554 {
564 
568 typedef enum
569 {
575 
580 typedef enum
581 {
591 
595 typedef enum
596 {
602 
606 typedef enum
607 {
617 
621 typedef enum
622 {
630 
638 typedef void (*Spi_CacheWbInv)(uint8 *BufPtr,
639  uint16 LenByte);
640 
648 typedef void (*Spi_CacheWb)(uint8 *BufPtr,
649  uint16 LenByte);
650 
658 typedef void (*Spi_CacheInv)(uint8 *BufPtr,
659  uint16 LenByte);
660 
664 /*
665  * Design: MCAL-6529,MCAL-6519,MCAL-6649,MCAL-6716,MCAL-6619
666  */
667 typedef struct
668 {
671  uint8 dataWidth;
690 
694 typedef struct
695 {
696  uint16 csEnable;
711  uint32 clkDivider;
731 
735 typedef struct
736 {
741 
745 /*
746  * Design: MCAL-6692,MCAL-6437,MCAL-6684,MCAL-6522,MCAL-6572,MCAL-6406,MCAL-6632,MCAL-6476
747  */
748 typedef struct
749 {
754  Spi_JobEndNotifyType Spi_JobEndNotification;
762 
766 /*
767  * Design: MCAL-6496,MCAL-6536,MCAL-6742,MCAL-6413
768  */
769 typedef struct
770 {
773  Spi_SeqEndNotifyType Spi_SequenceEndNotification;
775  uint32 jobPerSeq;
781 
785 typedef struct
786 {
789  boolean enabledmaMode;
796 
800 /*
801  * Design: MCAL-6570,MCAL-6423,MCAL-6588,MCAL-6485,MCAL-6733
802  */
803 typedef struct Spi_ConfigType_s
804 {
805  uint8 maxChannels;
808  uint8 maxJobs;
811  uint8 maxSeq;
814  uint8 maxHwUnit;
820  uint32 udmaInstId;
843 
847 typedef struct Spi_ChannelConfigType_PC_s
848 {
852 
853 /*
854  * Design: MCAL-6717,MCAL-6650
855  */
859 typedef struct Spi_JobConfigType_PC_s
860 {
869 
873 typedef struct Spi_SeqConfigType_PC_s
874 {
878 
879 #if (STD_ON == SPI_REGISTER_READBACK_API)
880 
884 typedef struct
885 {
886  /*
887  * McSPI related registers
888  */
889  uint32 mcspiHlRev;
895  uint32 mcspiRev;
899  uint32 mcspiSyst;
913 #endif /* #if (STD_ON == SPI_REGISTER_READBACK_API) */
914 /* @} */
915 /* @} */
916 /* ========================================================================== */
917 /* Function Declarations */
918 /* ========================================================================== */
919 
937 FUNC(void, SPI_CODE) Spi_Init(
938  P2CONST(Spi_ConfigType, AUTOMATIC, SPI_CONFIG_DATA) CfgPtr);
939 
960 FUNC(Std_ReturnType, SPI_CODE) Spi_DeInit(void);
961 
979 FUNC(Spi_StatusType, SPI_CODE) Spi_GetStatus(void);
980 
1000 FUNC(Spi_JobResultType, SPI_CODE) Spi_GetJobResult(Spi_JobType Job);
1001 
1024  Spi_SequenceType Sequence);
1025 
1026 #if (STD_ON == SPI_VERSION_INFO_API)
1027 
1047 FUNC(void, SPI_CODE) Spi_GetVersionInfo(
1048  P2VAR(Std_VersionInfoType, AUTOMATIC, SPI_APPL_DATA) versioninfo);
1049 #endif /* #if (STD_ON == SPI_VERSION_INFO_API) */
1050 
1051 #if (STD_ON == SPI_HW_STATUS_API)
1052 
1073 FUNC(Spi_StatusType, SPI_CODE) Spi_GetHWUnitStatus(Spi_HWUnitType HWUnit);
1074 #endif /* #if (STD_ON == SPI_HW_STATUS_API) */
1075 
1076 #if ((SPI_CHANNELBUFFERS == SPI_IB) || (SPI_CHANNELBUFFERS == SPI_IB_EB))
1077 
1105 FUNC(Std_ReturnType, SPI_CODE) Spi_WriteIB(
1106  Spi_ChannelType Channel,
1107  P2CONST(Spi_DataBufferType, AUTOMATIC, SPI_APPL_DATA) DataBufferPtr);
1108 
1134 FUNC(Std_ReturnType, SPI_CODE) Spi_ReadIB(
1135  Spi_ChannelType Channel,
1136  P2VAR(Spi_DataBufferType, AUTOMATIC, SPI_APPL_DATA) DataBufferPointer);
1137 #endif /* #if SPI_IB || SPI_IB_EB */
1138 
1139 #if ((SPI_CHANNELBUFFERS == SPI_EB) || (SPI_CHANNELBUFFERS == SPI_IB_EB))
1140 
1172 FUNC(Std_ReturnType, SPI_CODE) Spi_SetupEB(
1173  Spi_ChannelType Channel,
1174  P2CONST(Spi_DataBufferType, AUTOMATIC, SPI_APPL_DATA) SrcDataBufferPtr,
1175  P2VAR(Spi_DataBufferType, AUTOMATIC, SPI_APPL_DATA) DesDataBufferPtr,
1176  Spi_NumberOfDataType Length);
1177 #endif /* #if ((SPI_CHANNELBUFFERS == SPI_EB) || (SPI_CHANNELBUFFERS ==
1178  *SPI_IB_EB)) */
1179 
1180 #if ((SPI_SCALEABILITY == SPI_LEVEL_1) || (SPI_SCALEABILITY == \
1181  SPI_LEVEL_2))
1182 
1202 FUNC(Std_ReturnType, SPI_CODE) Spi_AsyncTransmit(Spi_SequenceType Sequence);
1203 #endif /* #if ((SPI_SCALEABILITY == SPI_LEVEL_1) ||
1204  *(SPI_SCALEABILITY == SPI_LEVEL_2)) */
1205 
1206 #if (STD_ON == SPI_CANCEL_API)
1207 
1225 FUNC(void, SPI_CODE) Spi_Cancel(Spi_SequenceType Sequence);
1226 #endif /* #if (STD_ON == SPI_CANCEL_API) */
1227 
1228 #if ((SPI_SCALEABILITY == SPI_LEVEL_0) || (SPI_SCALEABILITY == \
1229  SPI_LEVEL_2))
1230 
1250 FUNC(Std_ReturnType, SPI_CODE) Spi_SyncTransmit(Spi_SequenceType Sequence);
1251 #endif /* #if ((SPI_SCALEABILITY == SPI_LEVEL_0) ||
1252  *(SPI_SCALEABILITY == SPI_LEVEL_2)) */
1253 
1254 #if (SPI_SCALEABILITY == SPI_LEVEL_2)
1255 
1277 FUNC(Std_ReturnType, SPI_CODE) Spi_SetAsyncMode(Spi_AsyncModeType Mode);
1278 #endif /* #if (SPI_SCALEABILITY == SPI_LEVEL_2) */
1279 
1302 FUNC(void, SPI_CODE) Spi_MainFunction_Handling(void);
1303 
1304 #if (STD_ON == SPI_REGISTER_READBACK_API)
1305 
1334 FUNC(Std_ReturnType, SPI_CODE) Spi_RegisterReadback(
1335  Spi_HWUnitType HWUnit,
1336  P2VAR(Spi_RegisterReadbackType, AUTOMATIC, SPI_APPL_DATA) RegRbPtr);
1337 #endif /* #if (STD_ON == SPI_REGISTER_READBACK_API) */
1338 
1339 #if (STD_ON == SPI_SAFETY_API)
1340 
1358 FUNC(Std_ReturnType, SPI_CODE) Spi_dataOverflowUnderflowIntrEnable(
1359  Spi_HWUnitType HWUnit, uint32 intFlags );
1360 
1380 FUNC(Std_ReturnType, SPI_CODE) Spi_dataOverflowUnderflowIntrDisable(
1381  Spi_HWUnitType HWUnit, uint32 intFlags);
1382 
1403  Spi_HWUnitType HWUnit, uint32 intFlags);
1404 
1424 FUNC(Std_ReturnType, SPI_CODE) Spi_dataOverflowUnderflowIntrStatusClear(
1425  Spi_HWUnitType HWUnit, uint32 intFlags);
1426 
1427 #endif /* #if (STD_ON == SPI_SAFETY_API) */
1428 
1429 #ifdef __cplusplus
1430 }
1431 #endif
1432 
1433 #endif /* #ifndef SPI_H_ */
1434 
1435 /* @} */
Definition: Spi.h:481
SPI Sequence configuration structure.
Definition: Spi.h:769
uint8 Spi_SequenceType
Specifies the identification (ID) for a sequence of jobs.
Definition: Spi.h:234
Definition: Spi.h:608
Definition: Spi.h:541
Std_ReturnType Spi_RegisterReadback(Spi_HWUnitType HWUnit, Spi_RegisterReadbackType *RegRbPtr)
This function reads the important registers of the hardware unit and returns the value in the structu...
Spi_SeqEndNotifyType Spi_SequenceEndNotification
Definition: Spi.h:773
Std_ReturnType Spi_SyncTransmit(Spi_SequenceType Sequence)
Service to transmit data on the SPI bus.
Spi_SeqResultType Spi_GetSequenceResult(Spi_SequenceType Sequence)
This service returns the last transmission result of the specified Sequence.
#define SPI_MAX_JOBS
Maximum jobs across all sequence/hwunit.
Definition: Spi_Cfg.h:185
void(* Spi_CacheInv)(uint8 *BufPtr, uint16 LenByte)
Cache invalidate function.
Definition: Spi.h:658
Spi_JobPriorityType jobPriority
Definition: Spi.h:750
Definition: Spi.h:586
Spi_AsyncModeType
Specifies the asynchronous mechanism mode for SPI busses handled asynchronously in LEVEL 2.
Definition: Spi.h:463
Spi_DataLineTransmitType transmissionLineEnable
Definition: Spi.h:728
Definition: Spi.h:503
#define SPI_MAX_CHANNELS_PER_JOB
Maximum channels allowed per job.
Definition: Spi_Cfg.h:176
Definition: Spi.h:450
Spi_StatusType Spi_GetHWUnitStatus(Spi_HWUnitType HWUnit)
This service returns the status of the specified SPI Hardware microcontroller peripheral.
Spi_NumberOfDataType maxBufLength
Definition: Spi.h:676
void(* Spi_CacheWb)(uint8 *BufPtr, uint16 LenByte)
Cache write-back function.
Definition: Spi.h:648
Std_ReturnType Spi_WriteIB(Spi_ChannelType Channel, const Spi_DataBufferType *DataBufferPtr)
Service for writing one or more data to an IB SPI Handler/Driver Channel specified by parameter.
uint8 externalDeviceCfgId
Definition: Spi.h:865
Spi_CacheWb cacheWb
Definition: Spi.h:828
Definition: Spi.h:612
void Spi_GetVersionInfo(Std_VersionInfoType *versioninfo)
This service returns the version information of this module.
Spi_JobResultType
This type defines a range of specific Jobs status for SPI Handler/Driver.
Definition: Spi.h:408
Spi_CsPinType
SPI Chip Select Pin.
Definition: Spi.h:499
Spi_TxRxMode
SPI TX/RX Mode.
Definition: Spi.h:539
uint8 Spi_HWUnitType
Specifies the identification (ID) for a SPI Hardware micro controller peripheral (unit)
Definition: Spi.h:242
#define SPI_MAX_HW_UNIT
Maximum HW unit - This should match the sum for the below units ISR which are ON.
Definition: Spi_Cfg.h:194
Mcspi_IrqStatusType
Irq status and std return type.
Definition: Spi.h:621
boolean enabledmaMode
Definition: Spi.h:789
Std_ReturnType Spi_dataOverflowUnderflowIntrDisable(Spi_HWUnitType HWUnit, uint32 intFlags)
This function Disable Under/Overflow Interupts of the hardware unit and returns the status.
Spi_DataDelayType
Spi_DataDelayType defines the number of interface clock cycles between CS toggling and first or last ...
Definition: Spi.h:580
Definition: Spi.h:614
Std_ReturnType Spi_SetAsyncMode(Spi_AsyncModeType Mode)
Service to set the asynchronous mechanism mode for SPI busses handled asynchronously.
Spi_HWUnitType hwUnitId
Definition: Spi.h:787
Definition: Spi.h:433
uint16 Spi_NumberOfDataType
Type for defining the number of data elements of the type Spi_DataBufferType to send and / or receive...
Definition: Spi.h:219
Definition: Spi.h:521
Definition: Spi.h:627
Definition: Spi.h:492
Definition: Spi.h:555
uint8 Spi_DataBufferType
Type of application data buffer elements.
Definition: Spi.h:211
SPI channel config structure parameters Pre-Compile only.
Definition: Spi.h:847
uint32 clkDivider
Definition: Spi.h:711
uint32 defaultTxData
Definition: Spi.h:674
#define SPI_MAX_JOBS_PER_SEQ
Maximum jobs allowed per sequence.
Definition: Spi_Cfg.h:179
uint32 udmaInstId
Definition: Spi.h:820
Definition: Spi.h:523
Definition: Spi.h:597
Definition: Spi.h:505
uint32 mcspiCh3config
Definition: Spi.h:908
Spi_CsModeType
SPI Chip Select Mode.
Definition: Spi.h:568
Definition: Spi.h:625
uint16 Spi_JobType
Specifies the identification (ID) for a Job.
Definition: Spi.h:229
Spi_SeqResultType
This type defines a range of specific Sequences status for SPI Handler/Driver.
Definition: Spi.h:429
Spi_HwUnitResultType
This type defines a range of specific HW unit status for SPI Handler/Driver.
Definition: Spi.h:446
#define SPI_MAX_CHANNELS
Maximum channels across all jobs/sequence/hwunit.
Definition: Spi_Cfg.h:182
SPI job config structure parameters Pre-Compile only.
Definition: Spi.h:859
SPI sequence config structure parameters Pre-Compile only.
Definition: Spi.h:873
Definition: Spi.h:610
Spi_TransferType transferType
Definition: Spi.h:686
uint32 mcspiRev
Definition: Spi.h:895
Definition: Spi.h:490
Mcspi_IrqStatusType Spi_dataOverflowUnderflowIntrGetStatus(Spi_HWUnitType HWUnit, uint32 intFlags)
This function status Under/Overflow Interupts of the hardware unit and returns the status.
uint16 startBitEnable
Definition: Spi.h:721
uint32 mcspiHlSysConfig
Definition: Spi.h:893
SPI Hardware unit configuration structure.
Definition: Spi.h:785
Definition: Spi.h:393
Spi_CacheWbInv cacheWbInv
Definition: Spi.h:826
Definition: Spi.h:412
uint8 dataWidth
Definition: Spi.h:671
Definition: Spi.h:501
Spi_ChannelType channelId
Definition: Spi.h:849
Definition: Spi.h:397
Spi_StatusType Spi_GetStatus(void)
Service returns the SPI Handler/Driver software module status.
Spi_CsModeType csMode
Definition: Spi.h:698
Definition: Spi.h:588
Definition: Spi.h:582
uint32 dmaTxChIntrNum
Definition: Spi.h:791
Std_ReturnType Spi_dataOverflowUnderflowIntrStatusClear(Spi_HWUnitType HWUnit, uint32 intFlags)
This function status clear Under/Overflow Interupts of the hardware unit and returns the status.
Spi_ClkMode clkMode
Definition: Spi.h:717
void(* Spi_CacheWbInv)(uint8 *BufPtr, uint16 LenByte)
Cache write-back invalidate function.
Definition: Spi.h:638
uint8 maxExtDevCfg
Definition: Spi.h:817
Spi_LevelType csPolarity
Definition: Spi.h:701
Definition: Spi.h:517
Spi_DataLineReceiveType receptionLineEnable
Definition: Spi.h:726
This file contains generated pre compile configuration file for SPI MCAL driver.
uint32 mcspiIrqenable
Definition: Spi.h:910
#define SPI_MAX_EXT_DEV
Maximum external device cfg.
Definition: Spi_Cfg.h:199
Definition: Spi.h:561
Spi_DataDelayType csIdleTime
Definition: Spi.h:703
Spi_McspiExternalDeviceConfigType mcspi
Definition: Spi.h:737
Definition: Spi.h:417
Definition: Spi.h:572
Std_ReturnType Spi_DeInit(void)
Service for SPI de-initialization.
void Spi_Init(const Spi_ConfigType *CfgPtr)
Service for SPI initialization.
uint8 maxSeq
Definition: Spi.h:811
Definition: Spi.h:448
Spi_LevelType startBitLevel
Definition: Spi.h:724
void Spi_Cancel(Spi_SequenceType Sequence)
Service cancels the specified on-going sequence transmission.
uint32 mcspiModulctrl
Definition: Spi.h:901
Definition: Spi.h:479
uint8 maxHwUnit
Definition: Spi.h:814
#define SPI_MAX_SEQ
Maximum sequence across all hwunit.
Definition: Spi_Cfg.h:188
Spi_CacheInv cacheInv
Definition: Spi.h:830
Spi_StatusType
This type defines a range of specific status for SPI Handler/Driver.
Definition: Spi.h:391
Std_ReturnType Spi_dataOverflowUnderflowIntrEnable(Spi_HWUnitType HWUnit, uint32 intFlags)
This function Enable Under/Overflow Interupts of the hardware unit and returns the status.
Definition: Spi.h:623
uint32 channelPerJob
Definition: Spi.h:756
Definition: Spi.h:543
Definition: Spi.h:438
uint32 mcspiCh0config
Definition: Spi.h:905
Definition: Spi.h:570
uint32 mcspiSysConfig
Definition: Spi.h:903
uint8 seqInterruptible
Definition: Spi.h:771
SPI register readback structure.
Definition: Spi.h:884
uint32 jobPerSeq
Definition: Spi.h:775
Definition: Spi.h:395
Spi_ClkMode
SPI Clock Mode - sets the clock polarity and phase. Note: These values are a direct register mapping....
Definition: Spi.h:515
Definition: Spi.h:431
Definition: Spi.h:584
Definition: Spi.h:519
uint32 mcspiHlRev
Definition: Spi.h:889
Spi_HWUnitType hwUnitId
Definition: Spi.h:752
uint32 mcspiSyst
Definition: Spi.h:899
Spi_TxRxMode txRxMode
Definition: Spi.h:719
SPI external device specific configuration structure .
Definition: Spi.h:735
Definition: Spi.h:452
uint32 dmaRxChIntrNum
Definition: Spi.h:793
uint8 maxChannels
Definition: Spi.h:805
Definition: Spi.h:436
SPI Job configuration structure specific to McSPI peripheral.
Definition: Spi.h:694
Std_ReturnType Spi_ReadIB(Spi_ChannelType Channel, Spi_DataBufferType *DataBufferPointer)
Service for reading synchronously one or more data from an IB SPI Handler/Driver Channel specified by...
Definition: Spi.h:410
Definition: Spi.h:559
Spi_JobType jobId
Definition: Spi.h:861
Definition: Spi.h:507
SPI Job configuration structure.
Definition: Spi.h:748
Definition: Spi.h:599
Definition: Spi.h:468
Spi_LevelType
Type for SPI Chip Select Polarity and Clock Idle Level.
Definition: Spi.h:488
Spi_JobEndNotifyType Spi_JobEndNotification
Definition: Spi.h:754
Spi_DataLineTransmitType
Spi_DataLineTransmitType defines the lines selected for transmission.
Definition: Spi.h:606
Definition: Spi.h:415
uint32 mcspiSysStatus
Definition: Spi.h:897
Spi_CsPinType csPin
Definition: Spi.h:863
uint32 mcspiHlHwInfo
Definition: Spi.h:891
Spi_JobPriorityType
SPI Job Priority.
Definition: Spi.h:553
Spi_DataLineReceiveType
Spi_DataLineReceiveType defines the lines selected for reception.
Definition: Spi.h:595
uint8 Spi_ChannelType
Specifies the identification (ID) for a Channel.
Definition: Spi.h:224
void Spi_MainFunction_Handling(void)
This function polls the SPI interrupts linked to HW Units allocated to the transmission of SPI sequen...
SPI Channel configuration structure.
Definition: Spi.h:667
Spi_SequenceType seqId
Definition: Spi.h:875
Std_ReturnType Spi_AsyncTransmit(Spi_SequenceType Sequence)
Service to transmit data on the SPI bus.
uint8 channelBufType
Definition: Spi.h:669
Definition: Spi.h:465
Definition: Spi.h:557
uint32 mcspiCh2config
Definition: Spi.h:907
uint16 csEnable
Definition: Spi.h:696
Spi_TransferType
Word transfer order - MSB first or LSB first.
Definition: Spi.h:477
Spi_JobResultType Spi_GetJobResult(Spi_JobType Job)
This service returns the last transmission result of the specified Job.
SPI config structure.
Definition: Spi.h:803
uint8 maxJobs
Definition: Spi.h:808
uint32 mcspiCh1config
Definition: Spi.h:906