AM65x MCU+ SDK
09.01.00
The General-Purpose Input/Output (GPIO) driver provides API to configure general-purpose pins as either inputs or outputs. It also provided API to configure GPIO to produce host CPU interrupts and DMA synchronization events in different interrupt/event generation modes.
Features Supported
Supports up to 16 GPIO signals per bank
Supports up to 9 banks of interrupt and DMA trigger capable GPIOs
Set/clear functionality
SysConfig Features
Note It is strongly recommend to use SysConfig where it is available instead of using direct SW API calls. This will help simplify the SW application and also catch common mistakes early in the development cycle.
Set pin direction: input or output
Set interrupt trigger type
Set interrupt router output lines
Configuring pinmux based on selected pin
Features NOT Supported
NA
Important Usage Guidelines
Not all GPIO pins, banks are present in a particular device. Refer device TRM for actual GPIO instances and pins supported
GPIO INTERRUPT ROUTER CONFIGURATION
K3 family device supports interrupt router configuration
The output lines of the interrupt router are a shared resource. Although many output pins are available for the GPIO MUX, only the resource pins that are allocated in the board configuration are available for use.
Change the board configuration and click GET RM DATA in SysConfig to use more interrupt router output lines.
Example Usage
Include the below file to access the APIs
GPIO configuration as output
uint32_t pinNum = gGpioPinNum, pinValue;
{
}
GPIO configuration as input
uint32_t pinNum = gGpioPinNum, pinValue;
{
}
else
{
}
GPIO configuration for bank interrupt
static void GPIO_bankIsrFxn(void *args)
{
uint32_t pinNum = (uint32_t) args, bankNum;
if (intrStatus & pinMask)
{
}
}
void gpio_bank_interrupt_init(void )
{
int32_t retVal;
uint32_t pinNum = gGpioPinNum, bankNum;
hwiPrms.
intNum = gGpioBankIntrNum;
hwiPrms.
args = (
void *) pinNum;
{
}
}
void gpio_bank_interrupt_deinit(void )
{
uint32_t pinNum = gGpioPinNum, bankNum, intrStatus;
}
GPIO configuration for per pin interrupt
static void GPIO_pinIsrFxn(void *args)
{
}
void gpio_pin_interrupt_init(void )
{
int32_t retVal;
uint32_t pinNum = gGpioPinNum, bankNum;
hwiPrms.
intNum = gGpioPinIntrNum;
hwiPrms.
args = (
void *) pinNum;
{
}
}
void gpio_pin_interrupt_deinit(void )
{
uint32_t pinNum = gGpioPinNum, bankNum;
}
API
APIs for GPIO
#define GPIO_GET_BANK_BIT_MASK(pinNum)
Returns the bit mask within a bank based on pin number.
Definition: gpio/v0/gpio.h:136
void HwiP_destruct(HwiP_Object *obj)
Cleanup, delete, destruct a Hwi object.
Parameters passed during HwiP_construct.
Definition: HwiP.h:72
void ClockP_sleep(uint32_t sec)
Sleep for user specified seconds.
#define GPIO_PIN_LOW
GPIO pin is at logic low.
Definition: gpio/v0/gpio.h:79
int32_t HwiP_construct(HwiP_Object *obj, HwiP_Params *params)
Create a Hwi object.
uint32_t GPIO_pinOutValueRead(uint32_t baseAddr, uint32_t pinNum)
This API determines the output logic level(value) on a specified GPIO pin.
#define GPIO_DIRECTION_INPUT
Definition: gpio/v0/gpio.h:90
#define GPIO_PIN_HIGH
GPIO pin is at logic high.
Definition: gpio/v0/gpio.h:81
void HwiP_Params_init(HwiP_Params *params)
Set default values to HwiP_Params.
#define DebugP_log(format,...)
Function to log a string to the enabled console.
Definition: DebugP.h:225
static void GPIO_clearBankIntrStatus(uint32_t baseAddr, uint32_t bankNum, uint32_t intrStatus)
This API clears the interrupt status of the specified bank.
Definition: gpio/v0/gpio.h:374
#define GPIO_TRIG_TYPE_RISE_EDGE
Interrupt request on occurrence of a rising edge on the input pin.
Definition: gpio/v0/gpio.h:101
void GPIO_setDirMode(uint32_t baseAddr, uint32_t pinNum, uint32_t pinDir)
This API configures the direction of a specified GPIO pin as being either input or output.
static void GPIO_clearIntrStatus(uint32_t baseAddr, uint32_t pinNum)
This API clears the enabled interrupt status of a specified GPIO pin.
Definition: gpio/v0/gpio.h:346
static void GPIO_pinWriteLow(uint32_t baseAddr, uint32_t pinNum)
This API drives an output GPIO pin to a logic LOW state.
Definition: gpio/v0/gpio.h:321
#define SystemP_SUCCESS
Return status when the API execution was successful.
Definition: SystemP.h:56
#define GPIO_DIRECTION_OUTPUT
Definition: gpio/v0/gpio.h:89
HwiP_FxnCallback callback
Definition: HwiP.h:75
static void GPIO_pinWriteHigh(uint32_t baseAddr, uint32_t pinNum)
This API drives an output GPIO pin to a logic HIGH state.
Definition: gpio/v0/gpio.h:309
void GPIO_bankIntrDisable(uint32_t baseAddr, uint32_t bankNum)
This API disables the bank interrupt.
void GPIO_setTrigType(uint32_t baseAddr, uint32_t pinNum, uint32_t trigType)
This API configures the trigger type for a specified input GPIO pin.
void * args
Definition: HwiP.h:76
#define GPIO_GET_BANK_INDEX(pinNum)
Returns the bank index based on pin number.
Definition: gpio/v0/gpio.h:126
#define DebugP_assert(expression)
Function to call for assert check.
Definition: DebugP.h:177
uint32_t intNum
Definition: HwiP.h:74
#define GPIO_TRIG_TYPE_NONE
No interrupt request on either rising or falling edges on the pin.
Definition: gpio/v0/gpio.h:99
static uint32_t GPIO_getBankIntrStatus(uint32_t baseAddr, uint32_t bankNum)
This API returns the interrupt status of the specified bank.
Definition: gpio/v0/gpio.h:359
uint32_t GPIO_pinRead(uint32_t baseAddr, uint32_t pinNum)
This API reads the logic level(value) on a specified GPIO pin.
void GPIO_bankIntrEnable(uint32_t baseAddr, uint32_t bankNum)
This API enables the bank interrupt. This has to be called after setting all the GPIO pin triggers of...