AM65x MCU+ SDK  09.01.00
CacheP.h
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32 
33 #ifndef CACHEP_H
34 #define CACHEP_H
35 
36 #ifdef __cplusplus
37 extern "C" {
38 #endif
39 
40 #include <stdint.h>
41 #include <kernel/dpl/SystemP.h>
42 #if defined(_TMS320C6X)
43 #include <kernel/dpl/CacheP_c6x.h>
44 #endif
45 
60 #define CacheP_CACHELINE_ALIGNMENT (128U)
61 
70  #define CacheP_TYPE_L1P (0x0001u)
71  #define CacheP_TYPE_L1D (0x0002u)
72  #define CacheP_TYPE_L2P (0x0004u)
73  #define CacheP_TYPE_L2D (0x0008u)
74  #define CacheP_TYPE_L1 ((CacheP_TYPE_L1P)|(CacheP_TYPE_L1D))
75  #define CacheP_TYPE_L2 ((CacheP_TYPE_L2P)|(CacheP_TYPE_L2D))
76  #define CacheP_TYPE_ALLP ((CacheP_TYPE_L1P)|(CacheP_TYPE_L2P))
77  #define CacheP_TYPE_ALLD ((CacheP_TYPE_L1D)|(CacheP_TYPE_L2D))
78  #define CacheP_TYPE_ALL (((CacheP_TYPE_L1P)|(CacheP_TYPE_L1D))|((CacheP_TYPE_L2P)|(CacheP_TYPE_L2D)))
85 typedef struct CacheP_Config_ {
86 
87  uint32_t enable;
88  uint32_t enableForceWrThru;
91 
93 extern const CacheP_Config gCacheConfig;
94 
104 void CacheP_enable(uint32_t type);
105 
115 void CacheP_disable(uint32_t type);
116 
122 uint32_t CacheP_getEnabled(void);
123 
133 void CacheP_wbAll(uint32_t type);
134 
144 void CacheP_wbInvAll(uint32_t type);
145 
157 void CacheP_wb(void *addr, uint32_t size, uint32_t type);
158 
170 void CacheP_inv(void *addr, uint32_t size, uint32_t type);
171 
183 void CacheP_wbInv(void *addr, uint32_t size, uint32_t type);
184 
189 void CacheP_init(void);
190 
193 #ifdef __cplusplus
194 }
195 #endif
196 
197 #endif /* CACHEP_H */
198 
CacheP_enable
void CacheP_enable(uint32_t type)
Cache enable.
CacheP_disable
void CacheP_disable(uint32_t type)
Cache disable.
size
uint16_t size
Definition: tisci_boardcfg.h:1
gCacheConfig
const CacheP_Config gCacheConfig
Externally defined Cache configuration.
CacheP_Config::enableForceWrThru
uint32_t enableForceWrThru
Definition: CacheP.h:88
SystemP.h
CacheP_Config
Cache config structure, this used by SysConfig and not to be used by end-users directly.
Definition: CacheP.h:85
CacheP_wbAll
void CacheP_wbAll(uint32_t type)
Cache writeback for full cache.
CacheP_wbInvAll
void CacheP_wbInvAll(uint32_t type)
Cache writeback and invalidate for full cache.
CacheP_init
void CacheP_init(void)
Initialize Cache sub-system, called by SysConfig, not to be called by end users.
type
uint16_t type
Definition: tisci_rm_core.h:1
addr
uint64_t addr
Definition: csl_udmap_tr.h:3
CacheP_wbInv
void CacheP_wbInv(void *addr, uint32_t size, uint32_t type)
Cache writeback and invalidate for a specified region.
CacheP_inv
void CacheP_inv(void *addr, uint32_t size, uint32_t type)
Cache invalidate for a specified region.
CacheP_Config::enable
uint32_t enable
Definition: CacheP.h:87
CacheP_getEnabled
uint32_t CacheP_getEnabled(void)
Get cache enabled bits.
CacheP_wb
void CacheP_wb(void *addr, uint32_t size, uint32_t type)
Cache writeback for a specified region.