AM64x MCU+ SDK  09.02.01
RAM

The Ram driver provides API to read and write to parallel or serial RAM devices interfaced with the board. The driver takes care of configuring the specific interface necessary to interact with RAM device.

Features Supported

  • APIs to read and write to a RAM offset.
  • Supports 16-bit parallel pSRAM devices.

SysConfig Features

Note
It is strongly recommend to use SysConfig where it is available instead of using direct SW API calls. This will help simplify the SW application and also catch common mistakes early in the development cycle.
  • Option to select RAM topology based on board
  • Supported RAM devices
    • IS67WVE4M16EBLL70BLA1

Features NOT Supported

  • Serial RAM devices
  • Burst read & write is not supported
  • DMA support

Important Usage Guidelines

None

Example Usage

Include the below file to access the APIs

#include <board/ram.h>

RAM Read API

uint32_t offset;
/* Set offset to read from */
offset = 0;
/* Do the read */
status = Ram_read(handle, offset, buffer, 100);

RAM Write API

uint32_t offset;
/* Set offset to write to */
offset = 0;
/* Do the write */
status = Ram_write(handle, offset, buffer, 100);

API

APIs for RAM

ram.h
Ram_read
int32_t Ram_read(Ram_Handle handle, uint32_t offset, uint8_t *buf, uint32_t len)
Read data from RAM device.
SystemP_SUCCESS
#define SystemP_SUCCESS
Return status when the API execution was successful.
Definition: SystemP.h:56
Ram_write
int32_t Ram_write(Ram_Handle handle, uint32_t offset, uint8_t *buf, uint32_t len)
Write to RAM device.
DebugP_assert
#define DebugP_assert(expression)
Function to call for assert check.
Definition: DebugP.h:177