|
AM64x MCU+ SDK
10.00.00
|
|
Go to the documentation of this file.
57 #include <drivers/hw_include/cslr.h>
58 #include <drivers/hw_include/cslr_adc.h>
69 #define ADC_INTR_STATUS_ALL (ADC_IRQSTATUS_END_OF_SEQUENCE_MASK | \
70 ADC_IRQSTATUS_FIFO0_THR_MASK | \
71 ADC_IRQSTATUS_FIFO0_OVERRUN_MASK | \
72 ADC_IRQSTATUS_FIFO0_UNDERFLOW_MASK | \
73 ADC_IRQSTATUS_FIFO1_THR_MASK | \
74 ADC_IRQSTATUS_FIFO1_OVERRUN_MASK | \
75 ADC_IRQSTATUS_FIFO1_UNDERFLOW_MASK | \
76 ADC_IRQSTATUS_OUT_OF_RANGE_MASK)
78 #define ADC_INTR_ENABLE_ALL (ADC_IRQENABLE_SET_END_OF_SEQUENCE_MASK | \
79 ADC_IRQENABLE_SET_FIFO0_THR_MASK | \
80 ADC_IRQENABLE_SET_FIFO0_OVERRUN_MASK | \
81 ADC_IRQENABLE_SET_FIFO0_UNDERFLOW_MASK | \
82 ADC_IRQENABLE_SET_FIFO1_THR_MASK | \
83 ADC_IRQENABLE_SET_FIFO1_OVERRUN_MASK | \
84 ADC_IRQENABLE_SET_FIFO1_UNDERFLOW_MASK | \
85 ADC_IRQENABLE_SET_OUT_OF_RANGE_MASK)
87 #define ADC_INTR_DISABLE_ALL (ADC_IRQENABLE_CLR_END_OF_SEQUENCE_MASK | \
88 ADC_IRQENABLE_CLR_FIFO0_THR_MASK | \
89 ADC_IRQENABLE_CLR_FIFO0_OVERRUN_MASK | \
90 ADC_IRQENABLE_CLR_FIFO0_UNDERFLOW_MASK | \
91 ADC_IRQENABLE_CLR_FIFO1_THR_MASK | \
92 ADC_IRQENABLE_CLR_FIFO1_OVERRUN_MASK | \
93 ADC_IRQENABLE_CLR_FIFO1_UNDERFLOW_MASK | \
94 ADC_IRQENABLE_CLR_OUT_OF_RANGE_MASK)
96 #define ADC_INTR_ALL (ADC_INTR_STATUS_ALL)
99 #define ADC_OPENDELAY_MAX (0x3FFFFU)
101 #define ADC_SAMPLEDELAY_MAX (0xFFU)
103 #define ADC_RANGE_MAX (0x3FFU)
105 #define ADC_RANGE_MIN (0x0U)
108 #define ADC_FIFO_SIZE (64U)
110 #define ADC_MAX_NUM_CHN (uint32_t)(8U)
113 #define ADC_GET_RANGE(bit) (((uint32_t) 1U) << (bit))
131 #define ADC_CHANNEL_1 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_1)
133 #define ADC_CHANNEL_2 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_2)
135 #define ADC_CHANNEL_3 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_3)
137 #define ADC_CHANNEL_4 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_4)
139 #define ADC_CHANNEL_5 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_5)
141 #define ADC_CHANNEL_6 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_6)
143 #define ADC_CHANNEL_7 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_7)
145 #define ADC_CHANNEL_8 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_8)
159 #define ADC_STEP_1 (ADC_ADCSTAT_STEP_ID_STEP1)
161 #define ADC_STEP_2 (ADC_ADCSTAT_STEP_ID_STEP2)
163 #define ADC_STEP_3 (ADC_ADCSTAT_STEP_ID_STEP3)
165 #define ADC_STEP_4 (ADC_ADCSTAT_STEP_ID_STEP4)
167 #define ADC_STEP_5 (ADC_ADCSTAT_STEP_ID_STEP5)
169 #define ADC_STEP_6 (ADC_ADCSTAT_STEP_ID_STEP6)
171 #define ADC_STEP_7 (ADC_ADCSTAT_STEP_ID_STEP7)
173 #define ADC_STEP_8 (ADC_ADCSTAT_STEP_ID_STEP8)
175 #define ADC_STEP_9 (ADC_ADCSTAT_STEP_ID_STEP9)
177 #define ADC_STEP_10 (ADC_ADCSTAT_STEP_ID_STEP10)
179 #define ADC_STEP_11 (ADC_ADCSTAT_STEP_ID_STEP11)
181 #define ADC_STEP_12 (ADC_ADCSTAT_STEP_ID_STEP12)
183 #define ADC_STEP_13 (ADC_ADCSTAT_STEP_ID_STEP13)
185 #define ADC_STEP_14 (ADC_ADCSTAT_STEP_ID_STEP14)
187 #define ADC_STEP_15 (ADC_ADCSTAT_STEP_ID_STEP15)
189 #define ADC_STEP_16 (ADC_ADCSTAT_STEP_ID_STEP16)
206 #define ADC_OPERATION_MODE_SINGLE_SHOT (ADC_STEPCONFIG_MODE_SW_EN_ONESHOT)
208 #define ADC_OPERATION_MODE_CONTINUOUS (ADC_STEPCONFIG_MODE_SW_EN_CONTINUOUS)
224 #define ADC_AVERAGING_NONE (ADC_STEPCONFIG_AVERAGING_NOAVG)
226 #define ADC_AVERAGING_2_SAMPLES (ADC_STEPCONFIG_AVERAGING_2_SAMPLESAVG)
228 #define ADC_AVERAGING_4_SAMPLES (ADC_STEPCONFIG_AVERAGING_4_SAMPLESAVG)
230 #define ADC_AVERAGING_8_SAMPLES (ADC_STEPCONFIG_AVERAGING_8_SAMPLESAVG)
232 #define ADC_AVERAGING_16_SAMPLES (ADC_STEPCONFIG_AVERAGING_16_SAMPLESAV)
246 #define ADC_FIFO_NUM_0 (0x0U)
248 #define ADC_FIFO_NUM_1 (0x1U)
262 #define ADC_INTR_SRC_END_OF_SEQUENCE (ADC_IRQENABLE_SET_END_OF_SEQUENCE_MASK)
264 #define ADC_INTR_SRC_FIFO0_THRESHOLD (ADC_IRQENABLE_SET_FIFO0_THR_MASK)
266 #define ADC_INTR_SRC_FIFO0_OVERRUN (ADC_IRQENABLE_SET_FIFO0_OVERRUN_MASK)
268 #define ADC_INTR_SRC_FIFO0_UNDERFLOW (ADC_IRQENABLE_SET_FIFO0_UNDERFLOW_MASK)
270 #define ADC_INTR_SRC_FIFO1_THRESHOLD (ADC_IRQENABLE_SET_FIFO1_THR_MASK)
272 #define ADC_INTR_SRC_FIFO1_OVERRUN (ADC_IRQSTATUS_FIFO1_OVERRUN_MASK)
274 #define ADC_INTR_SRC_FIFO1_UNDERFLOW (ADC_IRQENABLE_SET_FIFO1_UNDERFLOW_MASK)
276 #define ADC_INTR_SRC_OUT_OF_RANGE (ADC_IRQENABLE_SET_OUT_OF_RANGE_MASK)
290 #define ADC_IDLE_MODE_FORCE_IDLE (ADC_SYSCONFIG_IDLEMODE_FORCE)
292 #define ADC_IDLE_MODE_NO_IDLE (ADC_SYSCONFIG_IDLEMODE_NO_IDLE)
294 #define ADC_IDLE_MODE_SMART_IDLE (ADC_SYSCONFIG_IDLEMODE_SMART_IDLE)
301 typedef struct adcRevisionId
320 typedef struct adcStepConfig
359 typedef struct adcSequencerStatus
431 uint32_t errCorrection,
433 uint32_t calibration);
446 uint32_t dmaLineEnable);
474 uint32_t stepEnable);
490 void ADCStart(uint32_t baseAddr, uint32_t adcEnable);
648 int32_t
ADCSetRange(uint32_t baseAddr, uint32_t highRange, uint32_t lowRange);
void ADCInit(uint32_t baseAddr, uint32_t errCorrection, uint32_t errOffset, uint32_t calibration)
This API is used to initialize the ADC module.
void ADCSetIdleMode(uint32_t baseAddr, uint32_t idleMode)
This API is used to configure ADC idle mode.
void ADCEnableIntr(uint32_t baseAddr, uint32_t intrMask)
This API is used to enable interrupts.
uint32_t fsmBusy
Definition: adc/v0/adc.h:366
void ADCFIFODMAAccessEnable(uint32_t baseAddr, uint32_t fifoNum, uint32_t dmaLineEnable)
This API will enable DMA access for FIFO.
uint32_t sampleDelay
Definition: adc/v0/adc.h:336
uint32_t adcOperationMode_t
Enum to select the ADC Operation Mode.
Definition: adc/v0/adc.h:204
uint32_t fifoNum
Definition: adc/v0/adc.h:350
uint32_t mode
Definition: adc/v0/adc.h:322
uint32_t ADCGetFIFOData(uint32_t baseAddr, uint32_t fifoNum)
This API will read and return FIFO data.
int32_t ADCSetStepParams(uint32_t baseAddr, uint32_t stepId, const adcStepConfig_t *configParams)
This API will configure a step for analog to digital conversion.
void ADCStart(uint32_t baseAddr, uint32_t adcEnable)
This API will start ADC.
uint32_t ADCGetIntrRawStatus(uint32_t baseAddr)
This API is used to get the raw interrupt status.
Structure for accessing Revision ID of ADC module.
Definition: adc/v0/adc.h:302
uint32_t averaging
Definition: adc/v0/adc.h:346
void ADCDisableIntr(uint32_t baseAddr, uint32_t intrMask)
This API is used to disable interrupts.
Structure containing parameters for ADC step configuration.
Definition: adc/v0/adc.h:321
uint32_t ADCGetDMAFIFOThresholdLevel(uint32_t baseAddr, uint32_t fifoNum)
This API will read and return DMA request level for a FIFO.
uint32_t adcFIFONum_t
Enum to select FIFO to store the data.
Definition: adc/v0/adc.h:244
uint32_t custom
Definition: adc/v0/adc.h:311
void ADCGetSequencerStatus(uint32_t baseAddr, adcSequencerStatus_t *status)
This API is used to get the Sequencer status.
uint32_t rangeCheckEnable
Definition: adc/v0/adc.h:341
uint32_t afeBusy
Definition: adc/v0/adc.h:361
uint32_t scheme
Definition: adc/v0/adc.h:303
uint32_t stepId
Definition: adc/v0/adc.h:370
uint32_t rtlRev
Definition: adc/v0/adc.h:307
uint32_t adcStepId_t
Enum to select the step for operation.
Definition: adc/v0/adc.h:157
void ADCGetRange(uint32_t baseAddr, uint32_t *highRange, uint32_t *lowRange)
This API is used to get the range for conversion.
void ADCStepIdTagEnable(uint32_t baseAddr, uint32_t stepIdTag)
This API is used to configure the ADC module for storing step ID along with ADC data.
void ADCClearAllSteps(uint32_t baseAddr)
This API will clear all the ADC steps.
void ADCPowerUp(uint32_t baseAddr, uint32_t powerUp)
This API will power up ADC Module.
uint32_t ADCGetCPUFIFOThresholdLevel(uint32_t baseAddr, uint32_t fifoNum)
This API will read and return threshold level for a FIFO.
void ADCGetRevisionId(uint32_t baseAddr, adcRevisionId_t *revId)
This API is used get the ADC revision ID.
uint32_t minor
Definition: adc/v0/adc.h:313
int32_t ADCSetClkDivider(uint32_t baseAddr, uint32_t clkDivider)
This API will configure clock divider for the ADC Module.
uint32_t adcIntrSrc_t
Enum for ADC interrupts.
Definition: adc/v0/adc.h:260
void ADCWriteEOI(uint32_t baseAddr)
This API is used for EOI for ADC.
uint32_t func
Definition: adc/v0/adc.h:305
int32_t ADCSetRange(uint32_t baseAddr, uint32_t highRange, uint32_t lowRange)
This API is used to configure the range for ADC.
uint32_t openDelay
Definition: adc/v0/adc.h:330
void ADCClearIntrStatus(uint32_t baseAddr, uint32_t intrMask)
This API is used to clear the interrupt status.
int32_t ADCSetCPUFIFOThresholdLevel(uint32_t baseAddr, uint32_t fifoNum, uint32_t threshold)
This API will configure threshold level for a FIFO.
uint32_t ADCGetFIFOWordCount(uint32_t baseAddr, uint32_t fifoNum)
This API will return number of word present in the FIFO.
void ADCStepEnable(uint32_t baseAddr, uint32_t stepId, uint32_t stepEnable)
This API will enable ADC step.
uint32_t adcChannel_t
Enum to select the channel for input.
Definition: adc/v0/adc.h:129
uint32_t major
Definition: adc/v0/adc.h:309
uint32_t adcIdleMode_t
Enum to configure ADC idle mode.Applicable for TDA3XX Only.
Definition: adc/v0/adc.h:288
uint32_t ADCGetIntrStatus(uint32_t baseAddr)
This API is used to get the pending interrupts.
int32_t ADCSetDMAFIFOThresholdLevel(uint32_t baseAddr, uint32_t fifoNum, uint32_t threshold)
This API will configure DMA request level for a FIFO.
uint32_t AdcIsPoweredUp(uint32_t baseAddr)
This function checks if the ADC module is powered up.
uint32_t adcAveraging_t
Enum to number of samplings to average.
Definition: adc/v0/adc.h:222
uint32_t channel
Definition: adc/v0/adc.h:326
Structure for reporting ADC sequencer status.
Definition: adc/v0/adc.h:360