| Feature | Module |
| Memory Configurator (SysConfig based Linker generation) (Memory Configurator) | Common |
| Coremark and Dhrystone benchmark (Coremark Benchmark, Dhrystone Benchmark) | Common |
| McSPI LLD driver support (MCSPI Low Level Driver) | McSPI |
| UART LLD driver support (UART Low Level Driver) | UART |
| HW Spinlock example (Spinlock Example) | Spinlock |
| EMMC RTOS boot example (SBL EMMC) | SBL |
| SafeIPC support (IPC SafeIPC Echo) | IPC |
| LBIST support added for M4F | SDL |
| Serial Interface Multi channel implementation supporting ADS131M08 IC (32 KSPS) | PRU-IO |
| LwIP stack is upgraded to 2.2.0 version | Ethernet/Networking and USB |
| YANG data model based configuration support for IET/Frame Preemption(IEEE 802.1Qbu), Credit Based Shaper(IEEE 802.1Qav), Enhancements for Scheduled Traffic(IEEE 802.1Qbv) and other TSN features | Ethernet and Networking |
| Ethernet Switch management through standard Link Layer Discovery Protocol(IEEE 802.1AB) for CPSW peripheral | Ethernet and Networking |
| Multi-time domain gPTP(IEEE 802.1AS) support enabled in Time-Sensitive Networking stack | Ethernet and Networking |
| Example to showcase the simultaneous execution of Time-Sensitive Networking and LwIP stack | Ethernet and Networking |
| Syscfg and doc update for static IP configuration, custom MAC address and other ethernet related configurations | Ethernet and Networking |
Support to enable both ICSSG peripherals Ethernet PRU_ICSSG instance-0 (PRU_ICSSG0) USAGE GUIDE
| Ethernet and Networking |
| Support to enable upto five MAC ports using both CPSW and ICSSG peripherals on different cores | Ethernet and Networking |
| Added back ICSSG examples and docs from Industrial Communications SDK | Ethernet and Networking |
| OS | Supported CPUs | SysConfig Support | Key features tested | Key features not tested / NOT supported |
| FreeRTOS Kernel | R5F, M4F, A53 | NA | Task, Task notification, interrupts, semaphores, mutexes, timers, event groups. ROV views in CCS IDE, Task load measurement using FreeRTOS run time statistics APIs. | Only single core A53 FreeRTOS is supported. Second core is NOT used. |
| FreeRTOS SMP Kernel | A53 | NA | Task, Task notification, interrupts, semaphores, mutexes, timers, event groups. ROV views in CCS IDE, Task load measurement using FreeRTOS run time statistics APIs. | - |
| FreeRTOS POSIX | R5F, M4F, A53 | NA | pthread, mqueue, semaphore, clock | - |
| NO RTOS | R5F, M4F, A53 | NA | See Driver Porting Layer (DPL) below | Only single core A53 NORTOS is supported. Second core is NOT used. |
| Module | Supported CPUs | SysConfig Support | OS support | Key features tested | Key features not tested / NOT supported |
| Address Translate | M4F | YES | FreeRTOS, NORTOS | Use RAT to allow M4F access to peripheral address space | - |
| Cache | R5F, A53 | YES | FreeRTOS, NORTOS | Cache write back, invalidate, enable/disable | - |
| Clock | R5F, M4F, A53 | YES | FreeRTOS, NORTOS | Tick timer at user specified resolution, timeouts and delays | - |
| CpuId | R5F | NA | FreeRTOS, NORTOS | Verify Core ID and Cluster ID that application is running | - |
| CycleCounter | R5F, M4F, A53 | NA | FreeRTOS, NORTOS | Measure CPU cycles using CPU specific internal counters | - |
| Debug | R5F, M4F, A53 | YES | FreeRTOS, NORTOS | Logging and assert to any combo of: UART, CCS, shared memory | - |
| Heap | R5F, M4F, A53 | NA | FreeRTOS, NORTOS | Create arbitrary heaps in user defined memory segments | - |
| Hwi | R5F, M4F, A53 | YES | FreeRTOS, NORTOS | Interrupt register, enable/disable/restore | - |
| MPU | R5F, M4F | YES | FreeRTOS, NORTOS | Setup MPU and control access to address space | - |
| MMU | A53 | YES | NORTOS | Setup MMU and control access to address space | - |
| Semaphore | R5F, M4F, A53 | NA | FreeRTOS, NORTOS | Binary, Counting Semaphore, recursive mutexs with timeout | - |
| Task | R5F, M4F, A53 | NA | FreeRTOS | Create, delete tasks | - |
| Timer | R5F, M4F, A53 | YES | FreeRTOS, NORTOS | Configure arbitrary timers | - |
| Event | R5F, M4F | YES | FreeRTOS | Setting, getting, clearing, and waiting of Event bits | - |
| Peripheral | Supported CPUs | SysConfig Support | DMA Supported | Key features tested | Key features not tested / NOT supported |
| ADC | R5F | YES | Yes | Single conversion (one-shot mode), interrupt mode, DMA mode | Continuous conversion not tested |
| CRC | R5F | YES | No | CRC in full CPU mode | - |
| DDR | R5F | YES | No | Tested LPDDR4 at 400MHz frequency. | - |
| ECAP | R5F | YES | No | Frequency, Duty cycle, interrupt mode | - |
| EPWM | R5F | YES | No | Different Frequency, Duty cycle, interrupt mode, Deadband and chopper module | Tripzone module not tested |
| EQEP | R5F | YES | No | Signal Frequency and Direction, interrupt mode | - |
| FSI (RX/TX) | R5F | YES | No | RX, TX, polling, interrupt mode, single/dual lanes | - |
| GPIO | R5F, M4F, A53 | YES | No | Basic input/output, GPIO as interrupt | GPIO as interrupt is not tested for A53. |
| GTC | R5F, A53 | NA | No | Enable GTC, setting FID (Frequency indicator) | - |
| I2C | R5F, M4F, A53 | YES | No | Controller mode, basic read/write, polling and interrupt mode | Target mode not supported. M4F not tested due to EVM limitation |
| IPC Notify | R5F, M4F, A53 | YES | No | Low latency IPC between RTOS/NORTOS CPUs | - |
| IPC Rpmsg | R5F, M4F, A53 | YES | No | RPMessage protocol based IPC for all R5F, M4F, A53 running NORTOS/FreeRTOS/Linux | - |
| MCAN | R5F | YES | No | RX, TX, interrupt and polling mode | - |
| MCSPI | R5F, M4F | YES | Yes | Controller/Peripheral mode, basic read/write, polling, interrupt and DMA mode | - |
| MDIO | R5F | NA | No | Register read/write, link status and link interrupt enable API | - |
| MMCSD | R5F | YES | Yes | Raw read/write and file I/O on MMCSD0 eMMC, and MMCSD1 SD. eMMC tested till HS SDR mode (8-bit data, 52 MHz), SD tested till SD HS mode (4-bit, 25 MHz) | Interrupt mode not tested |
| OSPI | R5F | YES | Yes | Read direct, Write indirect, Read/Write commands, DMA for read, PHY Mode | Interrupt mode not supported |
| PCIe | R5F | YES | No | Buffer Transfer between EP and RC modes. Legacy interrupt | MSI and MSIx capability |
| Pinmux | R5F, M4F, A53 | YES | No | Tested with multiple peripheral pinmuxes | - |
| PRUICSS | R5F | YES | No | Tested with Ethercat, EtherNet/IP, IO-Link, ICSS-EMAC, HDSL, EnDat | - |
| SOC | R5F, M4F, A53 | YES | No | lock/unlock MMRs, get CPU clock, CPU name, clock enable, set frequency, SW Warm/POR Reset, Address Translation | - |
| Sciclient | R5F, M4F, A53 | YES | No | Tested with clock setup, module on/off | - |
| SPINLOCK | R5F, M4F, A53 | NA | No | Lock, unlock HW spinlocks | - |
| UART | R5F, M4F, A53 | YES | Yes | Basic read/write, polling, interrupt mode, | HW flow control not tested. DMA mode not supported |
| UDMA | R5F, A53 | YES | Yes | Basic memory copy, SW trigger, Chaining | - |
| WDT | R5F, A53 | YES | No | Interrupt after watchdog expiry | Reset not supported |
| Module | Supported CPUs | SysConfig Support | OS Support | Key features tested | Key features not tested |
| TSN | R5F | NO | FreeRTOS | gPTP IEEE 802.1 AS-2020 compliant gPTP stack, End Nodes and Bridge mode support, YANG data model configuration | Multi-Clock Domain |
| LwIP | R5F | YES | FreeRTOS | TCP/UDP IP networking stack with and without checksum offload enabled, TCP/UDP IP networking stack with server and client functionality, basic Socket APIs, netconn APIs and raw APIs, DHCP, ping, TCP iperf, scatter-gather, DSCP priority mapping | Other LwIP features |
| Ethernet driver (ENET) | R5F | YES | FreeRTOS | Ethernet as port using CPSW, MAC loopback and PHY loopback, Layer 2 MAC, Packet Timestamping, CPSW Switch, Policer and Classifier, MDIO Manual Mode, CBS (IEEE 802.1Qav) on CPSW, IET (IEEE 802.1Qbu) on CPSW, Strapped PHY (Early Ethernet), cut through switch on CPSW | RMII mode |
| Mbed-TLS | R5F | NO | FreeRTOS | Tested software cryptography after porting, used mbedTLS with LwIP to implement HTTPS server | Hardware offloaded cryptography |
| ID | Head Line | Module | Applicable Releases | Applicable Devices | Resolution/Comments |
| MCUSDK-1900 | UART Hardware Flow Control is not working | UART | 7.3.0 onwards | AM243x, AM64x | - |
| MCUSDK-8945 | Boot Time Degradation is observed for HS-FS device | SBL | 8.5.0 | AM64x, AM243x | Increased authentication buffer size |
| MCUSDK-10739 | CMSIS library most of the functions are re-defined | CMSIS | 8.5.0 onwards | AM64x, AM243x | update the makefile to remove the duplicate files |
| MCUSDK-10781 | Flash Re-Init is not supported | Flash | 8.6.0 onwards | AM64x, AM243x | Decoupled the inits with a config variable |
| MCUSDK-10783 | Flash Driver is not supported with XIP | Flash | 8.6.0 onwards | AM64x, AM243x | Added state preservation for DAC mode |
| MCUSDK-11232 | Add a check condition in mcu_rom_image_gen.py based on ROM acceptance criterion | SBL | 8.6.0 onwards | AM64x, AM243x | added size checking condition in script |
| MCUSDK-11508 | The JTAG access to ICSSG_PRU cores is not available | SBL | 8.6.0 onwards | AM64x, AM243x | Added ICSS cores init in SBL |
| MCUSDK-11667 | Flash IO example is doing SectorErase as well as BlkErase despite the flash configured in uniform sector mode | Flash | 9.0.0 onwards | AM64x, AM243x | witch to block erase and document the API usage in flash userguide |
| MCUSDK-12117 | Setting the ICSSG1 clock frequency affects the ICSSG0 clock frequency | SOC | 9.0.0 onwards | AM64x, AM243x | Added ICSS cores init in SBL |
| PINDSW-5282 | Move HOST_PKT_TX PA stat update in RTU after acquiring TX queue or after drop checks | Ethernet | 09.01.00 | AM64x, AM243x | - |
| PINDSW-5536 | TMDX654IDKEVM: Clock jump of PTP device for ICSSG #2 | Ethernet | 09.01.00 | AM64x, AM243x | - |
| PINDSW-6919 | 100M HD transmit issue in case of excess collisions | Ethernet | 09.01.00 | AM64x, AM243x | - |
| PINDSW-6624 | ICSSG TAS Example Failure | Ethernet | 9.0.0 onwards | AM64x, AM243x | - |
| MCUSDK-11697 | MDIO Manual mode is not sending preamble | Networking | 8.4.0 onwards | AM64x, AM243x | -
|
| ID | Head Line | Module | Applicable Releases | Applicable Devices | Workaround |
| MCUSDK-626 | DMA not working with ADC FIFO 1 | ADC | 7.3.0 onwards | AM64x, AM243x | Use ADC FIFO 0
|
| MCUSDK-2113 | [Docs] Sysfw RM/PM documentation doesn't specify AM243x | Docs | 8.0.0 onwards | AM243x | - |
| MCUSDK-2715 | PKA ECDSA sign verify is not working for P-521 and BrainPool P-512R1 curves | SECURITY | 8.2.0 onwards | AM64x, AM243x | - |
| MCUSDK-6262 | [AM243X] : MMCSD read io example is not functional on eMMC if the APP_MMCSD_START_BLK is changed for MMCSD_write and MMCSD_read | MMCSD | 8.3.0 owards | AM243x, AM64x | - |
| MCUSDK-8842 | OSPI Writes fail with multi threaded applications | OSPI | 8.4.0 | AM64x, AM243x | - |
| MCUSDK-8938 | Last 512KB of memory is not accessible in dev boot mode flow | SBL | 8.4.0 | AM64x, AM243x | Use other boot modes |
mbedTLS-advisory
MCUSDK-9082 | MbedTLS - RSA exploit by kernel-privileged cache side-channel attackers | Mbed-TLS | 8.6.0 | AM64x, AM243x, AM263X, AM273X | - |
| MCUSDK-10691 | flash sequence does not work for MX25U51245G (4-4-4 mode) | Flash | 8.6.0 | AM64x, AM243x | -
|
| MCUSDK-10939 | PCIe MSI error when connected to Linux Root Complex | PCIe | 8.6.0 | AM64x, AM243x | - |
| MCUSDK-11028 | PCIe as End Point throwing error when changing BAR aperture | PCIe | 8.6.0 | AM64x, AM243x | - |
| MCUSDK-11507 | ENET: CPSW MAC port is stuck forever and dropping all the Rx/Tx packets with reception of corrupts preamble. | CPSW | 8.2.0 onwards | AM64x, AM243x | Disable hostRxTimestampEn flag in CPSW CPST configuration. This does not impact the CPTS Rx or Tx Timestamp Events for PTP packets and is orthogonal feature. |
| MCUSDK-11652 | PCIE benchmarking is not working for (variable) BUF_SIZE = 0x40 | PCIe | 8.6.0 onwards | AM64x, AM243x | - |
| MCUSDK-11730 | A wrong counter is used for Event 2 in PMU configuration | PMU | 9.0.0 onwards | AM64x, AM243x | - |
| MCUSDK-11942 | The McSPI driver does not output CLK when it is set to RX only mode and data size is not 8 bit | McSPI | 9.0.0 onwards | AM64x, AM243x | - |
| MCUSDK-12211 | OSPI: Unsafe (uint32_t*) in OSPI_write() API. Causing abort with Oz optimization in case of unaligned access | OSPI | 9.0.0 onwards | AM64x, AM243x | Make sure source and destination buffers are 4 byte aligned |
| MCUSDK-3626 | Enet: Phy tuning is not done correctly on AM64x/AM243x and AM263x platforms | Enet | 8.1.0 onwards | AM64x, AM243x | PHY delay is not tuned but set to value based on limited testing on a small set of boards.If packet drops are still seen, we can force the phy to set to 100mbps.Make below change in application code: linkCfg->speed = ENET_SPEED_100MBIT; linkCfg->duplexity = ENET_DUPLEX_FULL; |
| MCUSDK-8376 | LWIP web server application crashes in server stress test | Enet, LWIP | 8.3.0 onwards | AM64x, AM243x | - |
| MCUSDK-9739 | AM64B SK loss of packet on using CPSW switch | Networking | 8.5.0 | AM64x | - |
| MCUSDK-10679 | CPSW UDP Iperf test instability on AM243x | Networking | 8.6.0 | AM64x, AM243x | - |
| PROC_SDL-6445 | ECC error injection test fails for VTM aggregator from R5F domain. | SDL | 8.6.0 | AM64x, AM243x | For VTM ECC aggregator, use M4F for error injection. |
| PINDSW-6452 | ICSSG based standard Ethernet drops packets, limits TCP throughput to 600M | Ethernet | AM64x, AM243x | 08.06.00 onwards | - |
| MCUSDK-12526 | am243x/am64x: ENET ICSSG: Host port (PA) statistics is broken for ICSSG MAC mode | Ethernet | AM64x, AM243x | 09.01.00 onwards | No issues with ICSSG switch mode. In ICSSG MAC mode firmware, rx packet stats are broken. |
| MCUSDK-8376 | LWIP web server application crashes in server stress test | PLATFORM_SW_CONNECTIVITY | AM64x, AM243x | 09.00.00 onwards | - |
| MCUSDK-11421 | enet_layer2_icssg example crashing while exiting | Networking | AM64x, AM243x | 08.06.00 onwards | - |
| ID | Head Line | Module | SDK Status |
| i2278 | MCAN: Message Transmit order not guaranteed from dedicated Tx Buffers configured with same Message ID | MCAN | Open |
| i2279 | MCAN: Specification Update for dedicated Tx Buffers and Tx Queues configured with same Message ID | MCAN | Open |
| i2310 | USART: Erroneous clear/trigger of timeout interrupt | UART | Implemented |
| i2311 | USART: Spurious DMA Interrupts | UART | Implemented |
| i2312 | MMCSD: HS200 and SDR104 Command Timeout Window Too Small | MMCSD | Open |
| i2313 | GPMC: Sub-32-bit read issue with NAND and FPGA/FIFO | GPMC | Implemented |
| i2326 | PCIe: MAIN_PLLx operating in fractional mode, which is required for enabling SSC, is not compliant with PCIe Refclk jitter limits | PCIe | Open |
| i2329 | MDIO interface corruption, | CPSW, ICSSG | Open |
| i2331 | CPSW: Device lockup when reading CPSW registers | CPSW, SBL | Implemented |
| i2345 | CPSW: Ethernet Packet corruption occurs if CPDMA fetches a packet which spans across memory banks | CPSW | Implemented |
| i2401 | CPSW: Host Timestamps Cause CPSW Port to Lock up | CPSW | Open |
| i2402 | CPSW: Ethernet to Host Checksum Offload does not work | CPSW | Open |
This section lists changes which could affect user applications developed using older SDK versions. Read this carefully to see if you need to do any changes in your existing application when migrating to this SDK version relative to previous SDK version. Also refer to older SDK version release notes to see changes in earlier SDKs.
1.8.20